1#[doc = "Register `CRL` reader"]
2pub struct R(crate::R<CRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CRL` writer"]
17pub struct W(crate::W<CRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `MODE0` reader - Port 0 mode bits"]
38pub type MODE0_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `MODE0` writer - Port 0 mode bits"]
40pub type MODE0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
41#[doc = "Field `CNF0` reader - Port 0 configuration bits"]
42pub type CNF0_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `CNF0` writer - Port 0 configuration bits"]
44pub type CNF0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
45#[doc = "Field `MODE1` reader - Port 1 mode bits"]
46pub type MODE1_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `MODE1` writer - Port 1 mode bits"]
48pub type MODE1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
49#[doc = "Field `CNF1` reader - Port 1 configuration bits"]
50pub type CNF1_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `CNF1` writer - Port 1 configuration bits"]
52pub type CNF1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
53#[doc = "Field `MODE2` reader - Port 2 mode bits"]
54pub type MODE2_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `MODE2` writer - Port 2 mode bits"]
56pub type MODE2_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
57#[doc = "Field `CNF2` reader - Port 2 configuration bits"]
58pub type CNF2_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `CNF2` writer - Port 2 configuration bits"]
60pub type CNF2_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
61#[doc = "Field `MODE3` reader - Port 3 mode bits"]
62pub type MODE3_R = crate::FieldReader<u8, u8>;
63#[doc = "Field `MODE3` writer - Port 3 mode bits"]
64pub type MODE3_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
65#[doc = "Field `CNF3` reader - Port 3 configuration bits"]
66pub type CNF3_R = crate::FieldReader<u8, u8>;
67#[doc = "Field `CNF3` writer - Port 3 configuration bits"]
68pub type CNF3_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
69#[doc = "Field `MODE4` reader - Port 4 mode bits"]
70pub type MODE4_R = crate::FieldReader<u8, u8>;
71#[doc = "Field `MODE4` writer - Port 4 mode bits"]
72pub type MODE4_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
73#[doc = "Field `CNF4` reader - Port 4 configuration bits"]
74pub type CNF4_R = crate::FieldReader<u8, u8>;
75#[doc = "Field `CNF4` writer - Port 4 configuration bits"]
76pub type CNF4_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
77#[doc = "Field `MODE5` reader - Port 5 mode bits"]
78pub type MODE5_R = crate::FieldReader<u8, u8>;
79#[doc = "Field `MODE5` writer - Port 5 mode bits"]
80pub type MODE5_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
81#[doc = "Field `CNF5` reader - Port 5 configuration bits"]
82pub type CNF5_R = crate::FieldReader<u8, u8>;
83#[doc = "Field `CNF5` writer - Port 5 configuration bits"]
84pub type CNF5_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
85#[doc = "Field `MODE6` reader - Port 6 mode bits"]
86pub type MODE6_R = crate::FieldReader<u8, u8>;
87#[doc = "Field `MODE6` writer - Port 6 mode bits"]
88pub type MODE6_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
89#[doc = "Field `CNF6` reader - Port 6 configuration bits"]
90pub type CNF6_R = crate::FieldReader<u8, u8>;
91#[doc = "Field `CNF6` writer - Port 6 configuration bits"]
92pub type CNF6_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
93#[doc = "Field `MODE7` reader - Port 7 mode bits"]
94pub type MODE7_R = crate::FieldReader<u8, u8>;
95#[doc = "Field `MODE7` writer - Port 7 mode bits"]
96pub type MODE7_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
97#[doc = "Field `CNF7` reader - Port 7 configuration bits"]
98pub type CNF7_R = crate::FieldReader<u8, u8>;
99#[doc = "Field `CNF7` writer - Port 7 configuration bits"]
100pub type CNF7_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CRL_SPEC, u8, u8, 2, O>;
101impl R {
102 #[doc = "Bits 0:1 - Port 0 mode bits"]
103 #[inline(always)]
104 pub fn mode0(&self) -> MODE0_R {
105 MODE0_R::new((self.bits & 3) as u8)
106 }
107 #[doc = "Bits 2:3 - Port 0 configuration bits"]
108 #[inline(always)]
109 pub fn cnf0(&self) -> CNF0_R {
110 CNF0_R::new(((self.bits >> 2) & 3) as u8)
111 }
112 #[doc = "Bits 4:5 - Port 1 mode bits"]
113 #[inline(always)]
114 pub fn mode1(&self) -> MODE1_R {
115 MODE1_R::new(((self.bits >> 4) & 3) as u8)
116 }
117 #[doc = "Bits 6:7 - Port 1 configuration bits"]
118 #[inline(always)]
119 pub fn cnf1(&self) -> CNF1_R {
120 CNF1_R::new(((self.bits >> 6) & 3) as u8)
121 }
122 #[doc = "Bits 8:9 - Port 2 mode bits"]
123 #[inline(always)]
124 pub fn mode2(&self) -> MODE2_R {
125 MODE2_R::new(((self.bits >> 8) & 3) as u8)
126 }
127 #[doc = "Bits 10:11 - Port 2 configuration bits"]
128 #[inline(always)]
129 pub fn cnf2(&self) -> CNF2_R {
130 CNF2_R::new(((self.bits >> 10) & 3) as u8)
131 }
132 #[doc = "Bits 12:13 - Port 3 mode bits"]
133 #[inline(always)]
134 pub fn mode3(&self) -> MODE3_R {
135 MODE3_R::new(((self.bits >> 12) & 3) as u8)
136 }
137 #[doc = "Bits 14:15 - Port 3 configuration bits"]
138 #[inline(always)]
139 pub fn cnf3(&self) -> CNF3_R {
140 CNF3_R::new(((self.bits >> 14) & 3) as u8)
141 }
142 #[doc = "Bits 16:17 - Port 4 mode bits"]
143 #[inline(always)]
144 pub fn mode4(&self) -> MODE4_R {
145 MODE4_R::new(((self.bits >> 16) & 3) as u8)
146 }
147 #[doc = "Bits 18:19 - Port 4 configuration bits"]
148 #[inline(always)]
149 pub fn cnf4(&self) -> CNF4_R {
150 CNF4_R::new(((self.bits >> 18) & 3) as u8)
151 }
152 #[doc = "Bits 20:21 - Port 5 mode bits"]
153 #[inline(always)]
154 pub fn mode5(&self) -> MODE5_R {
155 MODE5_R::new(((self.bits >> 20) & 3) as u8)
156 }
157 #[doc = "Bits 22:23 - Port 5 configuration bits"]
158 #[inline(always)]
159 pub fn cnf5(&self) -> CNF5_R {
160 CNF5_R::new(((self.bits >> 22) & 3) as u8)
161 }
162 #[doc = "Bits 24:25 - Port 6 mode bits"]
163 #[inline(always)]
164 pub fn mode6(&self) -> MODE6_R {
165 MODE6_R::new(((self.bits >> 24) & 3) as u8)
166 }
167 #[doc = "Bits 26:27 - Port 6 configuration bits"]
168 #[inline(always)]
169 pub fn cnf6(&self) -> CNF6_R {
170 CNF6_R::new(((self.bits >> 26) & 3) as u8)
171 }
172 #[doc = "Bits 28:29 - Port 7 mode bits"]
173 #[inline(always)]
174 pub fn mode7(&self) -> MODE7_R {
175 MODE7_R::new(((self.bits >> 28) & 3) as u8)
176 }
177 #[doc = "Bits 30:31 - Port 7 configuration bits"]
178 #[inline(always)]
179 pub fn cnf7(&self) -> CNF7_R {
180 CNF7_R::new(((self.bits >> 30) & 3) as u8)
181 }
182}
183impl W {
184 #[doc = "Bits 0:1 - Port 0 mode bits"]
185 #[inline(always)]
186 #[must_use]
187 pub fn mode0(&mut self) -> MODE0_W<0> {
188 MODE0_W::new(self)
189 }
190 #[doc = "Bits 2:3 - Port 0 configuration bits"]
191 #[inline(always)]
192 #[must_use]
193 pub fn cnf0(&mut self) -> CNF0_W<2> {
194 CNF0_W::new(self)
195 }
196 #[doc = "Bits 4:5 - Port 1 mode bits"]
197 #[inline(always)]
198 #[must_use]
199 pub fn mode1(&mut self) -> MODE1_W<4> {
200 MODE1_W::new(self)
201 }
202 #[doc = "Bits 6:7 - Port 1 configuration bits"]
203 #[inline(always)]
204 #[must_use]
205 pub fn cnf1(&mut self) -> CNF1_W<6> {
206 CNF1_W::new(self)
207 }
208 #[doc = "Bits 8:9 - Port 2 mode bits"]
209 #[inline(always)]
210 #[must_use]
211 pub fn mode2(&mut self) -> MODE2_W<8> {
212 MODE2_W::new(self)
213 }
214 #[doc = "Bits 10:11 - Port 2 configuration bits"]
215 #[inline(always)]
216 #[must_use]
217 pub fn cnf2(&mut self) -> CNF2_W<10> {
218 CNF2_W::new(self)
219 }
220 #[doc = "Bits 12:13 - Port 3 mode bits"]
221 #[inline(always)]
222 #[must_use]
223 pub fn mode3(&mut self) -> MODE3_W<12> {
224 MODE3_W::new(self)
225 }
226 #[doc = "Bits 14:15 - Port 3 configuration bits"]
227 #[inline(always)]
228 #[must_use]
229 pub fn cnf3(&mut self) -> CNF3_W<14> {
230 CNF3_W::new(self)
231 }
232 #[doc = "Bits 16:17 - Port 4 mode bits"]
233 #[inline(always)]
234 #[must_use]
235 pub fn mode4(&mut self) -> MODE4_W<16> {
236 MODE4_W::new(self)
237 }
238 #[doc = "Bits 18:19 - Port 4 configuration bits"]
239 #[inline(always)]
240 #[must_use]
241 pub fn cnf4(&mut self) -> CNF4_W<18> {
242 CNF4_W::new(self)
243 }
244 #[doc = "Bits 20:21 - Port 5 mode bits"]
245 #[inline(always)]
246 #[must_use]
247 pub fn mode5(&mut self) -> MODE5_W<20> {
248 MODE5_W::new(self)
249 }
250 #[doc = "Bits 22:23 - Port 5 configuration bits"]
251 #[inline(always)]
252 #[must_use]
253 pub fn cnf5(&mut self) -> CNF5_W<22> {
254 CNF5_W::new(self)
255 }
256 #[doc = "Bits 24:25 - Port 6 mode bits"]
257 #[inline(always)]
258 #[must_use]
259 pub fn mode6(&mut self) -> MODE6_W<24> {
260 MODE6_W::new(self)
261 }
262 #[doc = "Bits 26:27 - Port 6 configuration bits"]
263 #[inline(always)]
264 #[must_use]
265 pub fn cnf6(&mut self) -> CNF6_W<26> {
266 CNF6_W::new(self)
267 }
268 #[doc = "Bits 28:29 - Port 7 mode bits"]
269 #[inline(always)]
270 #[must_use]
271 pub fn mode7(&mut self) -> MODE7_W<28> {
272 MODE7_W::new(self)
273 }
274 #[doc = "Bits 30:31 - Port 7 configuration bits"]
275 #[inline(always)]
276 #[must_use]
277 pub fn cnf7(&mut self) -> CNF7_W<30> {
278 CNF7_W::new(self)
279 }
280 #[doc = "Writes raw bits to the register."]
281 #[inline(always)]
282 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
283 self.0.bits(bits);
284 self
285 }
286}
287#[doc = "configuration low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [crl](index.html) module"]
288pub struct CRL_SPEC;
289impl crate::RegisterSpec for CRL_SPEC {
290 type Ux = u32;
291}
292#[doc = "`read()` method returns [crl::R](R) reader structure"]
293impl crate::Readable for CRL_SPEC {
294 type Reader = R;
295}
296#[doc = "`write(|w| ..)` method takes [crl::W](W) writer structure"]
297impl crate::Writable for CRL_SPEC {
298 type Writer = W;
299 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
300 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
301}
302#[doc = "`reset()` method sets CRL to value 0x4444_4444"]
303impl crate::Resettable for CRL_SPEC {
304 const RESET_VALUE: Self::Ux = 0x4444_4444;
305}