Struct mkw41z4::lptmr0::psr::_PRESCALEW [] [src]

pub struct _PRESCALEW<'a> { /* fields omitted */ }

Proxy

Methods

impl<'a> _PRESCALEW<'a>
[src]

Writes variant to the field

Prescaler divides the prescaler clock by 2; glitch filter does not support this configuration.

Prescaler divides the prescaler clock by 4; glitch filter recognizes change on input pin after 2 rising clock edges.

Prescaler divides the prescaler clock by 8; glitch filter recognizes change on input pin after 4 rising clock edges.

Prescaler divides the prescaler clock by 16; glitch filter recognizes change on input pin after 8 rising clock edges.

Prescaler divides the prescaler clock by 32; glitch filter recognizes change on input pin after 16 rising clock edges.

Prescaler divides the prescaler clock by 64; glitch filter recognizes change on input pin after 32 rising clock edges.

Prescaler divides the prescaler clock by 128; glitch filter recognizes change on input pin after 64 rising clock edges.

Prescaler divides the prescaler clock by 256; glitch filter recognizes change on input pin after 128 rising clock edges.

Prescaler divides the prescaler clock by 512; glitch filter recognizes change on input pin after 256 rising clock edges.

Prescaler divides the prescaler clock by 1024; glitch filter recognizes change on input pin after 512 rising clock edges.

Prescaler divides the prescaler clock by 2048; glitch filter recognizes change on input pin after 1024 rising clock edges.

Prescaler divides the prescaler clock by 4096; glitch filter recognizes change on input pin after 2048 rising clock edges.

Prescaler divides the prescaler clock by 8192; glitch filter recognizes change on input pin after 4096 rising clock edges.

Prescaler divides the prescaler clock by 16,384; glitch filter recognizes change on input pin after 8192 rising clock edges.

Prescaler divides the prescaler clock by 32,768; glitch filter recognizes change on input pin after 16,384 rising clock edges.

Prescaler divides the prescaler clock by 65,536; glitch filter recognizes change on input pin after 32,768 rising clock edges.

Writes raw bits to the field