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#[doc = r" Value read from the register"] pub struct R { bits: u8, } #[doc = r" Value to write to the register"] pub struct W { bits: u8, } impl super::S2 { #[doc = r" Modifies the contents of the register"] #[inline] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); let r = R { bits: bits }; let mut w = W { bits: bits }; f(&r, &mut w); self.register.set(w.bits); } #[doc = r" Reads the contents of the register"] #[inline] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r" Writes to the register"] #[inline] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { let mut w = W::reset_value(); f(&mut w); self.register.set(w.bits); } #[doc = r" Writes the reset value to the register"] #[inline] pub fn reset(&self) { self.write(|w| w) } } #[doc = "Possible values of the field `EMPTY`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum EMPTYR { #[doc = "Tx or Rx buffer is not empty and cannot be written to, that is new data cannot be loaded into the buffer."] _0, #[doc = "Tx or Rx buffer is empty and can be written to, that is new data can be loaded into the buffer."] _1, } impl EMPTYR { #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { match *self { EMPTYR::_0 => false, EMPTYR::_1 => true, } } #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _from(value: bool) -> EMPTYR { match value { false => EMPTYR::_0, true => EMPTYR::_1, } } #[doc = "Checks if the value of the field is `_0`"] #[inline] pub fn is_0(&self) -> bool { *self == EMPTYR::_0 } #[doc = "Checks if the value of the field is `_1`"] #[inline] pub fn is_1(&self) -> bool { *self == EMPTYR::_1 } } #[doc = "Possible values of the field `ERROR`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum ERRORR { #[doc = "The buffer is not full and all write/read operations have no errors."] _0, #[doc = "There are 3 or more write/read errors during the data transfer phase (when the Empty flag is not set and the buffer is busy)."] _1, } impl ERRORR { #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { match *self { ERRORR::_0 => false, ERRORR::_1 => true, } } #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _from(value: bool) -> ERRORR { match value { false => ERRORR::_0, true => ERRORR::_1, } } #[doc = "Checks if the value of the field is `_0`"] #[inline] pub fn is_0(&self) -> bool { *self == ERRORR::_0 } #[doc = "Checks if the value of the field is `_1`"] #[inline] pub fn is_1(&self) -> bool { *self == ERRORR::_1 } } #[doc = "Possible values of the field `DFEN`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum DFENR { #[doc = "Disables the double buffer mode; clock stretch is enabled."] _0, #[doc = "Enables the double buffer mode; clock stretch is disabled. In the slave mode, the I2C will not hold bus between data transfers."] _1, } impl DFENR { #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { match *self { DFENR::_0 => false, DFENR::_1 => true, } } #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _from(value: bool) -> DFENR { match value { false => DFENR::_0, true => DFENR::_1, } } #[doc = "Checks if the value of the field is `_0`"] #[inline] pub fn is_0(&self) -> bool { *self == DFENR::_0 } #[doc = "Checks if the value of the field is `_1`"] #[inline] pub fn is_1(&self) -> bool { *self == DFENR::_1 } } #[doc = "Values that can be written to the field `ERROR`"] pub enum ERRORW { #[doc = "The buffer is not full and all write/read operations have no errors."] _0, #[doc = "There are 3 or more write/read errors during the data transfer phase (when the Empty flag is not set and the buffer is busy)."] _1, } impl ERRORW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { ERRORW::_0 => false, ERRORW::_1 => true, } } } #[doc = r" Proxy"] pub struct _ERRORW<'a> { w: &'a mut W, } impl<'a> _ERRORW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: ERRORW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "The buffer is not full and all write/read operations have no errors."] #[inline] pub fn _0(self) -> &'a mut W { self.variant(ERRORW::_0) } #[doc = "There are 3 or more write/read errors during the data transfer phase (when the Empty flag is not set and the buffer is busy)."] #[inline] pub fn _1(self) -> &'a mut W { self.variant(ERRORW::_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 1; self.w.bits &= !((MASK as u8) << OFFSET); self.w.bits |= ((value & MASK) as u8) << OFFSET; self.w } } #[doc = "Values that can be written to the field `DFEN`"] pub enum DFENW { #[doc = "Disables the double buffer mode; clock stretch is enabled."] _0, #[doc = "Enables the double buffer mode; clock stretch is disabled. In the slave mode, the I2C will not hold bus between data transfers."] _1, } impl DFENW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { DFENW::_0 => false, DFENW::_1 => true, } } } #[doc = r" Proxy"] pub struct _DFENW<'a> { w: &'a mut W, } impl<'a> _DFENW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: DFENW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "Disables the double buffer mode; clock stretch is enabled."] #[inline] pub fn _0(self) -> &'a mut W { self.variant(DFENW::_0) } #[doc = "Enables the double buffer mode; clock stretch is disabled. In the slave mode, the I2C will not hold bus between data transfers."] #[inline] pub fn _1(self) -> &'a mut W { self.variant(DFENW::_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 2; self.w.bits &= !((MASK as u8) << OFFSET); self.w.bits |= ((value & MASK) as u8) << OFFSET; self.w } } impl R { #[doc = r" Value of the register as raw bits"] #[inline] pub fn bits(&self) -> u8 { self.bits } #[doc = "Bit 0 - Empty flag"] #[inline] pub fn empty(&self) -> EMPTYR { EMPTYR::_from({ const MASK: bool = true; const OFFSET: u8 = 0; ((self.bits >> OFFSET) & MASK as u8) != 0 }) } #[doc = "Bit 1 - Error flag"] #[inline] pub fn error(&self) -> ERRORR { ERRORR::_from({ const MASK: bool = true; const OFFSET: u8 = 1; ((self.bits >> OFFSET) & MASK as u8) != 0 }) } #[doc = "Bit 2 - Double Buffer Enable"] #[inline] pub fn dfen(&self) -> DFENR { DFENR::_from({ const MASK: bool = true; const OFFSET: u8 = 2; ((self.bits >> OFFSET) & MASK as u8) != 0 }) } } impl W { #[doc = r" Reset value of the register"] #[inline] pub fn reset_value() -> W { W { bits: 1 } } #[doc = r" Writes raw bits to the register"] #[inline] pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { self.bits = bits; self } #[doc = "Bit 1 - Error flag"] #[inline] pub fn error(&mut self) -> _ERRORW { _ERRORW { w: self } } #[doc = "Bit 2 - Double Buffer Enable"] #[inline] pub fn dfen(&mut self) -> _DFENW { _DFENW { w: self } } }