Type Definition mkl26z4::dma::dcr1::W

type W = W<u32, DCR1>;

Writer for register DCR1

Methods

impl W

pub fn lch2(&mut self) -> LCH2_W

Bits 0:1 - Link Channel 2

pub fn lch1(&mut self) -> LCH1_W

Bits 2:3 - Link Channel 1

pub fn linkcc(&mut self) -> LINKCC_W

Bits 4:5 - Link Channel Control

pub fn d_req(&mut self) -> D_REQ_W

Bit 7 - Disable Request

pub fn dmod(&mut self) -> DMOD_W

Bits 8:11 - Destination Address Modulo

pub fn smod(&mut self) -> SMOD_W

Bits 12:15 - Source Address Modulo

pub fn start(&mut self) -> START_W

Bit 16 - Start Transfer

pub fn dsize(&mut self) -> DSIZE_W

Bits 17:18 - Destination Size

pub fn dinc(&mut self) -> DINC_W

Bit 19 - Destination Increment

pub fn ssize(&mut self) -> SSIZE_W

Bits 20:21 - Source Size

pub fn sinc(&mut self) -> SINC_W

Bit 22 - Source Increment

pub fn eadreq(&mut self) -> EADREQ_W

Bit 23 - Enable asynchronous DMA requests

pub fn aa(&mut self) -> AA_W

Bit 28 - Auto-align

pub fn cs(&mut self) -> CS_W

Bit 29 - Cycle Steal

pub fn erq(&mut self) -> ERQ_W

Bit 30 - Enable Peripheral Request

pub fn eint(&mut self) -> EINT_W

Bit 31 - Enable Interrupt on Completion of Transfer