[][src]Type Definition mkl26z4::dma::dcr1::R

type R = R<u32, DCR1>;

Reader of register DCR1

Methods

impl R[src]

pub fn lch2(&self) -> LCH2_R[src]

Bits 0:1 - Link Channel 2

pub fn lch1(&self) -> LCH1_R[src]

Bits 2:3 - Link Channel 1

pub fn linkcc(&self) -> LINKCC_R[src]

Bits 4:5 - Link Channel Control

pub fn d_req(&self) -> D_REQ_R[src]

Bit 7 - Disable Request

pub fn dmod(&self) -> DMOD_R[src]

Bits 8:11 - Destination Address Modulo

pub fn smod(&self) -> SMOD_R[src]

Bits 12:15 - Source Address Modulo

pub fn dsize(&self) -> DSIZE_R[src]

Bits 17:18 - Destination Size

pub fn dinc(&self) -> DINC_R[src]

Bit 19 - Destination Increment

pub fn ssize(&self) -> SSIZE_R[src]

Bits 20:21 - Source Size

pub fn sinc(&self) -> SINC_R[src]

Bit 22 - Source Increment

pub fn eadreq(&self) -> EADREQ_R[src]

Bit 23 - Enable asynchronous DMA requests

pub fn aa(&self) -> AA_R[src]

Bit 28 - Auto-align

pub fn cs(&self) -> CS_R[src]

Bit 29 - Cycle Steal

pub fn erq(&self) -> ERQ_R[src]

Bit 30 - Enable Peripheral Request

pub fn eint(&self) -> EINT_R[src]

Bit 31 - Enable Interrupt on Completion of Transfer