1#[doc = "Reader of register RPFC"]
2pub type R = crate::R<u8, super::RPFC>;
3#[doc = "Writer for register RPFC"]
4pub type W = crate::W<u8, super::RPFC>;
5#[doc = "Register RPFC `reset()`'s with value 0"]
6impl crate::ResetValue for super::RPFC {
7 type Type = u8;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reset Pin Filter Select in Run and Wait Modes\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum RSTFLTSRW_A {
17 #[doc = "0: All filtering disabled"]
18 _00 = 0,
19 #[doc = "1: Bus clock filter enabled for normal operation"]
20 _01 = 1,
21 #[doc = "2: LPO clock filter enabled for normal operation"]
22 _10 = 2,
23}
24impl From<RSTFLTSRW_A> for u8 {
25 #[inline(always)]
26 fn from(variant: RSTFLTSRW_A) -> Self {
27 variant as _
28 }
29}
30#[doc = "Reader of field `RSTFLTSRW`"]
31pub type RSTFLTSRW_R = crate::R<u8, RSTFLTSRW_A>;
32impl RSTFLTSRW_R {
33 #[doc = r"Get enumerated values variant"]
34 #[inline(always)]
35 pub fn variant(&self) -> crate::Variant<u8, RSTFLTSRW_A> {
36 use crate::Variant::*;
37 match self.bits {
38 0 => Val(RSTFLTSRW_A::_00),
39 1 => Val(RSTFLTSRW_A::_01),
40 2 => Val(RSTFLTSRW_A::_10),
41 i => Res(i),
42 }
43 }
44 #[doc = "Checks if the value of the field is `_00`"]
45 #[inline(always)]
46 pub fn is_00(&self) -> bool {
47 *self == RSTFLTSRW_A::_00
48 }
49 #[doc = "Checks if the value of the field is `_01`"]
50 #[inline(always)]
51 pub fn is_01(&self) -> bool {
52 *self == RSTFLTSRW_A::_01
53 }
54 #[doc = "Checks if the value of the field is `_10`"]
55 #[inline(always)]
56 pub fn is_10(&self) -> bool {
57 *self == RSTFLTSRW_A::_10
58 }
59}
60#[doc = "Write proxy for field `RSTFLTSRW`"]
61pub struct RSTFLTSRW_W<'a> {
62 w: &'a mut W,
63}
64impl<'a> RSTFLTSRW_W<'a> {
65 #[doc = r"Writes `variant` to the field"]
66 #[inline(always)]
67 pub fn variant(self, variant: RSTFLTSRW_A) -> &'a mut W {
68 unsafe { self.bits(variant.into()) }
69 }
70 #[doc = "All filtering disabled"]
71 #[inline(always)]
72 pub fn _00(self) -> &'a mut W {
73 self.variant(RSTFLTSRW_A::_00)
74 }
75 #[doc = "Bus clock filter enabled for normal operation"]
76 #[inline(always)]
77 pub fn _01(self) -> &'a mut W {
78 self.variant(RSTFLTSRW_A::_01)
79 }
80 #[doc = "LPO clock filter enabled for normal operation"]
81 #[inline(always)]
82 pub fn _10(self) -> &'a mut W {
83 self.variant(RSTFLTSRW_A::_10)
84 }
85 #[doc = r"Writes raw bits to the field"]
86 #[inline(always)]
87 pub unsafe fn bits(self, value: u8) -> &'a mut W {
88 self.w.bits = (self.w.bits & !0x03) | ((value as u8) & 0x03);
89 self.w
90 }
91}
92#[doc = "Reset Pin Filter Select in Stop Mode\n\nValue on reset: 0"]
93#[derive(Clone, Copy, Debug, PartialEq)]
94pub enum RSTFLTSS_A {
95 #[doc = "0: All filtering disabled"]
96 _0 = 0,
97 #[doc = "1: LPO clock filter enabled"]
98 _1 = 1,
99}
100impl From<RSTFLTSS_A> for bool {
101 #[inline(always)]
102 fn from(variant: RSTFLTSS_A) -> Self {
103 variant as u8 != 0
104 }
105}
106#[doc = "Reader of field `RSTFLTSS`"]
107pub type RSTFLTSS_R = crate::R<bool, RSTFLTSS_A>;
108impl RSTFLTSS_R {
109 #[doc = r"Get enumerated values variant"]
110 #[inline(always)]
111 pub fn variant(&self) -> RSTFLTSS_A {
112 match self.bits {
113 false => RSTFLTSS_A::_0,
114 true => RSTFLTSS_A::_1,
115 }
116 }
117 #[doc = "Checks if the value of the field is `_0`"]
118 #[inline(always)]
119 pub fn is_0(&self) -> bool {
120 *self == RSTFLTSS_A::_0
121 }
122 #[doc = "Checks if the value of the field is `_1`"]
123 #[inline(always)]
124 pub fn is_1(&self) -> bool {
125 *self == RSTFLTSS_A::_1
126 }
127}
128#[doc = "Write proxy for field `RSTFLTSS`"]
129pub struct RSTFLTSS_W<'a> {
130 w: &'a mut W,
131}
132impl<'a> RSTFLTSS_W<'a> {
133 #[doc = r"Writes `variant` to the field"]
134 #[inline(always)]
135 pub fn variant(self, variant: RSTFLTSS_A) -> &'a mut W {
136 {
137 self.bit(variant.into())
138 }
139 }
140 #[doc = "All filtering disabled"]
141 #[inline(always)]
142 pub fn _0(self) -> &'a mut W {
143 self.variant(RSTFLTSS_A::_0)
144 }
145 #[doc = "LPO clock filter enabled"]
146 #[inline(always)]
147 pub fn _1(self) -> &'a mut W {
148 self.variant(RSTFLTSS_A::_1)
149 }
150 #[doc = r"Sets the field bit"]
151 #[inline(always)]
152 pub fn set_bit(self) -> &'a mut W {
153 self.bit(true)
154 }
155 #[doc = r"Clears the field bit"]
156 #[inline(always)]
157 pub fn clear_bit(self) -> &'a mut W {
158 self.bit(false)
159 }
160 #[doc = r"Writes raw bits to the field"]
161 #[inline(always)]
162 pub fn bit(self, value: bool) -> &'a mut W {
163 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u8) & 0x01) << 2);
164 self.w
165 }
166}
167impl R {
168 #[doc = "Bits 0:1 - Reset Pin Filter Select in Run and Wait Modes"]
169 #[inline(always)]
170 pub fn rstfltsrw(&self) -> RSTFLTSRW_R {
171 RSTFLTSRW_R::new((self.bits & 0x03) as u8)
172 }
173 #[doc = "Bit 2 - Reset Pin Filter Select in Stop Mode"]
174 #[inline(always)]
175 pub fn rstfltss(&self) -> RSTFLTSS_R {
176 RSTFLTSS_R::new(((self.bits >> 2) & 0x01) != 0)
177 }
178}
179impl W {
180 #[doc = "Bits 0:1 - Reset Pin Filter Select in Run and Wait Modes"]
181 #[inline(always)]
182 pub fn rstfltsrw(&mut self) -> RSTFLTSRW_W {
183 RSTFLTSRW_W { w: self }
184 }
185 #[doc = "Bit 2 - Reset Pin Filter Select in Stop Mode"]
186 #[inline(always)]
187 pub fn rstfltss(&mut self) -> RSTFLTSS_W {
188 RSTFLTSS_W { w: self }
189 }
190}