[][src]Type Definition mkl25z4::dma::dcr0::W

type W = W<u32, DCR0>;

Writer for register DCR0

Methods

impl W[src]

pub fn lch2(&mut self) -> LCH2_W[src]

Bits 0:1 - Link channel 2

pub fn lch1(&mut self) -> LCH1_W[src]

Bits 2:3 - Link channel 1

pub fn linkcc(&mut self) -> LINKCC_W[src]

Bits 4:5 - Link channel control

pub fn d_req(&mut self) -> D_REQ_W[src]

Bit 7 - Disable request

pub fn dmod(&mut self) -> DMOD_W[src]

Bits 8:11 - Destination address modulo

pub fn smod(&mut self) -> SMOD_W[src]

Bits 12:15 - Source address modulo

pub fn start(&mut self) -> START_W[src]

Bit 16 - Start transfer

pub fn dsize(&mut self) -> DSIZE_W[src]

Bits 17:18 - Destination size

pub fn dinc(&mut self) -> DINC_W[src]

Bit 19 - Destination increment

pub fn ssize(&mut self) -> SSIZE_W[src]

Bits 20:21 - Source size

pub fn sinc(&mut self) -> SINC_W[src]

Bit 22 - Source increment

pub fn eadreq(&mut self) -> EADREQ_W[src]

Bit 23 - Enable asynchronous DMA requests

pub fn aa(&mut self) -> AA_W[src]

Bit 28 - Auto-align

pub fn cs(&mut self) -> CS_W[src]

Bit 29 - Cycle steal

pub fn erq(&mut self) -> ERQ_W[src]

Bit 30 - Enable peripheral request

pub fn eint(&mut self) -> EINT_W[src]

Bit 31 - Enable interrupt on completion of transfer