[][src]Enum mkl25z4::adc0::sc1::ADCH_A

#[repr(u8)]
pub enum ADCH_A {
    _00000,
    _00001,
    _00010,
    _00011,
    _00100,
    _00101,
    _00110,
    _00111,
    _01000,
    _01001,
    _01010,
    _01011,
    _01100,
    _01101,
    _01110,
    _01111,
    _10000,
    _10001,
    _10010,
    _10011,
    _10100,
    _10101,
    _10110,
    _10111,
    _11010,
    _11011,
    _11101,
    _11110,
    _11111,
}

Input channel select

Value on reset: 31

Variants

_00000

0: When DIFF=0, DADP0 is selected as input; when DIFF=1, DAD0 is selected as input.

_00001

1: When DIFF=0, DADP1 is selected as input; when DIFF=1, DAD1 is selected as input.

_00010

2: When DIFF=0, DADP2 is selected as input; when DIFF=1, DAD2 is selected as input.

_00011

3: When DIFF=0, DADP3 is selected as input; when DIFF=1, DAD3 is selected as input.

_00100

4: When DIFF=0, AD4 is selected as input; when DIFF=1, it is reserved.

_00101

5: When DIFF=0, AD5 is selected as input; when DIFF=1, it is reserved.

_00110

6: When DIFF=0, AD6 is selected as input; when DIFF=1, it is reserved.

_00111

7: When DIFF=0, AD7 is selected as input; when DIFF=1, it is reserved.

_01000

8: When DIFF=0, AD8 is selected as input; when DIFF=1, it is reserved.

_01001

9: When DIFF=0, AD9 is selected as input; when DIFF=1, it is reserved.

_01010

10: When DIFF=0, AD10 is selected as input; when DIFF=1, it is reserved.

_01011

11: When DIFF=0, AD11 is selected as input; when DIFF=1, it is reserved.

_01100

12: When DIFF=0, AD12 is selected as input; when DIFF=1, it is reserved.

_01101

13: When DIFF=0, AD13 is selected as input; when DIFF=1, it is reserved.

_01110

14: When DIFF=0, AD14 is selected as input; when DIFF=1, it is reserved.

_01111

15: When DIFF=0, AD15 is selected as input; when DIFF=1, it is reserved.

_10000

16: When DIFF=0, AD16 is selected as input; when DIFF=1, it is reserved.

_10001

17: When DIFF=0, AD17 is selected as input; when DIFF=1, it is reserved.

_10010

18: When DIFF=0, AD18 is selected as input; when DIFF=1, it is reserved.

_10011

19: When DIFF=0, AD19 is selected as input; when DIFF=1, it is reserved.

_10100

20: When DIFF=0, AD20 is selected as input; when DIFF=1, it is reserved.

_10101

21: When DIFF=0, AD21 is selected as input; when DIFF=1, it is reserved.

_10110

22: When DIFF=0, AD22 is selected as input; when DIFF=1, it is reserved.

_10111

23: When DIFF=0, AD23 is selected as input; when DIFF=1, it is reserved.

_11010

26: When DIFF=0, Temp Sensor (single-ended) is selected as input; when DIFF=1, Temp Sensor (differential) is selected as input.

_11011

27: When DIFF=0, Bandgap (single-ended) is selected as input; when DIFF=1, Bandgap (differential) is selected as input.

_11101

29: When DIFF=0,VREFSH is selected as input; when DIFF=1, -VREFSH (differential) is selected as input. Voltage reference selected is determined by SC2[REFSEL].

_11110

30: When DIFF=0,VREFSL is selected as input; when DIFF=1, it is reserved. Voltage reference selected is determined by SC2[REFSEL].

_11111

31: Module is disabled.

Trait Implementations

impl Clone for ADCH_A[src]

impl Copy for ADCH_A[src]

impl Debug for ADCH_A[src]

impl From<ADCH_A> for u8[src]

impl PartialEq<ADCH_A> for ADCH_A[src]

impl StructuralPartialEq for ADCH_A[src]

Auto Trait Implementations

impl Send for ADCH_A

impl Sync for ADCH_A

impl Unpin for ADCH_A

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.