Type Definition mk66f18::usbphy::pll_sic::W

type W = W<u32, PLL_SIC>;

Writer for register PLL_SIC

Methods

impl W

pub fn pll_div_sel(&mut self) -> PLL_DIV_SEL_W

Bits 0:1 - This field controls the USB PLL feedback loop divider

pub fn pll_en_usb_clks(&mut self) -> PLL_EN_USB_CLKS_W

Bit 6 - Enable the USB clock output from the USB PHY PLL.

pub fn pll_hold_ring_off(&mut self) -> PLL_HOLD_RING_OFF_W

Bit 11 - Analog debug bit

pub fn pll_power(&mut self) -> PLL_POWER_W

Bit 12 - Power up the USB PLL.

pub fn pll_enable(&mut self) -> PLL_ENABLE_W

Bit 13 - Enable the clock output from the USB PLL.

pub fn pll_bypass(&mut self) -> PLL_BYPASS_W

Bit 16 - Bypass the USB PLL.