Type Definition mk66f18::usbphy::pll_sic::R

type R = R<u32, PLL_SIC>;

Reader of register PLL_SIC

Methods

impl R

pub fn pll_div_sel(&self) -> PLL_DIV_SEL_R

Bits 0:1 - This field controls the USB PLL feedback loop divider

pub fn pll_en_usb_clks(&self) -> PLL_EN_USB_CLKS_R

Bit 6 - Enable the USB clock output from the USB PHY PLL.

pub fn pll_hold_ring_off(&self) -> PLL_HOLD_RING_OFF_R

Bit 11 - Analog debug bit

pub fn pll_power(&self) -> PLL_POWER_R

Bit 12 - Power up the USB PLL.

pub fn pll_enable(&self) -> PLL_ENABLE_R

Bit 13 - Enable the clock output from the USB PLL.

pub fn pll_bypass(&self) -> PLL_BYPASS_R

Bit 16 - Bypass the USB PLL.

pub fn pll_lock(&self) -> PLL_LOCK_R

Bit 31 - USB PLL lock status indicator