1#[doc = "Reader of register PCR7"]
2pub type R = crate::R<u32, super::PCR7>;
3#[doc = "Writer for register PCR7"]
4pub type W = crate::W<u32, super::PCR7>;
5#[doc = "Register PCR7 `reset()`'s with value 0"]
6impl crate::ResetValue for super::PCR7 {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Pull Select\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum PS_A {
16 #[doc = "0: Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
17 _0,
18 #[doc = "1: Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
19 _1,
20}
21impl From<PS_A> for bool {
22 #[inline(always)]
23 fn from(variant: PS_A) -> Self {
24 match variant {
25 PS_A::_0 => false,
26 PS_A::_1 => true,
27 }
28 }
29}
30#[doc = "Reader of field `PS`"]
31pub type PS_R = crate::R<bool, PS_A>;
32impl PS_R {
33 #[doc = r"Get enumerated values variant"]
34 #[inline(always)]
35 pub fn variant(&self) -> PS_A {
36 match self.bits {
37 false => PS_A::_0,
38 true => PS_A::_1,
39 }
40 }
41 #[doc = "Checks if the value of the field is `_0`"]
42 #[inline(always)]
43 pub fn is_0(&self) -> bool {
44 *self == PS_A::_0
45 }
46 #[doc = "Checks if the value of the field is `_1`"]
47 #[inline(always)]
48 pub fn is_1(&self) -> bool {
49 *self == PS_A::_1
50 }
51}
52#[doc = "Write proxy for field `PS`"]
53pub struct PS_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> PS_W<'a> {
57 #[doc = r"Writes `variant` to the field"]
58 #[inline(always)]
59 pub fn variant(self, variant: PS_A) -> &'a mut W {
60 {
61 self.bit(variant.into())
62 }
63 }
64 #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
65 #[inline(always)]
66 pub fn _0(self) -> &'a mut W {
67 self.variant(PS_A::_0)
68 }
69 #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
70 #[inline(always)]
71 pub fn _1(self) -> &'a mut W {
72 self.variant(PS_A::_1)
73 }
74 #[doc = r"Sets the field bit"]
75 #[inline(always)]
76 pub fn set_bit(self) -> &'a mut W {
77 self.bit(true)
78 }
79 #[doc = r"Clears the field bit"]
80 #[inline(always)]
81 pub fn clear_bit(self) -> &'a mut W {
82 self.bit(false)
83 }
84 #[doc = r"Writes raw bits to the field"]
85 #[inline(always)]
86 pub fn bit(self, value: bool) -> &'a mut W {
87 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
88 self.w
89 }
90}
91#[doc = "Pull Enable\n\nValue on reset: 0"]
92#[derive(Clone, Copy, Debug, PartialEq)]
93pub enum PE_A {
94 #[doc = "0: Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
95 _0,
96 #[doc = "1: Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
97 _1,
98}
99impl From<PE_A> for bool {
100 #[inline(always)]
101 fn from(variant: PE_A) -> Self {
102 match variant {
103 PE_A::_0 => false,
104 PE_A::_1 => true,
105 }
106 }
107}
108#[doc = "Reader of field `PE`"]
109pub type PE_R = crate::R<bool, PE_A>;
110impl PE_R {
111 #[doc = r"Get enumerated values variant"]
112 #[inline(always)]
113 pub fn variant(&self) -> PE_A {
114 match self.bits {
115 false => PE_A::_0,
116 true => PE_A::_1,
117 }
118 }
119 #[doc = "Checks if the value of the field is `_0`"]
120 #[inline(always)]
121 pub fn is_0(&self) -> bool {
122 *self == PE_A::_0
123 }
124 #[doc = "Checks if the value of the field is `_1`"]
125 #[inline(always)]
126 pub fn is_1(&self) -> bool {
127 *self == PE_A::_1
128 }
129}
130#[doc = "Write proxy for field `PE`"]
131pub struct PE_W<'a> {
132 w: &'a mut W,
133}
134impl<'a> PE_W<'a> {
135 #[doc = r"Writes `variant` to the field"]
136 #[inline(always)]
137 pub fn variant(self, variant: PE_A) -> &'a mut W {
138 {
139 self.bit(variant.into())
140 }
141 }
142 #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
143 #[inline(always)]
144 pub fn _0(self) -> &'a mut W {
145 self.variant(PE_A::_0)
146 }
147 #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
148 #[inline(always)]
149 pub fn _1(self) -> &'a mut W {
150 self.variant(PE_A::_1)
151 }
152 #[doc = r"Sets the field bit"]
153 #[inline(always)]
154 pub fn set_bit(self) -> &'a mut W {
155 self.bit(true)
156 }
157 #[doc = r"Clears the field bit"]
158 #[inline(always)]
159 pub fn clear_bit(self) -> &'a mut W {
160 self.bit(false)
161 }
162 #[doc = r"Writes raw bits to the field"]
163 #[inline(always)]
164 pub fn bit(self, value: bool) -> &'a mut W {
165 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
166 self.w
167 }
168}
169#[doc = "Slew Rate Enable\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq)]
171pub enum SRE_A {
172 #[doc = "0: Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output."]
173 _0,
174 #[doc = "1: Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output."]
175 _1,
176}
177impl From<SRE_A> for bool {
178 #[inline(always)]
179 fn from(variant: SRE_A) -> Self {
180 match variant {
181 SRE_A::_0 => false,
182 SRE_A::_1 => true,
183 }
184 }
185}
186#[doc = "Reader of field `SRE`"]
187pub type SRE_R = crate::R<bool, SRE_A>;
188impl SRE_R {
189 #[doc = r"Get enumerated values variant"]
190 #[inline(always)]
191 pub fn variant(&self) -> SRE_A {
192 match self.bits {
193 false => SRE_A::_0,
194 true => SRE_A::_1,
195 }
196 }
197 #[doc = "Checks if the value of the field is `_0`"]
198 #[inline(always)]
199 pub fn is_0(&self) -> bool {
200 *self == SRE_A::_0
201 }
202 #[doc = "Checks if the value of the field is `_1`"]
203 #[inline(always)]
204 pub fn is_1(&self) -> bool {
205 *self == SRE_A::_1
206 }
207}
208#[doc = "Write proxy for field `SRE`"]
209pub struct SRE_W<'a> {
210 w: &'a mut W,
211}
212impl<'a> SRE_W<'a> {
213 #[doc = r"Writes `variant` to the field"]
214 #[inline(always)]
215 pub fn variant(self, variant: SRE_A) -> &'a mut W {
216 {
217 self.bit(variant.into())
218 }
219 }
220 #[doc = "Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output."]
221 #[inline(always)]
222 pub fn _0(self) -> &'a mut W {
223 self.variant(SRE_A::_0)
224 }
225 #[doc = "Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output."]
226 #[inline(always)]
227 pub fn _1(self) -> &'a mut W {
228 self.variant(SRE_A::_1)
229 }
230 #[doc = r"Sets the field bit"]
231 #[inline(always)]
232 pub fn set_bit(self) -> &'a mut W {
233 self.bit(true)
234 }
235 #[doc = r"Clears the field bit"]
236 #[inline(always)]
237 pub fn clear_bit(self) -> &'a mut W {
238 self.bit(false)
239 }
240 #[doc = r"Writes raw bits to the field"]
241 #[inline(always)]
242 pub fn bit(self, value: bool) -> &'a mut W {
243 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
244 self.w
245 }
246}
247#[doc = "Passive Filter Enable\n\nValue on reset: 0"]
248#[derive(Clone, Copy, Debug, PartialEq)]
249pub enum PFE_A {
250 #[doc = "0: Passive input filter is disabled on the corresponding pin."]
251 _0,
252 #[doc = "1: Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics."]
253 _1,
254}
255impl From<PFE_A> for bool {
256 #[inline(always)]
257 fn from(variant: PFE_A) -> Self {
258 match variant {
259 PFE_A::_0 => false,
260 PFE_A::_1 => true,
261 }
262 }
263}
264#[doc = "Reader of field `PFE`"]
265pub type PFE_R = crate::R<bool, PFE_A>;
266impl PFE_R {
267 #[doc = r"Get enumerated values variant"]
268 #[inline(always)]
269 pub fn variant(&self) -> PFE_A {
270 match self.bits {
271 false => PFE_A::_0,
272 true => PFE_A::_1,
273 }
274 }
275 #[doc = "Checks if the value of the field is `_0`"]
276 #[inline(always)]
277 pub fn is_0(&self) -> bool {
278 *self == PFE_A::_0
279 }
280 #[doc = "Checks if the value of the field is `_1`"]
281 #[inline(always)]
282 pub fn is_1(&self) -> bool {
283 *self == PFE_A::_1
284 }
285}
286#[doc = "Open Drain Enable\n\nValue on reset: 0"]
287#[derive(Clone, Copy, Debug, PartialEq)]
288pub enum ODE_A {
289 #[doc = "0: Open drain output is disabled on the corresponding pin."]
290 _0,
291 #[doc = "1: Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output."]
292 _1,
293}
294impl From<ODE_A> for bool {
295 #[inline(always)]
296 fn from(variant: ODE_A) -> Self {
297 match variant {
298 ODE_A::_0 => false,
299 ODE_A::_1 => true,
300 }
301 }
302}
303#[doc = "Reader of field `ODE`"]
304pub type ODE_R = crate::R<bool, ODE_A>;
305impl ODE_R {
306 #[doc = r"Get enumerated values variant"]
307 #[inline(always)]
308 pub fn variant(&self) -> ODE_A {
309 match self.bits {
310 false => ODE_A::_0,
311 true => ODE_A::_1,
312 }
313 }
314 #[doc = "Checks if the value of the field is `_0`"]
315 #[inline(always)]
316 pub fn is_0(&self) -> bool {
317 *self == ODE_A::_0
318 }
319 #[doc = "Checks if the value of the field is `_1`"]
320 #[inline(always)]
321 pub fn is_1(&self) -> bool {
322 *self == ODE_A::_1
323 }
324}
325#[doc = "Write proxy for field `ODE`"]
326pub struct ODE_W<'a> {
327 w: &'a mut W,
328}
329impl<'a> ODE_W<'a> {
330 #[doc = r"Writes `variant` to the field"]
331 #[inline(always)]
332 pub fn variant(self, variant: ODE_A) -> &'a mut W {
333 {
334 self.bit(variant.into())
335 }
336 }
337 #[doc = "Open drain output is disabled on the corresponding pin."]
338 #[inline(always)]
339 pub fn _0(self) -> &'a mut W {
340 self.variant(ODE_A::_0)
341 }
342 #[doc = "Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output."]
343 #[inline(always)]
344 pub fn _1(self) -> &'a mut W {
345 self.variant(ODE_A::_1)
346 }
347 #[doc = r"Sets the field bit"]
348 #[inline(always)]
349 pub fn set_bit(self) -> &'a mut W {
350 self.bit(true)
351 }
352 #[doc = r"Clears the field bit"]
353 #[inline(always)]
354 pub fn clear_bit(self) -> &'a mut W {
355 self.bit(false)
356 }
357 #[doc = r"Writes raw bits to the field"]
358 #[inline(always)]
359 pub fn bit(self, value: bool) -> &'a mut W {
360 self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
361 self.w
362 }
363}
364#[doc = "Drive Strength Enable\n\nValue on reset: 0"]
365#[derive(Clone, Copy, Debug, PartialEq)]
366pub enum DSE_A {
367 #[doc = "0: Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
368 _0,
369 #[doc = "1: High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
370 _1,
371}
372impl From<DSE_A> for bool {
373 #[inline(always)]
374 fn from(variant: DSE_A) -> Self {
375 match variant {
376 DSE_A::_0 => false,
377 DSE_A::_1 => true,
378 }
379 }
380}
381#[doc = "Reader of field `DSE`"]
382pub type DSE_R = crate::R<bool, DSE_A>;
383impl DSE_R {
384 #[doc = r"Get enumerated values variant"]
385 #[inline(always)]
386 pub fn variant(&self) -> DSE_A {
387 match self.bits {
388 false => DSE_A::_0,
389 true => DSE_A::_1,
390 }
391 }
392 #[doc = "Checks if the value of the field is `_0`"]
393 #[inline(always)]
394 pub fn is_0(&self) -> bool {
395 *self == DSE_A::_0
396 }
397 #[doc = "Checks if the value of the field is `_1`"]
398 #[inline(always)]
399 pub fn is_1(&self) -> bool {
400 *self == DSE_A::_1
401 }
402}
403#[doc = "Write proxy for field `DSE`"]
404pub struct DSE_W<'a> {
405 w: &'a mut W,
406}
407impl<'a> DSE_W<'a> {
408 #[doc = r"Writes `variant` to the field"]
409 #[inline(always)]
410 pub fn variant(self, variant: DSE_A) -> &'a mut W {
411 {
412 self.bit(variant.into())
413 }
414 }
415 #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
416 #[inline(always)]
417 pub fn _0(self) -> &'a mut W {
418 self.variant(DSE_A::_0)
419 }
420 #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
421 #[inline(always)]
422 pub fn _1(self) -> &'a mut W {
423 self.variant(DSE_A::_1)
424 }
425 #[doc = r"Sets the field bit"]
426 #[inline(always)]
427 pub fn set_bit(self) -> &'a mut W {
428 self.bit(true)
429 }
430 #[doc = r"Clears the field bit"]
431 #[inline(always)]
432 pub fn clear_bit(self) -> &'a mut W {
433 self.bit(false)
434 }
435 #[doc = r"Writes raw bits to the field"]
436 #[inline(always)]
437 pub fn bit(self, value: bool) -> &'a mut W {
438 self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
439 self.w
440 }
441}
442#[doc = "Pin Mux Control\n\nValue on reset: 0"]
443#[derive(Clone, Copy, Debug, PartialEq)]
444pub enum MUX_A {
445 #[doc = "0: Pin disabled (analog)."]
446 _000,
447 #[doc = "1: Alternative 1 (GPIO)."]
448 _001,
449 #[doc = "2: Alternative 2 (chip-specific)."]
450 _010,
451 #[doc = "3: Alternative 3 (chip-specific)."]
452 _011,
453 #[doc = "4: Alternative 4 (chip-specific)."]
454 _100,
455 #[doc = "5: Alternative 5 (chip-specific)."]
456 _101,
457 #[doc = "6: Alternative 6 (chip-specific)."]
458 _110,
459 #[doc = "7: Alternative 7 (chip-specific)."]
460 _111,
461}
462impl From<MUX_A> for u8 {
463 #[inline(always)]
464 fn from(variant: MUX_A) -> Self {
465 match variant {
466 MUX_A::_000 => 0,
467 MUX_A::_001 => 1,
468 MUX_A::_010 => 2,
469 MUX_A::_011 => 3,
470 MUX_A::_100 => 4,
471 MUX_A::_101 => 5,
472 MUX_A::_110 => 6,
473 MUX_A::_111 => 7,
474 }
475 }
476}
477#[doc = "Reader of field `MUX`"]
478pub type MUX_R = crate::R<u8, MUX_A>;
479impl MUX_R {
480 #[doc = r"Get enumerated values variant"]
481 #[inline(always)]
482 pub fn variant(&self) -> MUX_A {
483 match self.bits {
484 0 => MUX_A::_000,
485 1 => MUX_A::_001,
486 2 => MUX_A::_010,
487 3 => MUX_A::_011,
488 4 => MUX_A::_100,
489 5 => MUX_A::_101,
490 6 => MUX_A::_110,
491 7 => MUX_A::_111,
492 _ => unreachable!(),
493 }
494 }
495 #[doc = "Checks if the value of the field is `_000`"]
496 #[inline(always)]
497 pub fn is_000(&self) -> bool {
498 *self == MUX_A::_000
499 }
500 #[doc = "Checks if the value of the field is `_001`"]
501 #[inline(always)]
502 pub fn is_001(&self) -> bool {
503 *self == MUX_A::_001
504 }
505 #[doc = "Checks if the value of the field is `_010`"]
506 #[inline(always)]
507 pub fn is_010(&self) -> bool {
508 *self == MUX_A::_010
509 }
510 #[doc = "Checks if the value of the field is `_011`"]
511 #[inline(always)]
512 pub fn is_011(&self) -> bool {
513 *self == MUX_A::_011
514 }
515 #[doc = "Checks if the value of the field is `_100`"]
516 #[inline(always)]
517 pub fn is_100(&self) -> bool {
518 *self == MUX_A::_100
519 }
520 #[doc = "Checks if the value of the field is `_101`"]
521 #[inline(always)]
522 pub fn is_101(&self) -> bool {
523 *self == MUX_A::_101
524 }
525 #[doc = "Checks if the value of the field is `_110`"]
526 #[inline(always)]
527 pub fn is_110(&self) -> bool {
528 *self == MUX_A::_110
529 }
530 #[doc = "Checks if the value of the field is `_111`"]
531 #[inline(always)]
532 pub fn is_111(&self) -> bool {
533 *self == MUX_A::_111
534 }
535}
536#[doc = "Write proxy for field `MUX`"]
537pub struct MUX_W<'a> {
538 w: &'a mut W,
539}
540impl<'a> MUX_W<'a> {
541 #[doc = r"Writes `variant` to the field"]
542 #[inline(always)]
543 pub fn variant(self, variant: MUX_A) -> &'a mut W {
544 {
545 self.bits(variant.into())
546 }
547 }
548 #[doc = "Pin disabled (analog)."]
549 #[inline(always)]
550 pub fn _000(self) -> &'a mut W {
551 self.variant(MUX_A::_000)
552 }
553 #[doc = "Alternative 1 (GPIO)."]
554 #[inline(always)]
555 pub fn _001(self) -> &'a mut W {
556 self.variant(MUX_A::_001)
557 }
558 #[doc = "Alternative 2 (chip-specific)."]
559 #[inline(always)]
560 pub fn _010(self) -> &'a mut W {
561 self.variant(MUX_A::_010)
562 }
563 #[doc = "Alternative 3 (chip-specific)."]
564 #[inline(always)]
565 pub fn _011(self) -> &'a mut W {
566 self.variant(MUX_A::_011)
567 }
568 #[doc = "Alternative 4 (chip-specific)."]
569 #[inline(always)]
570 pub fn _100(self) -> &'a mut W {
571 self.variant(MUX_A::_100)
572 }
573 #[doc = "Alternative 5 (chip-specific)."]
574 #[inline(always)]
575 pub fn _101(self) -> &'a mut W {
576 self.variant(MUX_A::_101)
577 }
578 #[doc = "Alternative 6 (chip-specific)."]
579 #[inline(always)]
580 pub fn _110(self) -> &'a mut W {
581 self.variant(MUX_A::_110)
582 }
583 #[doc = "Alternative 7 (chip-specific)."]
584 #[inline(always)]
585 pub fn _111(self) -> &'a mut W {
586 self.variant(MUX_A::_111)
587 }
588 #[doc = r"Writes raw bits to the field"]
589 #[inline(always)]
590 pub fn bits(self, value: u8) -> &'a mut W {
591 self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u32) & 0x07) << 8);
592 self.w
593 }
594}
595#[doc = "Lock Register\n\nValue on reset: 0"]
596#[derive(Clone, Copy, Debug, PartialEq)]
597pub enum LK_A {
598 #[doc = "0: Pin Control Register fields \\[15:0\\] are not locked."]
599 _0,
600 #[doc = "1: Pin Control Register fields \\[15:0\\] are locked and cannot be updated until the next system reset."]
601 _1,
602}
603impl From<LK_A> for bool {
604 #[inline(always)]
605 fn from(variant: LK_A) -> Self {
606 match variant {
607 LK_A::_0 => false,
608 LK_A::_1 => true,
609 }
610 }
611}
612#[doc = "Reader of field `LK`"]
613pub type LK_R = crate::R<bool, LK_A>;
614impl LK_R {
615 #[doc = r"Get enumerated values variant"]
616 #[inline(always)]
617 pub fn variant(&self) -> LK_A {
618 match self.bits {
619 false => LK_A::_0,
620 true => LK_A::_1,
621 }
622 }
623 #[doc = "Checks if the value of the field is `_0`"]
624 #[inline(always)]
625 pub fn is_0(&self) -> bool {
626 *self == LK_A::_0
627 }
628 #[doc = "Checks if the value of the field is `_1`"]
629 #[inline(always)]
630 pub fn is_1(&self) -> bool {
631 *self == LK_A::_1
632 }
633}
634#[doc = "Write proxy for field `LK`"]
635pub struct LK_W<'a> {
636 w: &'a mut W,
637}
638impl<'a> LK_W<'a> {
639 #[doc = r"Writes `variant` to the field"]
640 #[inline(always)]
641 pub fn variant(self, variant: LK_A) -> &'a mut W {
642 {
643 self.bit(variant.into())
644 }
645 }
646 #[doc = "Pin Control Register fields \\[15:0\\] are not locked."]
647 #[inline(always)]
648 pub fn _0(self) -> &'a mut W {
649 self.variant(LK_A::_0)
650 }
651 #[doc = "Pin Control Register fields \\[15:0\\] are locked and cannot be updated until the next system reset."]
652 #[inline(always)]
653 pub fn _1(self) -> &'a mut W {
654 self.variant(LK_A::_1)
655 }
656 #[doc = r"Sets the field bit"]
657 #[inline(always)]
658 pub fn set_bit(self) -> &'a mut W {
659 self.bit(true)
660 }
661 #[doc = r"Clears the field bit"]
662 #[inline(always)]
663 pub fn clear_bit(self) -> &'a mut W {
664 self.bit(false)
665 }
666 #[doc = r"Writes raw bits to the field"]
667 #[inline(always)]
668 pub fn bit(self, value: bool) -> &'a mut W {
669 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
670 self.w
671 }
672}
673#[doc = "Interrupt Configuration\n\nValue on reset: 0"]
674#[derive(Clone, Copy, Debug, PartialEq)]
675pub enum IRQC_A {
676 #[doc = "0: Interrupt Status Flag (ISF) is disabled."]
677 _0000,
678 #[doc = "1: ISF flag and DMA request on rising edge."]
679 _0001,
680 #[doc = "2: ISF flag and DMA request on falling edge."]
681 _0010,
682 #[doc = "3: ISF flag and DMA request on either edge."]
683 _0011,
684 #[doc = "8: ISF flag and Interrupt when logic 0."]
685 _1000,
686 #[doc = "9: ISF flag and Interrupt on rising-edge."]
687 _1001,
688 #[doc = "10: ISF flag and Interrupt on falling-edge."]
689 _1010,
690 #[doc = "11: ISF flag and Interrupt on either edge."]
691 _1011,
692 #[doc = "12: ISF flag and Interrupt when logic 1."]
693 _1100,
694}
695impl From<IRQC_A> for u8 {
696 #[inline(always)]
697 fn from(variant: IRQC_A) -> Self {
698 match variant {
699 IRQC_A::_0000 => 0,
700 IRQC_A::_0001 => 1,
701 IRQC_A::_0010 => 2,
702 IRQC_A::_0011 => 3,
703 IRQC_A::_1000 => 8,
704 IRQC_A::_1001 => 9,
705 IRQC_A::_1010 => 10,
706 IRQC_A::_1011 => 11,
707 IRQC_A::_1100 => 12,
708 }
709 }
710}
711#[doc = "Reader of field `IRQC`"]
712pub type IRQC_R = crate::R<u8, IRQC_A>;
713impl IRQC_R {
714 #[doc = r"Get enumerated values variant"]
715 #[inline(always)]
716 pub fn variant(&self) -> crate::Variant<u8, IRQC_A> {
717 use crate::Variant::*;
718 match self.bits {
719 0 => Val(IRQC_A::_0000),
720 1 => Val(IRQC_A::_0001),
721 2 => Val(IRQC_A::_0010),
722 3 => Val(IRQC_A::_0011),
723 8 => Val(IRQC_A::_1000),
724 9 => Val(IRQC_A::_1001),
725 10 => Val(IRQC_A::_1010),
726 11 => Val(IRQC_A::_1011),
727 12 => Val(IRQC_A::_1100),
728 i => Res(i),
729 }
730 }
731 #[doc = "Checks if the value of the field is `_0000`"]
732 #[inline(always)]
733 pub fn is_0000(&self) -> bool {
734 *self == IRQC_A::_0000
735 }
736 #[doc = "Checks if the value of the field is `_0001`"]
737 #[inline(always)]
738 pub fn is_0001(&self) -> bool {
739 *self == IRQC_A::_0001
740 }
741 #[doc = "Checks if the value of the field is `_0010`"]
742 #[inline(always)]
743 pub fn is_0010(&self) -> bool {
744 *self == IRQC_A::_0010
745 }
746 #[doc = "Checks if the value of the field is `_0011`"]
747 #[inline(always)]
748 pub fn is_0011(&self) -> bool {
749 *self == IRQC_A::_0011
750 }
751 #[doc = "Checks if the value of the field is `_1000`"]
752 #[inline(always)]
753 pub fn is_1000(&self) -> bool {
754 *self == IRQC_A::_1000
755 }
756 #[doc = "Checks if the value of the field is `_1001`"]
757 #[inline(always)]
758 pub fn is_1001(&self) -> bool {
759 *self == IRQC_A::_1001
760 }
761 #[doc = "Checks if the value of the field is `_1010`"]
762 #[inline(always)]
763 pub fn is_1010(&self) -> bool {
764 *self == IRQC_A::_1010
765 }
766 #[doc = "Checks if the value of the field is `_1011`"]
767 #[inline(always)]
768 pub fn is_1011(&self) -> bool {
769 *self == IRQC_A::_1011
770 }
771 #[doc = "Checks if the value of the field is `_1100`"]
772 #[inline(always)]
773 pub fn is_1100(&self) -> bool {
774 *self == IRQC_A::_1100
775 }
776}
777#[doc = "Write proxy for field `IRQC`"]
778pub struct IRQC_W<'a> {
779 w: &'a mut W,
780}
781impl<'a> IRQC_W<'a> {
782 #[doc = r"Writes `variant` to the field"]
783 #[inline(always)]
784 pub fn variant(self, variant: IRQC_A) -> &'a mut W {
785 unsafe { self.bits(variant.into()) }
786 }
787 #[doc = "Interrupt Status Flag (ISF) is disabled."]
788 #[inline(always)]
789 pub fn _0000(self) -> &'a mut W {
790 self.variant(IRQC_A::_0000)
791 }
792 #[doc = "ISF flag and DMA request on rising edge."]
793 #[inline(always)]
794 pub fn _0001(self) -> &'a mut W {
795 self.variant(IRQC_A::_0001)
796 }
797 #[doc = "ISF flag and DMA request on falling edge."]
798 #[inline(always)]
799 pub fn _0010(self) -> &'a mut W {
800 self.variant(IRQC_A::_0010)
801 }
802 #[doc = "ISF flag and DMA request on either edge."]
803 #[inline(always)]
804 pub fn _0011(self) -> &'a mut W {
805 self.variant(IRQC_A::_0011)
806 }
807 #[doc = "ISF flag and Interrupt when logic 0."]
808 #[inline(always)]
809 pub fn _1000(self) -> &'a mut W {
810 self.variant(IRQC_A::_1000)
811 }
812 #[doc = "ISF flag and Interrupt on rising-edge."]
813 #[inline(always)]
814 pub fn _1001(self) -> &'a mut W {
815 self.variant(IRQC_A::_1001)
816 }
817 #[doc = "ISF flag and Interrupt on falling-edge."]
818 #[inline(always)]
819 pub fn _1010(self) -> &'a mut W {
820 self.variant(IRQC_A::_1010)
821 }
822 #[doc = "ISF flag and Interrupt on either edge."]
823 #[inline(always)]
824 pub fn _1011(self) -> &'a mut W {
825 self.variant(IRQC_A::_1011)
826 }
827 #[doc = "ISF flag and Interrupt when logic 1."]
828 #[inline(always)]
829 pub fn _1100(self) -> &'a mut W {
830 self.variant(IRQC_A::_1100)
831 }
832 #[doc = r"Writes raw bits to the field"]
833 #[inline(always)]
834 pub unsafe fn bits(self, value: u8) -> &'a mut W {
835 self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
836 self.w
837 }
838}
839#[doc = "Interrupt Status Flag\n\nValue on reset: 0"]
840#[derive(Clone, Copy, Debug, PartialEq)]
841pub enum ISF_A {
842 #[doc = "0: Configured interrupt is not detected."]
843 _0,
844 #[doc = "1: Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
845 _1,
846}
847impl From<ISF_A> for bool {
848 #[inline(always)]
849 fn from(variant: ISF_A) -> Self {
850 match variant {
851 ISF_A::_0 => false,
852 ISF_A::_1 => true,
853 }
854 }
855}
856#[doc = "Reader of field `ISF`"]
857pub type ISF_R = crate::R<bool, ISF_A>;
858impl ISF_R {
859 #[doc = r"Get enumerated values variant"]
860 #[inline(always)]
861 pub fn variant(&self) -> ISF_A {
862 match self.bits {
863 false => ISF_A::_0,
864 true => ISF_A::_1,
865 }
866 }
867 #[doc = "Checks if the value of the field is `_0`"]
868 #[inline(always)]
869 pub fn is_0(&self) -> bool {
870 *self == ISF_A::_0
871 }
872 #[doc = "Checks if the value of the field is `_1`"]
873 #[inline(always)]
874 pub fn is_1(&self) -> bool {
875 *self == ISF_A::_1
876 }
877}
878#[doc = "Write proxy for field `ISF`"]
879pub struct ISF_W<'a> {
880 w: &'a mut W,
881}
882impl<'a> ISF_W<'a> {
883 #[doc = r"Writes `variant` to the field"]
884 #[inline(always)]
885 pub fn variant(self, variant: ISF_A) -> &'a mut W {
886 {
887 self.bit(variant.into())
888 }
889 }
890 #[doc = "Configured interrupt is not detected."]
891 #[inline(always)]
892 pub fn _0(self) -> &'a mut W {
893 self.variant(ISF_A::_0)
894 }
895 #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
896 #[inline(always)]
897 pub fn _1(self) -> &'a mut W {
898 self.variant(ISF_A::_1)
899 }
900 #[doc = r"Sets the field bit"]
901 #[inline(always)]
902 pub fn set_bit(self) -> &'a mut W {
903 self.bit(true)
904 }
905 #[doc = r"Clears the field bit"]
906 #[inline(always)]
907 pub fn clear_bit(self) -> &'a mut W {
908 self.bit(false)
909 }
910 #[doc = r"Writes raw bits to the field"]
911 #[inline(always)]
912 pub fn bit(self, value: bool) -> &'a mut W {
913 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
914 self.w
915 }
916}
917impl R {
918 #[doc = "Bit 0 - Pull Select"]
919 #[inline(always)]
920 pub fn ps(&self) -> PS_R {
921 PS_R::new((self.bits & 0x01) != 0)
922 }
923 #[doc = "Bit 1 - Pull Enable"]
924 #[inline(always)]
925 pub fn pe(&self) -> PE_R {
926 PE_R::new(((self.bits >> 1) & 0x01) != 0)
927 }
928 #[doc = "Bit 2 - Slew Rate Enable"]
929 #[inline(always)]
930 pub fn sre(&self) -> SRE_R {
931 SRE_R::new(((self.bits >> 2) & 0x01) != 0)
932 }
933 #[doc = "Bit 4 - Passive Filter Enable"]
934 #[inline(always)]
935 pub fn pfe(&self) -> PFE_R {
936 PFE_R::new(((self.bits >> 4) & 0x01) != 0)
937 }
938 #[doc = "Bit 5 - Open Drain Enable"]
939 #[inline(always)]
940 pub fn ode(&self) -> ODE_R {
941 ODE_R::new(((self.bits >> 5) & 0x01) != 0)
942 }
943 #[doc = "Bit 6 - Drive Strength Enable"]
944 #[inline(always)]
945 pub fn dse(&self) -> DSE_R {
946 DSE_R::new(((self.bits >> 6) & 0x01) != 0)
947 }
948 #[doc = "Bits 8:10 - Pin Mux Control"]
949 #[inline(always)]
950 pub fn mux(&self) -> MUX_R {
951 MUX_R::new(((self.bits >> 8) & 0x07) as u8)
952 }
953 #[doc = "Bit 15 - Lock Register"]
954 #[inline(always)]
955 pub fn lk(&self) -> LK_R {
956 LK_R::new(((self.bits >> 15) & 0x01) != 0)
957 }
958 #[doc = "Bits 16:19 - Interrupt Configuration"]
959 #[inline(always)]
960 pub fn irqc(&self) -> IRQC_R {
961 IRQC_R::new(((self.bits >> 16) & 0x0f) as u8)
962 }
963 #[doc = "Bit 24 - Interrupt Status Flag"]
964 #[inline(always)]
965 pub fn isf(&self) -> ISF_R {
966 ISF_R::new(((self.bits >> 24) & 0x01) != 0)
967 }
968}
969impl W {
970 #[doc = "Bit 0 - Pull Select"]
971 #[inline(always)]
972 pub fn ps(&mut self) -> PS_W {
973 PS_W { w: self }
974 }
975 #[doc = "Bit 1 - Pull Enable"]
976 #[inline(always)]
977 pub fn pe(&mut self) -> PE_W {
978 PE_W { w: self }
979 }
980 #[doc = "Bit 2 - Slew Rate Enable"]
981 #[inline(always)]
982 pub fn sre(&mut self) -> SRE_W {
983 SRE_W { w: self }
984 }
985 #[doc = "Bit 5 - Open Drain Enable"]
986 #[inline(always)]
987 pub fn ode(&mut self) -> ODE_W {
988 ODE_W { w: self }
989 }
990 #[doc = "Bit 6 - Drive Strength Enable"]
991 #[inline(always)]
992 pub fn dse(&mut self) -> DSE_W {
993 DSE_W { w: self }
994 }
995 #[doc = "Bits 8:10 - Pin Mux Control"]
996 #[inline(always)]
997 pub fn mux(&mut self) -> MUX_W {
998 MUX_W { w: self }
999 }
1000 #[doc = "Bit 15 - Lock Register"]
1001 #[inline(always)]
1002 pub fn lk(&mut self) -> LK_W {
1003 LK_W { w: self }
1004 }
1005 #[doc = "Bits 16:19 - Interrupt Configuration"]
1006 #[inline(always)]
1007 pub fn irqc(&mut self) -> IRQC_W {
1008 IRQC_W { w: self }
1009 }
1010 #[doc = "Bit 24 - Interrupt Status Flag"]
1011 #[inline(always)]
1012 pub fn isf(&mut self) -> ISF_W {
1013 ISF_W { w: self }
1014 }
1015}