mk66f18/cmt/
msc.rs

1#[doc = "Reader of register MSC"]
2pub type R = crate::R<u8, super::MSC>;
3#[doc = "Writer for register MSC"]
4pub type W = crate::W<u8, super::MSC>;
5#[doc = "Register MSC `reset()`'s with value 0"]
6impl crate::ResetValue for super::MSC {
7    type Type = u8;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Modulator and Carrier Generator Enable\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum MCGEN_A {
16    #[doc = "0: Modulator and carrier generator disabled"]
17    _0,
18    #[doc = "1: Modulator and carrier generator enabled"]
19    _1,
20}
21impl From<MCGEN_A> for bool {
22    #[inline(always)]
23    fn from(variant: MCGEN_A) -> Self {
24        match variant {
25            MCGEN_A::_0 => false,
26            MCGEN_A::_1 => true,
27        }
28    }
29}
30#[doc = "Reader of field `MCGEN`"]
31pub type MCGEN_R = crate::R<bool, MCGEN_A>;
32impl MCGEN_R {
33    #[doc = r"Get enumerated values variant"]
34    #[inline(always)]
35    pub fn variant(&self) -> MCGEN_A {
36        match self.bits {
37            false => MCGEN_A::_0,
38            true => MCGEN_A::_1,
39        }
40    }
41    #[doc = "Checks if the value of the field is `_0`"]
42    #[inline(always)]
43    pub fn is_0(&self) -> bool {
44        *self == MCGEN_A::_0
45    }
46    #[doc = "Checks if the value of the field is `_1`"]
47    #[inline(always)]
48    pub fn is_1(&self) -> bool {
49        *self == MCGEN_A::_1
50    }
51}
52#[doc = "Write proxy for field `MCGEN`"]
53pub struct MCGEN_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> MCGEN_W<'a> {
57    #[doc = r"Writes `variant` to the field"]
58    #[inline(always)]
59    pub fn variant(self, variant: MCGEN_A) -> &'a mut W {
60        {
61            self.bit(variant.into())
62        }
63    }
64    #[doc = "Modulator and carrier generator disabled"]
65    #[inline(always)]
66    pub fn _0(self) -> &'a mut W {
67        self.variant(MCGEN_A::_0)
68    }
69    #[doc = "Modulator and carrier generator enabled"]
70    #[inline(always)]
71    pub fn _1(self) -> &'a mut W {
72        self.variant(MCGEN_A::_1)
73    }
74    #[doc = r"Sets the field bit"]
75    #[inline(always)]
76    pub fn set_bit(self) -> &'a mut W {
77        self.bit(true)
78    }
79    #[doc = r"Clears the field bit"]
80    #[inline(always)]
81    pub fn clear_bit(self) -> &'a mut W {
82        self.bit(false)
83    }
84    #[doc = r"Writes raw bits to the field"]
85    #[inline(always)]
86    pub fn bit(self, value: bool) -> &'a mut W {
87        self.w.bits = (self.w.bits & !0x01) | ((value as u8) & 0x01);
88        self.w
89    }
90}
91#[doc = "End of Cycle Interrupt Enable\n\nValue on reset: 0"]
92#[derive(Clone, Copy, Debug, PartialEq)]
93pub enum EOCIE_A {
94    #[doc = "0: CPU interrupt is disabled."]
95    _0,
96    #[doc = "1: CPU interrupt is enabled."]
97    _1,
98}
99impl From<EOCIE_A> for bool {
100    #[inline(always)]
101    fn from(variant: EOCIE_A) -> Self {
102        match variant {
103            EOCIE_A::_0 => false,
104            EOCIE_A::_1 => true,
105        }
106    }
107}
108#[doc = "Reader of field `EOCIE`"]
109pub type EOCIE_R = crate::R<bool, EOCIE_A>;
110impl EOCIE_R {
111    #[doc = r"Get enumerated values variant"]
112    #[inline(always)]
113    pub fn variant(&self) -> EOCIE_A {
114        match self.bits {
115            false => EOCIE_A::_0,
116            true => EOCIE_A::_1,
117        }
118    }
119    #[doc = "Checks if the value of the field is `_0`"]
120    #[inline(always)]
121    pub fn is_0(&self) -> bool {
122        *self == EOCIE_A::_0
123    }
124    #[doc = "Checks if the value of the field is `_1`"]
125    #[inline(always)]
126    pub fn is_1(&self) -> bool {
127        *self == EOCIE_A::_1
128    }
129}
130#[doc = "Write proxy for field `EOCIE`"]
131pub struct EOCIE_W<'a> {
132    w: &'a mut W,
133}
134impl<'a> EOCIE_W<'a> {
135    #[doc = r"Writes `variant` to the field"]
136    #[inline(always)]
137    pub fn variant(self, variant: EOCIE_A) -> &'a mut W {
138        {
139            self.bit(variant.into())
140        }
141    }
142    #[doc = "CPU interrupt is disabled."]
143    #[inline(always)]
144    pub fn _0(self) -> &'a mut W {
145        self.variant(EOCIE_A::_0)
146    }
147    #[doc = "CPU interrupt is enabled."]
148    #[inline(always)]
149    pub fn _1(self) -> &'a mut W {
150        self.variant(EOCIE_A::_1)
151    }
152    #[doc = r"Sets the field bit"]
153    #[inline(always)]
154    pub fn set_bit(self) -> &'a mut W {
155        self.bit(true)
156    }
157    #[doc = r"Clears the field bit"]
158    #[inline(always)]
159    pub fn clear_bit(self) -> &'a mut W {
160        self.bit(false)
161    }
162    #[doc = r"Writes raw bits to the field"]
163    #[inline(always)]
164    pub fn bit(self, value: bool) -> &'a mut W {
165        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u8) & 0x01) << 1);
166        self.w
167    }
168}
169#[doc = "FSK Mode Select\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq)]
171pub enum FSK_A {
172    #[doc = "0: The CMT operates in Time or Baseband mode."]
173    _0,
174    #[doc = "1: The CMT operates in FSK mode."]
175    _1,
176}
177impl From<FSK_A> for bool {
178    #[inline(always)]
179    fn from(variant: FSK_A) -> Self {
180        match variant {
181            FSK_A::_0 => false,
182            FSK_A::_1 => true,
183        }
184    }
185}
186#[doc = "Reader of field `FSK`"]
187pub type FSK_R = crate::R<bool, FSK_A>;
188impl FSK_R {
189    #[doc = r"Get enumerated values variant"]
190    #[inline(always)]
191    pub fn variant(&self) -> FSK_A {
192        match self.bits {
193            false => FSK_A::_0,
194            true => FSK_A::_1,
195        }
196    }
197    #[doc = "Checks if the value of the field is `_0`"]
198    #[inline(always)]
199    pub fn is_0(&self) -> bool {
200        *self == FSK_A::_0
201    }
202    #[doc = "Checks if the value of the field is `_1`"]
203    #[inline(always)]
204    pub fn is_1(&self) -> bool {
205        *self == FSK_A::_1
206    }
207}
208#[doc = "Write proxy for field `FSK`"]
209pub struct FSK_W<'a> {
210    w: &'a mut W,
211}
212impl<'a> FSK_W<'a> {
213    #[doc = r"Writes `variant` to the field"]
214    #[inline(always)]
215    pub fn variant(self, variant: FSK_A) -> &'a mut W {
216        {
217            self.bit(variant.into())
218        }
219    }
220    #[doc = "The CMT operates in Time or Baseband mode."]
221    #[inline(always)]
222    pub fn _0(self) -> &'a mut W {
223        self.variant(FSK_A::_0)
224    }
225    #[doc = "The CMT operates in FSK mode."]
226    #[inline(always)]
227    pub fn _1(self) -> &'a mut W {
228        self.variant(FSK_A::_1)
229    }
230    #[doc = r"Sets the field bit"]
231    #[inline(always)]
232    pub fn set_bit(self) -> &'a mut W {
233        self.bit(true)
234    }
235    #[doc = r"Clears the field bit"]
236    #[inline(always)]
237    pub fn clear_bit(self) -> &'a mut W {
238        self.bit(false)
239    }
240    #[doc = r"Writes raw bits to the field"]
241    #[inline(always)]
242    pub fn bit(self, value: bool) -> &'a mut W {
243        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u8) & 0x01) << 2);
244        self.w
245    }
246}
247#[doc = "Baseband Enable\n\nValue on reset: 0"]
248#[derive(Clone, Copy, Debug, PartialEq)]
249pub enum BASE_A {
250    #[doc = "0: Baseband mode is disabled."]
251    _0,
252    #[doc = "1: Baseband mode is enabled."]
253    _1,
254}
255impl From<BASE_A> for bool {
256    #[inline(always)]
257    fn from(variant: BASE_A) -> Self {
258        match variant {
259            BASE_A::_0 => false,
260            BASE_A::_1 => true,
261        }
262    }
263}
264#[doc = "Reader of field `BASE`"]
265pub type BASE_R = crate::R<bool, BASE_A>;
266impl BASE_R {
267    #[doc = r"Get enumerated values variant"]
268    #[inline(always)]
269    pub fn variant(&self) -> BASE_A {
270        match self.bits {
271            false => BASE_A::_0,
272            true => BASE_A::_1,
273        }
274    }
275    #[doc = "Checks if the value of the field is `_0`"]
276    #[inline(always)]
277    pub fn is_0(&self) -> bool {
278        *self == BASE_A::_0
279    }
280    #[doc = "Checks if the value of the field is `_1`"]
281    #[inline(always)]
282    pub fn is_1(&self) -> bool {
283        *self == BASE_A::_1
284    }
285}
286#[doc = "Write proxy for field `BASE`"]
287pub struct BASE_W<'a> {
288    w: &'a mut W,
289}
290impl<'a> BASE_W<'a> {
291    #[doc = r"Writes `variant` to the field"]
292    #[inline(always)]
293    pub fn variant(self, variant: BASE_A) -> &'a mut W {
294        {
295            self.bit(variant.into())
296        }
297    }
298    #[doc = "Baseband mode is disabled."]
299    #[inline(always)]
300    pub fn _0(self) -> &'a mut W {
301        self.variant(BASE_A::_0)
302    }
303    #[doc = "Baseband mode is enabled."]
304    #[inline(always)]
305    pub fn _1(self) -> &'a mut W {
306        self.variant(BASE_A::_1)
307    }
308    #[doc = r"Sets the field bit"]
309    #[inline(always)]
310    pub fn set_bit(self) -> &'a mut W {
311        self.bit(true)
312    }
313    #[doc = r"Clears the field bit"]
314    #[inline(always)]
315    pub fn clear_bit(self) -> &'a mut W {
316        self.bit(false)
317    }
318    #[doc = r"Writes raw bits to the field"]
319    #[inline(always)]
320    pub fn bit(self, value: bool) -> &'a mut W {
321        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u8) & 0x01) << 3);
322        self.w
323    }
324}
325#[doc = "Extended Space Enable\n\nValue on reset: 0"]
326#[derive(Clone, Copy, Debug, PartialEq)]
327pub enum EXSPC_A {
328    #[doc = "0: Extended space is disabled."]
329    _0,
330    #[doc = "1: Extended space is enabled."]
331    _1,
332}
333impl From<EXSPC_A> for bool {
334    #[inline(always)]
335    fn from(variant: EXSPC_A) -> Self {
336        match variant {
337            EXSPC_A::_0 => false,
338            EXSPC_A::_1 => true,
339        }
340    }
341}
342#[doc = "Reader of field `EXSPC`"]
343pub type EXSPC_R = crate::R<bool, EXSPC_A>;
344impl EXSPC_R {
345    #[doc = r"Get enumerated values variant"]
346    #[inline(always)]
347    pub fn variant(&self) -> EXSPC_A {
348        match self.bits {
349            false => EXSPC_A::_0,
350            true => EXSPC_A::_1,
351        }
352    }
353    #[doc = "Checks if the value of the field is `_0`"]
354    #[inline(always)]
355    pub fn is_0(&self) -> bool {
356        *self == EXSPC_A::_0
357    }
358    #[doc = "Checks if the value of the field is `_1`"]
359    #[inline(always)]
360    pub fn is_1(&self) -> bool {
361        *self == EXSPC_A::_1
362    }
363}
364#[doc = "Write proxy for field `EXSPC`"]
365pub struct EXSPC_W<'a> {
366    w: &'a mut W,
367}
368impl<'a> EXSPC_W<'a> {
369    #[doc = r"Writes `variant` to the field"]
370    #[inline(always)]
371    pub fn variant(self, variant: EXSPC_A) -> &'a mut W {
372        {
373            self.bit(variant.into())
374        }
375    }
376    #[doc = "Extended space is disabled."]
377    #[inline(always)]
378    pub fn _0(self) -> &'a mut W {
379        self.variant(EXSPC_A::_0)
380    }
381    #[doc = "Extended space is enabled."]
382    #[inline(always)]
383    pub fn _1(self) -> &'a mut W {
384        self.variant(EXSPC_A::_1)
385    }
386    #[doc = r"Sets the field bit"]
387    #[inline(always)]
388    pub fn set_bit(self) -> &'a mut W {
389        self.bit(true)
390    }
391    #[doc = r"Clears the field bit"]
392    #[inline(always)]
393    pub fn clear_bit(self) -> &'a mut W {
394        self.bit(false)
395    }
396    #[doc = r"Writes raw bits to the field"]
397    #[inline(always)]
398    pub fn bit(self, value: bool) -> &'a mut W {
399        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u8) & 0x01) << 4);
400        self.w
401    }
402}
403#[doc = "CMT Clock Divide Prescaler\n\nValue on reset: 0"]
404#[derive(Clone, Copy, Debug, PartialEq)]
405pub enum CMTDIV_A {
406    #[doc = "0: IF * 1"]
407    _00,
408    #[doc = "1: IF * 2"]
409    _01,
410    #[doc = "2: IF * 4"]
411    _10,
412    #[doc = "3: IF * 8"]
413    _11,
414}
415impl From<CMTDIV_A> for u8 {
416    #[inline(always)]
417    fn from(variant: CMTDIV_A) -> Self {
418        match variant {
419            CMTDIV_A::_00 => 0,
420            CMTDIV_A::_01 => 1,
421            CMTDIV_A::_10 => 2,
422            CMTDIV_A::_11 => 3,
423        }
424    }
425}
426#[doc = "Reader of field `CMTDIV`"]
427pub type CMTDIV_R = crate::R<u8, CMTDIV_A>;
428impl CMTDIV_R {
429    #[doc = r"Get enumerated values variant"]
430    #[inline(always)]
431    pub fn variant(&self) -> CMTDIV_A {
432        match self.bits {
433            0 => CMTDIV_A::_00,
434            1 => CMTDIV_A::_01,
435            2 => CMTDIV_A::_10,
436            3 => CMTDIV_A::_11,
437            _ => unreachable!(),
438        }
439    }
440    #[doc = "Checks if the value of the field is `_00`"]
441    #[inline(always)]
442    pub fn is_00(&self) -> bool {
443        *self == CMTDIV_A::_00
444    }
445    #[doc = "Checks if the value of the field is `_01`"]
446    #[inline(always)]
447    pub fn is_01(&self) -> bool {
448        *self == CMTDIV_A::_01
449    }
450    #[doc = "Checks if the value of the field is `_10`"]
451    #[inline(always)]
452    pub fn is_10(&self) -> bool {
453        *self == CMTDIV_A::_10
454    }
455    #[doc = "Checks if the value of the field is `_11`"]
456    #[inline(always)]
457    pub fn is_11(&self) -> bool {
458        *self == CMTDIV_A::_11
459    }
460}
461#[doc = "Write proxy for field `CMTDIV`"]
462pub struct CMTDIV_W<'a> {
463    w: &'a mut W,
464}
465impl<'a> CMTDIV_W<'a> {
466    #[doc = r"Writes `variant` to the field"]
467    #[inline(always)]
468    pub fn variant(self, variant: CMTDIV_A) -> &'a mut W {
469        {
470            self.bits(variant.into())
471        }
472    }
473    #[doc = "IF * 1"]
474    #[inline(always)]
475    pub fn _00(self) -> &'a mut W {
476        self.variant(CMTDIV_A::_00)
477    }
478    #[doc = "IF * 2"]
479    #[inline(always)]
480    pub fn _01(self) -> &'a mut W {
481        self.variant(CMTDIV_A::_01)
482    }
483    #[doc = "IF * 4"]
484    #[inline(always)]
485    pub fn _10(self) -> &'a mut W {
486        self.variant(CMTDIV_A::_10)
487    }
488    #[doc = "IF * 8"]
489    #[inline(always)]
490    pub fn _11(self) -> &'a mut W {
491        self.variant(CMTDIV_A::_11)
492    }
493    #[doc = r"Writes raw bits to the field"]
494    #[inline(always)]
495    pub fn bits(self, value: u8) -> &'a mut W {
496        self.w.bits = (self.w.bits & !(0x03 << 5)) | (((value as u8) & 0x03) << 5);
497        self.w
498    }
499}
500#[doc = "End Of Cycle Status Flag\n\nValue on reset: 0"]
501#[derive(Clone, Copy, Debug, PartialEq)]
502pub enum EOCF_A {
503    #[doc = "0: End of modulation cycle has not occurred since the flag last cleared."]
504    _0,
505    #[doc = "1: End of modulator cycle has occurred."]
506    _1,
507}
508impl From<EOCF_A> for bool {
509    #[inline(always)]
510    fn from(variant: EOCF_A) -> Self {
511        match variant {
512            EOCF_A::_0 => false,
513            EOCF_A::_1 => true,
514        }
515    }
516}
517#[doc = "Reader of field `EOCF`"]
518pub type EOCF_R = crate::R<bool, EOCF_A>;
519impl EOCF_R {
520    #[doc = r"Get enumerated values variant"]
521    #[inline(always)]
522    pub fn variant(&self) -> EOCF_A {
523        match self.bits {
524            false => EOCF_A::_0,
525            true => EOCF_A::_1,
526        }
527    }
528    #[doc = "Checks if the value of the field is `_0`"]
529    #[inline(always)]
530    pub fn is_0(&self) -> bool {
531        *self == EOCF_A::_0
532    }
533    #[doc = "Checks if the value of the field is `_1`"]
534    #[inline(always)]
535    pub fn is_1(&self) -> bool {
536        *self == EOCF_A::_1
537    }
538}
539impl R {
540    #[doc = "Bit 0 - Modulator and Carrier Generator Enable"]
541    #[inline(always)]
542    pub fn mcgen(&self) -> MCGEN_R {
543        MCGEN_R::new((self.bits & 0x01) != 0)
544    }
545    #[doc = "Bit 1 - End of Cycle Interrupt Enable"]
546    #[inline(always)]
547    pub fn eocie(&self) -> EOCIE_R {
548        EOCIE_R::new(((self.bits >> 1) & 0x01) != 0)
549    }
550    #[doc = "Bit 2 - FSK Mode Select"]
551    #[inline(always)]
552    pub fn fsk(&self) -> FSK_R {
553        FSK_R::new(((self.bits >> 2) & 0x01) != 0)
554    }
555    #[doc = "Bit 3 - Baseband Enable"]
556    #[inline(always)]
557    pub fn base(&self) -> BASE_R {
558        BASE_R::new(((self.bits >> 3) & 0x01) != 0)
559    }
560    #[doc = "Bit 4 - Extended Space Enable"]
561    #[inline(always)]
562    pub fn exspc(&self) -> EXSPC_R {
563        EXSPC_R::new(((self.bits >> 4) & 0x01) != 0)
564    }
565    #[doc = "Bits 5:6 - CMT Clock Divide Prescaler"]
566    #[inline(always)]
567    pub fn cmtdiv(&self) -> CMTDIV_R {
568        CMTDIV_R::new(((self.bits >> 5) & 0x03) as u8)
569    }
570    #[doc = "Bit 7 - End Of Cycle Status Flag"]
571    #[inline(always)]
572    pub fn eocf(&self) -> EOCF_R {
573        EOCF_R::new(((self.bits >> 7) & 0x01) != 0)
574    }
575}
576impl W {
577    #[doc = "Bit 0 - Modulator and Carrier Generator Enable"]
578    #[inline(always)]
579    pub fn mcgen(&mut self) -> MCGEN_W {
580        MCGEN_W { w: self }
581    }
582    #[doc = "Bit 1 - End of Cycle Interrupt Enable"]
583    #[inline(always)]
584    pub fn eocie(&mut self) -> EOCIE_W {
585        EOCIE_W { w: self }
586    }
587    #[doc = "Bit 2 - FSK Mode Select"]
588    #[inline(always)]
589    pub fn fsk(&mut self) -> FSK_W {
590        FSK_W { w: self }
591    }
592    #[doc = "Bit 3 - Baseband Enable"]
593    #[inline(always)]
594    pub fn base(&mut self) -> BASE_W {
595        BASE_W { w: self }
596    }
597    #[doc = "Bit 4 - Extended Space Enable"]
598    #[inline(always)]
599    pub fn exspc(&mut self) -> EXSPC_W {
600        EXSPC_W { w: self }
601    }
602    #[doc = "Bits 5:6 - CMT Clock Divide Prescaler"]
603    #[inline(always)]
604    pub fn cmtdiv(&mut self) -> CMTDIV_W {
605        CMTDIV_W { w: self }
606    }
607}
mk66f18/cmt/msc.rs

mk66f18/cmt/
msc.rs
