1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u8,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u8,
8}
9impl super::S {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `RXAK`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum RXAKR {
48 #[doc = "Acknowledge signal was received after the completion of one byte of data transmission on the bus"]
49 _0,
50 #[doc = "No acknowledge signal detected"]
51 _1,
52}
53impl RXAKR {
54 #[doc = r" Returns `true` if the bit is clear (0)"]
55 #[inline]
56 pub fn bit_is_clear(&self) -> bool {
57 !self.bit()
58 }
59 #[doc = r" Returns `true` if the bit is set (1)"]
60 #[inline]
61 pub fn bit_is_set(&self) -> bool {
62 self.bit()
63 }
64 #[doc = r" Value of the field as raw bits"]
65 #[inline]
66 pub fn bit(&self) -> bool {
67 match *self {
68 RXAKR::_0 => false,
69 RXAKR::_1 => true,
70 }
71 }
72 #[allow(missing_docs)]
73 #[doc(hidden)]
74 #[inline]
75 pub fn _from(value: bool) -> RXAKR {
76 match value {
77 false => RXAKR::_0,
78 true => RXAKR::_1,
79 }
80 }
81 #[doc = "Checks if the value of the field is `_0`"]
82 #[inline]
83 pub fn is_0(&self) -> bool {
84 *self == RXAKR::_0
85 }
86 #[doc = "Checks if the value of the field is `_1`"]
87 #[inline]
88 pub fn is_1(&self) -> bool {
89 *self == RXAKR::_1
90 }
91}
92#[doc = "Possible values of the field `IICIF`"]
93#[derive(Clone, Copy, Debug, PartialEq)]
94pub enum IICIFR {
95 #[doc = "No interrupt pending"]
96 _0,
97 #[doc = "Interrupt pending"]
98 _1,
99}
100impl IICIFR {
101 #[doc = r" Returns `true` if the bit is clear (0)"]
102 #[inline]
103 pub fn bit_is_clear(&self) -> bool {
104 !self.bit()
105 }
106 #[doc = r" Returns `true` if the bit is set (1)"]
107 #[inline]
108 pub fn bit_is_set(&self) -> bool {
109 self.bit()
110 }
111 #[doc = r" Value of the field as raw bits"]
112 #[inline]
113 pub fn bit(&self) -> bool {
114 match *self {
115 IICIFR::_0 => false,
116 IICIFR::_1 => true,
117 }
118 }
119 #[allow(missing_docs)]
120 #[doc(hidden)]
121 #[inline]
122 pub fn _from(value: bool) -> IICIFR {
123 match value {
124 false => IICIFR::_0,
125 true => IICIFR::_1,
126 }
127 }
128 #[doc = "Checks if the value of the field is `_0`"]
129 #[inline]
130 pub fn is_0(&self) -> bool {
131 *self == IICIFR::_0
132 }
133 #[doc = "Checks if the value of the field is `_1`"]
134 #[inline]
135 pub fn is_1(&self) -> bool {
136 *self == IICIFR::_1
137 }
138}
139#[doc = "Possible values of the field `SRW`"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum SRWR {
142 #[doc = "Slave receive, master writing to slave"]
143 _0,
144 #[doc = "Slave transmit, master reading from slave"]
145 _1,
146}
147impl SRWR {
148 #[doc = r" Returns `true` if the bit is clear (0)"]
149 #[inline]
150 pub fn bit_is_clear(&self) -> bool {
151 !self.bit()
152 }
153 #[doc = r" Returns `true` if the bit is set (1)"]
154 #[inline]
155 pub fn bit_is_set(&self) -> bool {
156 self.bit()
157 }
158 #[doc = r" Value of the field as raw bits"]
159 #[inline]
160 pub fn bit(&self) -> bool {
161 match *self {
162 SRWR::_0 => false,
163 SRWR::_1 => true,
164 }
165 }
166 #[allow(missing_docs)]
167 #[doc(hidden)]
168 #[inline]
169 pub fn _from(value: bool) -> SRWR {
170 match value {
171 false => SRWR::_0,
172 true => SRWR::_1,
173 }
174 }
175 #[doc = "Checks if the value of the field is `_0`"]
176 #[inline]
177 pub fn is_0(&self) -> bool {
178 *self == SRWR::_0
179 }
180 #[doc = "Checks if the value of the field is `_1`"]
181 #[inline]
182 pub fn is_1(&self) -> bool {
183 *self == SRWR::_1
184 }
185}
186#[doc = "Possible values of the field `RAM`"]
187#[derive(Clone, Copy, Debug, PartialEq)]
188pub enum RAMR {
189 #[doc = "Not addressed"]
190 _0,
191 #[doc = "Addressed as a slave"]
192 _1,
193}
194impl RAMR {
195 #[doc = r" Returns `true` if the bit is clear (0)"]
196 #[inline]
197 pub fn bit_is_clear(&self) -> bool {
198 !self.bit()
199 }
200 #[doc = r" Returns `true` if the bit is set (1)"]
201 #[inline]
202 pub fn bit_is_set(&self) -> bool {
203 self.bit()
204 }
205 #[doc = r" Value of the field as raw bits"]
206 #[inline]
207 pub fn bit(&self) -> bool {
208 match *self {
209 RAMR::_0 => false,
210 RAMR::_1 => true,
211 }
212 }
213 #[allow(missing_docs)]
214 #[doc(hidden)]
215 #[inline]
216 pub fn _from(value: bool) -> RAMR {
217 match value {
218 false => RAMR::_0,
219 true => RAMR::_1,
220 }
221 }
222 #[doc = "Checks if the value of the field is `_0`"]
223 #[inline]
224 pub fn is_0(&self) -> bool {
225 *self == RAMR::_0
226 }
227 #[doc = "Checks if the value of the field is `_1`"]
228 #[inline]
229 pub fn is_1(&self) -> bool {
230 *self == RAMR::_1
231 }
232}
233#[doc = "Possible values of the field `ARBL`"]
234#[derive(Clone, Copy, Debug, PartialEq)]
235pub enum ARBLR {
236 #[doc = "Standard bus operation."]
237 _0,
238 #[doc = "Loss of arbitration."]
239 _1,
240}
241impl ARBLR {
242 #[doc = r" Returns `true` if the bit is clear (0)"]
243 #[inline]
244 pub fn bit_is_clear(&self) -> bool {
245 !self.bit()
246 }
247 #[doc = r" Returns `true` if the bit is set (1)"]
248 #[inline]
249 pub fn bit_is_set(&self) -> bool {
250 self.bit()
251 }
252 #[doc = r" Value of the field as raw bits"]
253 #[inline]
254 pub fn bit(&self) -> bool {
255 match *self {
256 ARBLR::_0 => false,
257 ARBLR::_1 => true,
258 }
259 }
260 #[allow(missing_docs)]
261 #[doc(hidden)]
262 #[inline]
263 pub fn _from(value: bool) -> ARBLR {
264 match value {
265 false => ARBLR::_0,
266 true => ARBLR::_1,
267 }
268 }
269 #[doc = "Checks if the value of the field is `_0`"]
270 #[inline]
271 pub fn is_0(&self) -> bool {
272 *self == ARBLR::_0
273 }
274 #[doc = "Checks if the value of the field is `_1`"]
275 #[inline]
276 pub fn is_1(&self) -> bool {
277 *self == ARBLR::_1
278 }
279}
280#[doc = "Possible values of the field `BUSY`"]
281#[derive(Clone, Copy, Debug, PartialEq)]
282pub enum BUSYR {
283 #[doc = "Bus is idle"]
284 _0,
285 #[doc = "Bus is busy"]
286 _1,
287}
288impl BUSYR {
289 #[doc = r" Returns `true` if the bit is clear (0)"]
290 #[inline]
291 pub fn bit_is_clear(&self) -> bool {
292 !self.bit()
293 }
294 #[doc = r" Returns `true` if the bit is set (1)"]
295 #[inline]
296 pub fn bit_is_set(&self) -> bool {
297 self.bit()
298 }
299 #[doc = r" Value of the field as raw bits"]
300 #[inline]
301 pub fn bit(&self) -> bool {
302 match *self {
303 BUSYR::_0 => false,
304 BUSYR::_1 => true,
305 }
306 }
307 #[allow(missing_docs)]
308 #[doc(hidden)]
309 #[inline]
310 pub fn _from(value: bool) -> BUSYR {
311 match value {
312 false => BUSYR::_0,
313 true => BUSYR::_1,
314 }
315 }
316 #[doc = "Checks if the value of the field is `_0`"]
317 #[inline]
318 pub fn is_0(&self) -> bool {
319 *self == BUSYR::_0
320 }
321 #[doc = "Checks if the value of the field is `_1`"]
322 #[inline]
323 pub fn is_1(&self) -> bool {
324 *self == BUSYR::_1
325 }
326}
327#[doc = "Possible values of the field `IAAS`"]
328#[derive(Clone, Copy, Debug, PartialEq)]
329pub enum IAASR {
330 #[doc = "Not addressed"]
331 _0,
332 #[doc = "Addressed as a slave"]
333 _1,
334}
335impl IAASR {
336 #[doc = r" Returns `true` if the bit is clear (0)"]
337 #[inline]
338 pub fn bit_is_clear(&self) -> bool {
339 !self.bit()
340 }
341 #[doc = r" Returns `true` if the bit is set (1)"]
342 #[inline]
343 pub fn bit_is_set(&self) -> bool {
344 self.bit()
345 }
346 #[doc = r" Value of the field as raw bits"]
347 #[inline]
348 pub fn bit(&self) -> bool {
349 match *self {
350 IAASR::_0 => false,
351 IAASR::_1 => true,
352 }
353 }
354 #[allow(missing_docs)]
355 #[doc(hidden)]
356 #[inline]
357 pub fn _from(value: bool) -> IAASR {
358 match value {
359 false => IAASR::_0,
360 true => IAASR::_1,
361 }
362 }
363 #[doc = "Checks if the value of the field is `_0`"]
364 #[inline]
365 pub fn is_0(&self) -> bool {
366 *self == IAASR::_0
367 }
368 #[doc = "Checks if the value of the field is `_1`"]
369 #[inline]
370 pub fn is_1(&self) -> bool {
371 *self == IAASR::_1
372 }
373}
374#[doc = "Possible values of the field `TCF`"]
375#[derive(Clone, Copy, Debug, PartialEq)]
376pub enum TCFR {
377 #[doc = "Transfer in progress"]
378 _0,
379 #[doc = "Transfer complete"]
380 _1,
381}
382impl TCFR {
383 #[doc = r" Returns `true` if the bit is clear (0)"]
384 #[inline]
385 pub fn bit_is_clear(&self) -> bool {
386 !self.bit()
387 }
388 #[doc = r" Returns `true` if the bit is set (1)"]
389 #[inline]
390 pub fn bit_is_set(&self) -> bool {
391 self.bit()
392 }
393 #[doc = r" Value of the field as raw bits"]
394 #[inline]
395 pub fn bit(&self) -> bool {
396 match *self {
397 TCFR::_0 => false,
398 TCFR::_1 => true,
399 }
400 }
401 #[allow(missing_docs)]
402 #[doc(hidden)]
403 #[inline]
404 pub fn _from(value: bool) -> TCFR {
405 match value {
406 false => TCFR::_0,
407 true => TCFR::_1,
408 }
409 }
410 #[doc = "Checks if the value of the field is `_0`"]
411 #[inline]
412 pub fn is_0(&self) -> bool {
413 *self == TCFR::_0
414 }
415 #[doc = "Checks if the value of the field is `_1`"]
416 #[inline]
417 pub fn is_1(&self) -> bool {
418 *self == TCFR::_1
419 }
420}
421#[doc = "Values that can be written to the field `IICIF`"]
422pub enum IICIFW {
423 #[doc = "No interrupt pending"]
424 _0,
425 #[doc = "Interrupt pending"]
426 _1,
427}
428impl IICIFW {
429 #[allow(missing_docs)]
430 #[doc(hidden)]
431 #[inline]
432 pub fn _bits(&self) -> bool {
433 match *self {
434 IICIFW::_0 => false,
435 IICIFW::_1 => true,
436 }
437 }
438}
439#[doc = r" Proxy"]
440pub struct _IICIFW<'a> {
441 w: &'a mut W,
442}
443impl<'a> _IICIFW<'a> {
444 #[doc = r" Writes `variant` to the field"]
445 #[inline]
446 pub fn variant(self, variant: IICIFW) -> &'a mut W {
447 {
448 self.bit(variant._bits())
449 }
450 }
451 #[doc = "No interrupt pending"]
452 #[inline]
453 pub fn _0(self) -> &'a mut W {
454 self.variant(IICIFW::_0)
455 }
456 #[doc = "Interrupt pending"]
457 #[inline]
458 pub fn _1(self) -> &'a mut W {
459 self.variant(IICIFW::_1)
460 }
461 #[doc = r" Sets the field bit"]
462 pub fn set_bit(self) -> &'a mut W {
463 self.bit(true)
464 }
465 #[doc = r" Clears the field bit"]
466 pub fn clear_bit(self) -> &'a mut W {
467 self.bit(false)
468 }
469 #[doc = r" Writes raw bits to the field"]
470 #[inline]
471 pub fn bit(self, value: bool) -> &'a mut W {
472 const MASK: bool = true;
473 const OFFSET: u8 = 1;
474 self.w.bits &= !((MASK as u8) << OFFSET);
475 self.w.bits |= ((value & MASK) as u8) << OFFSET;
476 self.w
477 }
478}
479#[doc = "Values that can be written to the field `RAM`"]
480pub enum RAMW {
481 #[doc = "Not addressed"]
482 _0,
483 #[doc = "Addressed as a slave"]
484 _1,
485}
486impl RAMW {
487 #[allow(missing_docs)]
488 #[doc(hidden)]
489 #[inline]
490 pub fn _bits(&self) -> bool {
491 match *self {
492 RAMW::_0 => false,
493 RAMW::_1 => true,
494 }
495 }
496}
497#[doc = r" Proxy"]
498pub struct _RAMW<'a> {
499 w: &'a mut W,
500}
501impl<'a> _RAMW<'a> {
502 #[doc = r" Writes `variant` to the field"]
503 #[inline]
504 pub fn variant(self, variant: RAMW) -> &'a mut W {
505 {
506 self.bit(variant._bits())
507 }
508 }
509 #[doc = "Not addressed"]
510 #[inline]
511 pub fn _0(self) -> &'a mut W {
512 self.variant(RAMW::_0)
513 }
514 #[doc = "Addressed as a slave"]
515 #[inline]
516 pub fn _1(self) -> &'a mut W {
517 self.variant(RAMW::_1)
518 }
519 #[doc = r" Sets the field bit"]
520 pub fn set_bit(self) -> &'a mut W {
521 self.bit(true)
522 }
523 #[doc = r" Clears the field bit"]
524 pub fn clear_bit(self) -> &'a mut W {
525 self.bit(false)
526 }
527 #[doc = r" Writes raw bits to the field"]
528 #[inline]
529 pub fn bit(self, value: bool) -> &'a mut W {
530 const MASK: bool = true;
531 const OFFSET: u8 = 3;
532 self.w.bits &= !((MASK as u8) << OFFSET);
533 self.w.bits |= ((value & MASK) as u8) << OFFSET;
534 self.w
535 }
536}
537#[doc = "Values that can be written to the field `ARBL`"]
538pub enum ARBLW {
539 #[doc = "Standard bus operation."]
540 _0,
541 #[doc = "Loss of arbitration."]
542 _1,
543}
544impl ARBLW {
545 #[allow(missing_docs)]
546 #[doc(hidden)]
547 #[inline]
548 pub fn _bits(&self) -> bool {
549 match *self {
550 ARBLW::_0 => false,
551 ARBLW::_1 => true,
552 }
553 }
554}
555#[doc = r" Proxy"]
556pub struct _ARBLW<'a> {
557 w: &'a mut W,
558}
559impl<'a> _ARBLW<'a> {
560 #[doc = r" Writes `variant` to the field"]
561 #[inline]
562 pub fn variant(self, variant: ARBLW) -> &'a mut W {
563 {
564 self.bit(variant._bits())
565 }
566 }
567 #[doc = "Standard bus operation."]
568 #[inline]
569 pub fn _0(self) -> &'a mut W {
570 self.variant(ARBLW::_0)
571 }
572 #[doc = "Loss of arbitration."]
573 #[inline]
574 pub fn _1(self) -> &'a mut W {
575 self.variant(ARBLW::_1)
576 }
577 #[doc = r" Sets the field bit"]
578 pub fn set_bit(self) -> &'a mut W {
579 self.bit(true)
580 }
581 #[doc = r" Clears the field bit"]
582 pub fn clear_bit(self) -> &'a mut W {
583 self.bit(false)
584 }
585 #[doc = r" Writes raw bits to the field"]
586 #[inline]
587 pub fn bit(self, value: bool) -> &'a mut W {
588 const MASK: bool = true;
589 const OFFSET: u8 = 4;
590 self.w.bits &= !((MASK as u8) << OFFSET);
591 self.w.bits |= ((value & MASK) as u8) << OFFSET;
592 self.w
593 }
594}
595#[doc = "Values that can be written to the field `IAAS`"]
596pub enum IAASW {
597 #[doc = "Not addressed"]
598 _0,
599 #[doc = "Addressed as a slave"]
600 _1,
601}
602impl IAASW {
603 #[allow(missing_docs)]
604 #[doc(hidden)]
605 #[inline]
606 pub fn _bits(&self) -> bool {
607 match *self {
608 IAASW::_0 => false,
609 IAASW::_1 => true,
610 }
611 }
612}
613#[doc = r" Proxy"]
614pub struct _IAASW<'a> {
615 w: &'a mut W,
616}
617impl<'a> _IAASW<'a> {
618 #[doc = r" Writes `variant` to the field"]
619 #[inline]
620 pub fn variant(self, variant: IAASW) -> &'a mut W {
621 {
622 self.bit(variant._bits())
623 }
624 }
625 #[doc = "Not addressed"]
626 #[inline]
627 pub fn _0(self) -> &'a mut W {
628 self.variant(IAASW::_0)
629 }
630 #[doc = "Addressed as a slave"]
631 #[inline]
632 pub fn _1(self) -> &'a mut W {
633 self.variant(IAASW::_1)
634 }
635 #[doc = r" Sets the field bit"]
636 pub fn set_bit(self) -> &'a mut W {
637 self.bit(true)
638 }
639 #[doc = r" Clears the field bit"]
640 pub fn clear_bit(self) -> &'a mut W {
641 self.bit(false)
642 }
643 #[doc = r" Writes raw bits to the field"]
644 #[inline]
645 pub fn bit(self, value: bool) -> &'a mut W {
646 const MASK: bool = true;
647 const OFFSET: u8 = 6;
648 self.w.bits &= !((MASK as u8) << OFFSET);
649 self.w.bits |= ((value & MASK) as u8) << OFFSET;
650 self.w
651 }
652}
653impl R {
654 #[doc = r" Value of the register as raw bits"]
655 #[inline]
656 pub fn bits(&self) -> u8 {
657 self.bits
658 }
659 #[doc = "Bit 0 - Receive acknowledge"]
660 #[inline]
661 pub fn rxak(&self) -> RXAKR {
662 RXAKR::_from({
663 const MASK: bool = true;
664 const OFFSET: u8 = 0;
665 ((self.bits >> OFFSET) & MASK as u8) != 0
666 })
667 }
668 #[doc = "Bit 1 - Interrupt flag"]
669 #[inline]
670 pub fn iicif(&self) -> IICIFR {
671 IICIFR::_from({
672 const MASK: bool = true;
673 const OFFSET: u8 = 1;
674 ((self.bits >> OFFSET) & MASK as u8) != 0
675 })
676 }
677 #[doc = "Bit 2 - Slave read/write"]
678 #[inline]
679 pub fn srw(&self) -> SRWR {
680 SRWR::_from({
681 const MASK: bool = true;
682 const OFFSET: u8 = 2;
683 ((self.bits >> OFFSET) & MASK as u8) != 0
684 })
685 }
686 #[doc = "Bit 3 - Range address match"]
687 #[inline]
688 pub fn ram(&self) -> RAMR {
689 RAMR::_from({
690 const MASK: bool = true;
691 const OFFSET: u8 = 3;
692 ((self.bits >> OFFSET) & MASK as u8) != 0
693 })
694 }
695 #[doc = "Bit 4 - Arbitration lost"]
696 #[inline]
697 pub fn arbl(&self) -> ARBLR {
698 ARBLR::_from({
699 const MASK: bool = true;
700 const OFFSET: u8 = 4;
701 ((self.bits >> OFFSET) & MASK as u8) != 0
702 })
703 }
704 #[doc = "Bit 5 - Bus busy"]
705 #[inline]
706 pub fn busy(&self) -> BUSYR {
707 BUSYR::_from({
708 const MASK: bool = true;
709 const OFFSET: u8 = 5;
710 ((self.bits >> OFFSET) & MASK as u8) != 0
711 })
712 }
713 #[doc = "Bit 6 - Addressed as a slave"]
714 #[inline]
715 pub fn iaas(&self) -> IAASR {
716 IAASR::_from({
717 const MASK: bool = true;
718 const OFFSET: u8 = 6;
719 ((self.bits >> OFFSET) & MASK as u8) != 0
720 })
721 }
722 #[doc = "Bit 7 - Transfer complete flag"]
723 #[inline]
724 pub fn tcf(&self) -> TCFR {
725 TCFR::_from({
726 const MASK: bool = true;
727 const OFFSET: u8 = 7;
728 ((self.bits >> OFFSET) & MASK as u8) != 0
729 })
730 }
731}
732impl W {
733 #[doc = r" Reset value of the register"]
734 #[inline]
735 pub fn reset_value() -> W {
736 W { bits: 128 }
737 }
738 #[doc = r" Writes raw bits to the register"]
739 #[inline]
740 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
741 self.bits = bits;
742 self
743 }
744 #[doc = "Bit 1 - Interrupt flag"]
745 #[inline]
746 pub fn iicif(&mut self) -> _IICIFW {
747 _IICIFW { w: self }
748 }
749 #[doc = "Bit 3 - Range address match"]
750 #[inline]
751 pub fn ram(&mut self) -> _RAMW {
752 _RAMW { w: self }
753 }
754 #[doc = "Bit 4 - Arbitration lost"]
755 #[inline]
756 pub fn arbl(&mut self) -> _ARBLW {
757 _ARBLW { w: self }
758 }
759 #[doc = "Bit 6 - Addressed as a slave"]
760 #[inline]
761 pub fn iaas(&mut self) -> _IAASW {
762 _IAASW { w: self }
763 }
764}