1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::SC {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `PS`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum PSR {
48 #[doc = "Divide by 1"]
49 _000,
50 #[doc = "Divide by 2"]
51 _001,
52 #[doc = "Divide by 4"]
53 _010,
54 #[doc = "Divide by 8"]
55 _011,
56 #[doc = "Divide by 16"]
57 _100,
58 #[doc = "Divide by 32"]
59 _101,
60 #[doc = "Divide by 64"]
61 _110,
62 #[doc = "Divide by 128"]
63 _111,
64}
65impl PSR {
66 #[doc = r" Value of the field as raw bits"]
67 #[inline]
68 pub fn bits(&self) -> u8 {
69 match *self {
70 PSR::_000 => 0,
71 PSR::_001 => 1,
72 PSR::_010 => 2,
73 PSR::_011 => 3,
74 PSR::_100 => 4,
75 PSR::_101 => 5,
76 PSR::_110 => 6,
77 PSR::_111 => 7,
78 }
79 }
80 #[allow(missing_docs)]
81 #[doc(hidden)]
82 #[inline]
83 pub fn _from(value: u8) -> PSR {
84 match value {
85 0 => PSR::_000,
86 1 => PSR::_001,
87 2 => PSR::_010,
88 3 => PSR::_011,
89 4 => PSR::_100,
90 5 => PSR::_101,
91 6 => PSR::_110,
92 7 => PSR::_111,
93 _ => unreachable!(),
94 }
95 }
96 #[doc = "Checks if the value of the field is `_000`"]
97 #[inline]
98 pub fn is_000(&self) -> bool {
99 *self == PSR::_000
100 }
101 #[doc = "Checks if the value of the field is `_001`"]
102 #[inline]
103 pub fn is_001(&self) -> bool {
104 *self == PSR::_001
105 }
106 #[doc = "Checks if the value of the field is `_010`"]
107 #[inline]
108 pub fn is_010(&self) -> bool {
109 *self == PSR::_010
110 }
111 #[doc = "Checks if the value of the field is `_011`"]
112 #[inline]
113 pub fn is_011(&self) -> bool {
114 *self == PSR::_011
115 }
116 #[doc = "Checks if the value of the field is `_100`"]
117 #[inline]
118 pub fn is_100(&self) -> bool {
119 *self == PSR::_100
120 }
121 #[doc = "Checks if the value of the field is `_101`"]
122 #[inline]
123 pub fn is_101(&self) -> bool {
124 *self == PSR::_101
125 }
126 #[doc = "Checks if the value of the field is `_110`"]
127 #[inline]
128 pub fn is_110(&self) -> bool {
129 *self == PSR::_110
130 }
131 #[doc = "Checks if the value of the field is `_111`"]
132 #[inline]
133 pub fn is_111(&self) -> bool {
134 *self == PSR::_111
135 }
136}
137#[doc = "Possible values of the field `CLKS`"]
138#[derive(Clone, Copy, Debug, PartialEq)]
139pub enum CLKSR {
140 #[doc = "No clock selected (This in effect disables the FTM counter.)"]
141 _00,
142 #[doc = "System clock"]
143 _01,
144 #[doc = "Fixed frequency clock"]
145 _10,
146 #[doc = "External clock"]
147 _11,
148}
149impl CLKSR {
150 #[doc = r" Value of the field as raw bits"]
151 #[inline]
152 pub fn bits(&self) -> u8 {
153 match *self {
154 CLKSR::_00 => 0,
155 CLKSR::_01 => 1,
156 CLKSR::_10 => 2,
157 CLKSR::_11 => 3,
158 }
159 }
160 #[allow(missing_docs)]
161 #[doc(hidden)]
162 #[inline]
163 pub fn _from(value: u8) -> CLKSR {
164 match value {
165 0 => CLKSR::_00,
166 1 => CLKSR::_01,
167 2 => CLKSR::_10,
168 3 => CLKSR::_11,
169 _ => unreachable!(),
170 }
171 }
172 #[doc = "Checks if the value of the field is `_00`"]
173 #[inline]
174 pub fn is_00(&self) -> bool {
175 *self == CLKSR::_00
176 }
177 #[doc = "Checks if the value of the field is `_01`"]
178 #[inline]
179 pub fn is_01(&self) -> bool {
180 *self == CLKSR::_01
181 }
182 #[doc = "Checks if the value of the field is `_10`"]
183 #[inline]
184 pub fn is_10(&self) -> bool {
185 *self == CLKSR::_10
186 }
187 #[doc = "Checks if the value of the field is `_11`"]
188 #[inline]
189 pub fn is_11(&self) -> bool {
190 *self == CLKSR::_11
191 }
192}
193#[doc = "Possible values of the field `CPWMS`"]
194#[derive(Clone, Copy, Debug, PartialEq)]
195pub enum CPWMSR {
196 #[doc = "FTM counter operates in up counting mode."]
197 _0,
198 #[doc = "FTM counter operates in up-down counting mode."]
199 _1,
200}
201impl CPWMSR {
202 #[doc = r" Returns `true` if the bit is clear (0)"]
203 #[inline]
204 pub fn bit_is_clear(&self) -> bool {
205 !self.bit()
206 }
207 #[doc = r" Returns `true` if the bit is set (1)"]
208 #[inline]
209 pub fn bit_is_set(&self) -> bool {
210 self.bit()
211 }
212 #[doc = r" Value of the field as raw bits"]
213 #[inline]
214 pub fn bit(&self) -> bool {
215 match *self {
216 CPWMSR::_0 => false,
217 CPWMSR::_1 => true,
218 }
219 }
220 #[allow(missing_docs)]
221 #[doc(hidden)]
222 #[inline]
223 pub fn _from(value: bool) -> CPWMSR {
224 match value {
225 false => CPWMSR::_0,
226 true => CPWMSR::_1,
227 }
228 }
229 #[doc = "Checks if the value of the field is `_0`"]
230 #[inline]
231 pub fn is_0(&self) -> bool {
232 *self == CPWMSR::_0
233 }
234 #[doc = "Checks if the value of the field is `_1`"]
235 #[inline]
236 pub fn is_1(&self) -> bool {
237 *self == CPWMSR::_1
238 }
239}
240#[doc = "Possible values of the field `TOIE`"]
241#[derive(Clone, Copy, Debug, PartialEq)]
242pub enum TOIER {
243 #[doc = "Disable TOF interrupts. Use software polling."]
244 _0,
245 #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
246 _1,
247}
248impl TOIER {
249 #[doc = r" Returns `true` if the bit is clear (0)"]
250 #[inline]
251 pub fn bit_is_clear(&self) -> bool {
252 !self.bit()
253 }
254 #[doc = r" Returns `true` if the bit is set (1)"]
255 #[inline]
256 pub fn bit_is_set(&self) -> bool {
257 self.bit()
258 }
259 #[doc = r" Value of the field as raw bits"]
260 #[inline]
261 pub fn bit(&self) -> bool {
262 match *self {
263 TOIER::_0 => false,
264 TOIER::_1 => true,
265 }
266 }
267 #[allow(missing_docs)]
268 #[doc(hidden)]
269 #[inline]
270 pub fn _from(value: bool) -> TOIER {
271 match value {
272 false => TOIER::_0,
273 true => TOIER::_1,
274 }
275 }
276 #[doc = "Checks if the value of the field is `_0`"]
277 #[inline]
278 pub fn is_0(&self) -> bool {
279 *self == TOIER::_0
280 }
281 #[doc = "Checks if the value of the field is `_1`"]
282 #[inline]
283 pub fn is_1(&self) -> bool {
284 *self == TOIER::_1
285 }
286}
287#[doc = "Possible values of the field `TOF`"]
288#[derive(Clone, Copy, Debug, PartialEq)]
289pub enum TOFR {
290 #[doc = "FTM counter has not overflowed."]
291 _0,
292 #[doc = "FTM counter has overflowed."]
293 _1,
294}
295impl TOFR {
296 #[doc = r" Returns `true` if the bit is clear (0)"]
297 #[inline]
298 pub fn bit_is_clear(&self) -> bool {
299 !self.bit()
300 }
301 #[doc = r" Returns `true` if the bit is set (1)"]
302 #[inline]
303 pub fn bit_is_set(&self) -> bool {
304 self.bit()
305 }
306 #[doc = r" Value of the field as raw bits"]
307 #[inline]
308 pub fn bit(&self) -> bool {
309 match *self {
310 TOFR::_0 => false,
311 TOFR::_1 => true,
312 }
313 }
314 #[allow(missing_docs)]
315 #[doc(hidden)]
316 #[inline]
317 pub fn _from(value: bool) -> TOFR {
318 match value {
319 false => TOFR::_0,
320 true => TOFR::_1,
321 }
322 }
323 #[doc = "Checks if the value of the field is `_0`"]
324 #[inline]
325 pub fn is_0(&self) -> bool {
326 *self == TOFR::_0
327 }
328 #[doc = "Checks if the value of the field is `_1`"]
329 #[inline]
330 pub fn is_1(&self) -> bool {
331 *self == TOFR::_1
332 }
333}
334#[doc = "Values that can be written to the field `PS`"]
335pub enum PSW {
336 #[doc = "Divide by 1"]
337 _000,
338 #[doc = "Divide by 2"]
339 _001,
340 #[doc = "Divide by 4"]
341 _010,
342 #[doc = "Divide by 8"]
343 _011,
344 #[doc = "Divide by 16"]
345 _100,
346 #[doc = "Divide by 32"]
347 _101,
348 #[doc = "Divide by 64"]
349 _110,
350 #[doc = "Divide by 128"]
351 _111,
352}
353impl PSW {
354 #[allow(missing_docs)]
355 #[doc(hidden)]
356 #[inline]
357 pub fn _bits(&self) -> u8 {
358 match *self {
359 PSW::_000 => 0,
360 PSW::_001 => 1,
361 PSW::_010 => 2,
362 PSW::_011 => 3,
363 PSW::_100 => 4,
364 PSW::_101 => 5,
365 PSW::_110 => 6,
366 PSW::_111 => 7,
367 }
368 }
369}
370#[doc = r" Proxy"]
371pub struct _PSW<'a> {
372 w: &'a mut W,
373}
374impl<'a> _PSW<'a> {
375 #[doc = r" Writes `variant` to the field"]
376 #[inline]
377 pub fn variant(self, variant: PSW) -> &'a mut W {
378 {
379 self.bits(variant._bits())
380 }
381 }
382 #[doc = "Divide by 1"]
383 #[inline]
384 pub fn _000(self) -> &'a mut W {
385 self.variant(PSW::_000)
386 }
387 #[doc = "Divide by 2"]
388 #[inline]
389 pub fn _001(self) -> &'a mut W {
390 self.variant(PSW::_001)
391 }
392 #[doc = "Divide by 4"]
393 #[inline]
394 pub fn _010(self) -> &'a mut W {
395 self.variant(PSW::_010)
396 }
397 #[doc = "Divide by 8"]
398 #[inline]
399 pub fn _011(self) -> &'a mut W {
400 self.variant(PSW::_011)
401 }
402 #[doc = "Divide by 16"]
403 #[inline]
404 pub fn _100(self) -> &'a mut W {
405 self.variant(PSW::_100)
406 }
407 #[doc = "Divide by 32"]
408 #[inline]
409 pub fn _101(self) -> &'a mut W {
410 self.variant(PSW::_101)
411 }
412 #[doc = "Divide by 64"]
413 #[inline]
414 pub fn _110(self) -> &'a mut W {
415 self.variant(PSW::_110)
416 }
417 #[doc = "Divide by 128"]
418 #[inline]
419 pub fn _111(self) -> &'a mut W {
420 self.variant(PSW::_111)
421 }
422 #[doc = r" Writes raw bits to the field"]
423 #[inline]
424 pub fn bits(self, value: u8) -> &'a mut W {
425 const MASK: u8 = 7;
426 const OFFSET: u8 = 0;
427 self.w.bits &= !((MASK as u32) << OFFSET);
428 self.w.bits |= ((value & MASK) as u32) << OFFSET;
429 self.w
430 }
431}
432#[doc = "Values that can be written to the field `CLKS`"]
433pub enum CLKSW {
434 #[doc = "No clock selected (This in effect disables the FTM counter.)"]
435 _00,
436 #[doc = "System clock"]
437 _01,
438 #[doc = "Fixed frequency clock"]
439 _10,
440 #[doc = "External clock"]
441 _11,
442}
443impl CLKSW {
444 #[allow(missing_docs)]
445 #[doc(hidden)]
446 #[inline]
447 pub fn _bits(&self) -> u8 {
448 match *self {
449 CLKSW::_00 => 0,
450 CLKSW::_01 => 1,
451 CLKSW::_10 => 2,
452 CLKSW::_11 => 3,
453 }
454 }
455}
456#[doc = r" Proxy"]
457pub struct _CLKSW<'a> {
458 w: &'a mut W,
459}
460impl<'a> _CLKSW<'a> {
461 #[doc = r" Writes `variant` to the field"]
462 #[inline]
463 pub fn variant(self, variant: CLKSW) -> &'a mut W {
464 {
465 self.bits(variant._bits())
466 }
467 }
468 #[doc = "No clock selected (This in effect disables the FTM counter.)"]
469 #[inline]
470 pub fn _00(self) -> &'a mut W {
471 self.variant(CLKSW::_00)
472 }
473 #[doc = "System clock"]
474 #[inline]
475 pub fn _01(self) -> &'a mut W {
476 self.variant(CLKSW::_01)
477 }
478 #[doc = "Fixed frequency clock"]
479 #[inline]
480 pub fn _10(self) -> &'a mut W {
481 self.variant(CLKSW::_10)
482 }
483 #[doc = "External clock"]
484 #[inline]
485 pub fn _11(self) -> &'a mut W {
486 self.variant(CLKSW::_11)
487 }
488 #[doc = r" Writes raw bits to the field"]
489 #[inline]
490 pub fn bits(self, value: u8) -> &'a mut W {
491 const MASK: u8 = 3;
492 const OFFSET: u8 = 3;
493 self.w.bits &= !((MASK as u32) << OFFSET);
494 self.w.bits |= ((value & MASK) as u32) << OFFSET;
495 self.w
496 }
497}
498#[doc = "Values that can be written to the field `CPWMS`"]
499pub enum CPWMSW {
500 #[doc = "FTM counter operates in up counting mode."]
501 _0,
502 #[doc = "FTM counter operates in up-down counting mode."]
503 _1,
504}
505impl CPWMSW {
506 #[allow(missing_docs)]
507 #[doc(hidden)]
508 #[inline]
509 pub fn _bits(&self) -> bool {
510 match *self {
511 CPWMSW::_0 => false,
512 CPWMSW::_1 => true,
513 }
514 }
515}
516#[doc = r" Proxy"]
517pub struct _CPWMSW<'a> {
518 w: &'a mut W,
519}
520impl<'a> _CPWMSW<'a> {
521 #[doc = r" Writes `variant` to the field"]
522 #[inline]
523 pub fn variant(self, variant: CPWMSW) -> &'a mut W {
524 {
525 self.bit(variant._bits())
526 }
527 }
528 #[doc = "FTM counter operates in up counting mode."]
529 #[inline]
530 pub fn _0(self) -> &'a mut W {
531 self.variant(CPWMSW::_0)
532 }
533 #[doc = "FTM counter operates in up-down counting mode."]
534 #[inline]
535 pub fn _1(self) -> &'a mut W {
536 self.variant(CPWMSW::_1)
537 }
538 #[doc = r" Sets the field bit"]
539 pub fn set_bit(self) -> &'a mut W {
540 self.bit(true)
541 }
542 #[doc = r" Clears the field bit"]
543 pub fn clear_bit(self) -> &'a mut W {
544 self.bit(false)
545 }
546 #[doc = r" Writes raw bits to the field"]
547 #[inline]
548 pub fn bit(self, value: bool) -> &'a mut W {
549 const MASK: bool = true;
550 const OFFSET: u8 = 5;
551 self.w.bits &= !((MASK as u32) << OFFSET);
552 self.w.bits |= ((value & MASK) as u32) << OFFSET;
553 self.w
554 }
555}
556#[doc = "Values that can be written to the field `TOIE`"]
557pub enum TOIEW {
558 #[doc = "Disable TOF interrupts. Use software polling."]
559 _0,
560 #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
561 _1,
562}
563impl TOIEW {
564 #[allow(missing_docs)]
565 #[doc(hidden)]
566 #[inline]
567 pub fn _bits(&self) -> bool {
568 match *self {
569 TOIEW::_0 => false,
570 TOIEW::_1 => true,
571 }
572 }
573}
574#[doc = r" Proxy"]
575pub struct _TOIEW<'a> {
576 w: &'a mut W,
577}
578impl<'a> _TOIEW<'a> {
579 #[doc = r" Writes `variant` to the field"]
580 #[inline]
581 pub fn variant(self, variant: TOIEW) -> &'a mut W {
582 {
583 self.bit(variant._bits())
584 }
585 }
586 #[doc = "Disable TOF interrupts. Use software polling."]
587 #[inline]
588 pub fn _0(self) -> &'a mut W {
589 self.variant(TOIEW::_0)
590 }
591 #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
592 #[inline]
593 pub fn _1(self) -> &'a mut W {
594 self.variant(TOIEW::_1)
595 }
596 #[doc = r" Sets the field bit"]
597 pub fn set_bit(self) -> &'a mut W {
598 self.bit(true)
599 }
600 #[doc = r" Clears the field bit"]
601 pub fn clear_bit(self) -> &'a mut W {
602 self.bit(false)
603 }
604 #[doc = r" Writes raw bits to the field"]
605 #[inline]
606 pub fn bit(self, value: bool) -> &'a mut W {
607 const MASK: bool = true;
608 const OFFSET: u8 = 6;
609 self.w.bits &= !((MASK as u32) << OFFSET);
610 self.w.bits |= ((value & MASK) as u32) << OFFSET;
611 self.w
612 }
613}
614impl R {
615 #[doc = r" Value of the register as raw bits"]
616 #[inline]
617 pub fn bits(&self) -> u32 {
618 self.bits
619 }
620 #[doc = "Bits 0:2 - Prescale Factor Selection"]
621 #[inline]
622 pub fn ps(&self) -> PSR {
623 PSR::_from({
624 const MASK: u8 = 7;
625 const OFFSET: u8 = 0;
626 ((self.bits >> OFFSET) & MASK as u32) as u8
627 })
628 }
629 #[doc = "Bits 3:4 - Clock Source Selection"]
630 #[inline]
631 pub fn clks(&self) -> CLKSR {
632 CLKSR::_from({
633 const MASK: u8 = 3;
634 const OFFSET: u8 = 3;
635 ((self.bits >> OFFSET) & MASK as u32) as u8
636 })
637 }
638 #[doc = "Bit 5 - Center-aligned PWM Select"]
639 #[inline]
640 pub fn cpwms(&self) -> CPWMSR {
641 CPWMSR::_from({
642 const MASK: bool = true;
643 const OFFSET: u8 = 5;
644 ((self.bits >> OFFSET) & MASK as u32) != 0
645 })
646 }
647 #[doc = "Bit 6 - Timer Overflow Interrupt Enable"]
648 #[inline]
649 pub fn toie(&self) -> TOIER {
650 TOIER::_from({
651 const MASK: bool = true;
652 const OFFSET: u8 = 6;
653 ((self.bits >> OFFSET) & MASK as u32) != 0
654 })
655 }
656 #[doc = "Bit 7 - Timer Overflow Flag"]
657 #[inline]
658 pub fn tof(&self) -> TOFR {
659 TOFR::_from({
660 const MASK: bool = true;
661 const OFFSET: u8 = 7;
662 ((self.bits >> OFFSET) & MASK as u32) != 0
663 })
664 }
665}
666impl W {
667 #[doc = r" Reset value of the register"]
668 #[inline]
669 pub fn reset_value() -> W {
670 W { bits: 0 }
671 }
672 #[doc = r" Writes raw bits to the register"]
673 #[inline]
674 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
675 self.bits = bits;
676 self
677 }
678 #[doc = "Bits 0:2 - Prescale Factor Selection"]
679 #[inline]
680 pub fn ps(&mut self) -> _PSW {
681 _PSW { w: self }
682 }
683 #[doc = "Bits 3:4 - Clock Source Selection"]
684 #[inline]
685 pub fn clks(&mut self) -> _CLKSW {
686 _CLKSW { w: self }
687 }
688 #[doc = "Bit 5 - Center-aligned PWM Select"]
689 #[inline]
690 pub fn cpwms(&mut self) -> _CPWMSW {
691 _CPWMSW { w: self }
692 }
693 #[doc = "Bit 6 - Timer Overflow Interrupt Enable"]
694 #[inline]
695 pub fn toie(&mut self) -> _TOIEW {
696 _TOIEW { w: self }
697 }
698}