mk20d7_hal/
delay.rs

1use cast::u32;
2use cortex_m::peripheral::syst::SystClkSource;
3use cortex_m::peripheral::SYST;
4
5use hal::blocking::delay::{DelayMs, DelayUs};
6use sim::SystemIntegrationModule;
7
8pub struct Delay<'a> {
9    sim: &'a SystemIntegrationModule<'a>,
10    syst: SYST,
11}
12
13impl<'a> Delay<'a> {
14    pub fn new(mut syst: SYST, sim: &'a SystemIntegrationModule<'a>) -> Self {
15        syst.set_clock_source(SystClkSource::Core);
16
17        Delay { syst, sim }
18    }
19
20    pub fn free(self) -> SYST {
21        self.syst
22    }
23}
24
25impl<'a> DelayMs<u32> for Delay<'a> {
26    fn delay_ms(&mut self, ms: u32) {
27        self.delay_us(ms * 1_000);
28    }
29}
30
31impl<'a> DelayMs<u16> for Delay<'a> {
32    fn delay_ms(&mut self, ms: u16) {
33        self.delay_ms(u32(ms));
34    }
35}
36
37impl<'a> DelayMs<u8> for Delay<'a> {
38    fn delay_ms(&mut self, ms: u8) {
39        self.delay_ms(u32(ms));
40    }
41}
42
43impl<'a> DelayUs<u32> for Delay<'a> {
44    fn delay_us(&mut self, us: u32) {
45        let rvr = us * u32::from(self.sim.get_frequencies().0);
46
47        if rvr > (1 << 24) {
48            panic!("Delay must be between 1 and 0x00ffffff (1 << 24).");
49        }
50
51        self.syst.set_reload(rvr);
52        self.syst.clear_current();
53        self.syst.enable_counter();
54
55        while !self.syst.has_wrapped() {}
56
57        self.syst.disable_counter();
58    }
59}
60
61impl<'a> DelayUs<u16> for Delay<'a> {
62    fn delay_us(&mut self, us: u16) {
63        self.delay_us(u32(us))
64    }
65}
66
67impl<'a> DelayUs<u8> for Delay<'a> {
68    fn delay_us(&mut self, us: u8) {
69        self.delay_us(u32(us))
70    }
71}
mk20d7_hal/delay.rs

mk20d7_hal/
delay.rs
