mimxrt685s_pac/usbphy/
debug1_set.rs1#[doc = "Register `DEBUG1_SET` reader"]
2pub type R = crate::R<Debug1SetSpec>;
3#[doc = "Register `DEBUG1_SET` writer"]
4pub type W = crate::W<Debug1SetSpec>;
5#[doc = "Delay increment of the rise of squelch:\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum Entailadjvd {
10 #[doc = "0: Delay is nominal"]
11 Entailadjvd0 = 0,
12 #[doc = "1: Delay is +20%"]
13 Entailadjvd1 = 1,
14 #[doc = "2: Delay is -20%"]
15 Entailadjvd2 = 2,
16 #[doc = "3: Delay is -40%"]
17 Entailadjvd3 = 3,
18}
19impl From<Entailadjvd> for u8 {
20 #[inline(always)]
21 fn from(variant: Entailadjvd) -> Self {
22 variant as _
23 }
24}
25impl crate::FieldSpec for Entailadjvd {
26 type Ux = u8;
27}
28impl crate::IsEnum for Entailadjvd {}
29#[doc = "Field `ENTAILADJVD` reader - Delay increment of the rise of squelch:"]
30pub type EntailadjvdR = crate::FieldReader<Entailadjvd>;
31impl EntailadjvdR {
32 #[doc = "Get enumerated values variant"]
33 #[inline(always)]
34 pub const fn variant(&self) -> Entailadjvd {
35 match self.bits {
36 0 => Entailadjvd::Entailadjvd0,
37 1 => Entailadjvd::Entailadjvd1,
38 2 => Entailadjvd::Entailadjvd2,
39 3 => Entailadjvd::Entailadjvd3,
40 _ => unreachable!(),
41 }
42 }
43 #[doc = "Delay is nominal"]
44 #[inline(always)]
45 pub fn is_entailadjvd_0(&self) -> bool {
46 *self == Entailadjvd::Entailadjvd0
47 }
48 #[doc = "Delay is +20%"]
49 #[inline(always)]
50 pub fn is_entailadjvd_1(&self) -> bool {
51 *self == Entailadjvd::Entailadjvd1
52 }
53 #[doc = "Delay is -20%"]
54 #[inline(always)]
55 pub fn is_entailadjvd_2(&self) -> bool {
56 *self == Entailadjvd::Entailadjvd2
57 }
58 #[doc = "Delay is -40%"]
59 #[inline(always)]
60 pub fn is_entailadjvd_3(&self) -> bool {
61 *self == Entailadjvd::Entailadjvd3
62 }
63}
64#[doc = "Field `ENTAILADJVD` writer - Delay increment of the rise of squelch:"]
65pub type EntailadjvdW<'a, REG> = crate::FieldWriter<'a, REG, 2, Entailadjvd, crate::Safe>;
66impl<'a, REG> EntailadjvdW<'a, REG>
67where
68 REG: crate::Writable + crate::RegisterSpec,
69 REG::Ux: From<u8>,
70{
71 #[doc = "Delay is nominal"]
72 #[inline(always)]
73 pub fn entailadjvd_0(self) -> &'a mut crate::W<REG> {
74 self.variant(Entailadjvd::Entailadjvd0)
75 }
76 #[doc = "Delay is +20%"]
77 #[inline(always)]
78 pub fn entailadjvd_1(self) -> &'a mut crate::W<REG> {
79 self.variant(Entailadjvd::Entailadjvd1)
80 }
81 #[doc = "Delay is -20%"]
82 #[inline(always)]
83 pub fn entailadjvd_2(self) -> &'a mut crate::W<REG> {
84 self.variant(Entailadjvd::Entailadjvd2)
85 }
86 #[doc = "Delay is -40%"]
87 #[inline(always)]
88 pub fn entailadjvd_3(self) -> &'a mut crate::W<REG> {
89 self.variant(Entailadjvd::Entailadjvd3)
90 }
91}
92#[doc = "Field `USB2_REFBIAS_VBGADJ` reader - Adjustment bits on bandgap"]
93pub type Usb2RefbiasVbgadjR = crate::FieldReader;
94#[doc = "Field `USB2_REFBIAS_VBGADJ` writer - Adjustment bits on bandgap"]
95pub type Usb2RefbiasVbgadjW<'a, REG> = crate::FieldWriter<'a, REG, 3>;
96#[doc = "Field `USB2_REFBIAS_TST` reader - Bias current control for usb2_phy"]
97pub type Usb2RefbiasTstR = crate::FieldReader;
98#[doc = "Field `USB2_REFBIAS_TST` writer - Bias current control for usb2_phy"]
99pub type Usb2RefbiasTstW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
100impl R {
101 #[doc = "Bits 13:14 - Delay increment of the rise of squelch:"]
102 #[inline(always)]
103 pub fn entailadjvd(&self) -> EntailadjvdR {
104 EntailadjvdR::new(((self.bits >> 13) & 3) as u8)
105 }
106 #[doc = "Bits 18:20 - Adjustment bits on bandgap"]
107 #[inline(always)]
108 pub fn usb2_refbias_vbgadj(&self) -> Usb2RefbiasVbgadjR {
109 Usb2RefbiasVbgadjR::new(((self.bits >> 18) & 7) as u8)
110 }
111 #[doc = "Bits 21:22 - Bias current control for usb2_phy"]
112 #[inline(always)]
113 pub fn usb2_refbias_tst(&self) -> Usb2RefbiasTstR {
114 Usb2RefbiasTstR::new(((self.bits >> 21) & 3) as u8)
115 }
116}
117#[cfg(feature = "debug")]
118impl core::fmt::Debug for R {
119 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
120 f.debug_struct("DEBUG1_SET")
121 .field("entailadjvd", &self.entailadjvd())
122 .field("usb2_refbias_vbgadj", &self.usb2_refbias_vbgadj())
123 .field("usb2_refbias_tst", &self.usb2_refbias_tst())
124 .finish()
125 }
126}
127impl W {
128 #[doc = "Bits 13:14 - Delay increment of the rise of squelch:"]
129 #[inline(always)]
130 pub fn entailadjvd(&mut self) -> EntailadjvdW<Debug1SetSpec> {
131 EntailadjvdW::new(self, 13)
132 }
133 #[doc = "Bits 18:20 - Adjustment bits on bandgap"]
134 #[inline(always)]
135 pub fn usb2_refbias_vbgadj(&mut self) -> Usb2RefbiasVbgadjW<Debug1SetSpec> {
136 Usb2RefbiasVbgadjW::new(self, 18)
137 }
138 #[doc = "Bits 21:22 - Bias current control for usb2_phy"]
139 #[inline(always)]
140 pub fn usb2_refbias_tst(&mut self) -> Usb2RefbiasTstW<Debug1SetSpec> {
141 Usb2RefbiasTstW::new(self, 21)
142 }
143}
144#[doc = "UTMI Debug Status Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`debug1_set::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`debug1_set::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
145pub struct Debug1SetSpec;
146impl crate::RegisterSpec for Debug1SetSpec {
147 type Ux = u32;
148}
149#[doc = "`read()` method returns [`debug1_set::R`](R) reader structure"]
150impl crate::Readable for Debug1SetSpec {}
151#[doc = "`write(|w| ..)` method takes [`debug1_set::W`](W) writer structure"]
152impl crate::Writable for Debug1SetSpec {
153 type Safety = crate::Unsafe;
154 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
155 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
156}
157#[doc = "`reset()` method sets DEBUG1_SET to value 0x1000"]
158impl crate::Resettable for Debug1SetSpec {
159 const RESET_VALUE: u32 = 0x1000;
160}