mimxrt685s_pac/trng/
sblim.rs1#[doc = "Register `SBLIM` reader"]
2pub type R = crate::R<SblimSpec>;
3#[doc = "Register `SBLIM` writer"]
4pub type W = crate::W<SblimSpec>;
5#[doc = "Field `SB_LIM` reader - Sparse Bit Limit"]
6pub type SbLimR = crate::FieldReader<u16>;
7#[doc = "Field `SB_LIM` writer - Sparse Bit Limit"]
8pub type SbLimW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
9impl R {
10 #[doc = "Bits 0:9 - Sparse Bit Limit"]
11 #[inline(always)]
12 pub fn sb_lim(&self) -> SbLimR {
13 SbLimR::new((self.bits & 0x03ff) as u16)
14 }
15}
16#[cfg(feature = "debug")]
17impl core::fmt::Debug for R {
18 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19 f.debug_struct("SBLIM")
20 .field("sb_lim", &self.sb_lim())
21 .finish()
22 }
23}
24impl W {
25 #[doc = "Bits 0:9 - Sparse Bit Limit"]
26 #[inline(always)]
27 pub fn sb_lim(&mut self) -> SbLimW<SblimSpec> {
28 SbLimW::new(self, 0)
29 }
30}
31#[doc = "Sparse Bit Limit Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sblim::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sblim::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct SblimSpec;
33impl crate::RegisterSpec for SblimSpec {
34 type Ux = u32;
35}
36#[doc = "`read()` method returns [`sblim::R`](R) reader structure"]
37impl crate::Readable for SblimSpec {}
38#[doc = "`write(|w| ..)` method takes [`sblim::W`](W) writer structure"]
39impl crate::Writable for SblimSpec {
40 type Safety = crate::Unsafe;
41 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
42 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
43}
44#[doc = "`reset()` method sets SBLIM to value 0x3f"]
45impl crate::Resettable for SblimSpec {
46 const RESET_VALUE: u32 = 0x3f;
47}