mimxrt685s_pac/sysctl1/
rxevpulsegen.rs

1#[doc = "Register `RXEVPULSEGEN` reader"]
2pub type R = crate::R<RxevpulsegenSpec>;
3#[doc = "Register `RXEVPULSEGEN` writer"]
4pub type W = crate::W<RxevpulsegenSpec>;
5#[doc = "RX Event Pulse Generator. Writing a '1' to this register will create a one PSCLK pulse width of logic '1'. It is automatically cleared.\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Rxevpulsegen {
9    #[doc = "0: No effect."]
10    NoEffect = 0,
11    #[doc = "1: Pulse RXEV High for one PSCLK cycle."]
12    PulseRxevHigh = 1,
13}
14impl From<Rxevpulsegen> for bool {
15    #[inline(always)]
16    fn from(variant: Rxevpulsegen) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `RXEVPULSEGEN` reader - RX Event Pulse Generator. Writing a '1' to this register will create a one PSCLK pulse width of logic '1'. It is automatically cleared."]
21pub type RxevpulsegenR = crate::BitReader<Rxevpulsegen>;
22impl RxevpulsegenR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Rxevpulsegen {
26        match self.bits {
27            false => Rxevpulsegen::NoEffect,
28            true => Rxevpulsegen::PulseRxevHigh,
29        }
30    }
31    #[doc = "No effect."]
32    #[inline(always)]
33    pub fn is_no_effect(&self) -> bool {
34        *self == Rxevpulsegen::NoEffect
35    }
36    #[doc = "Pulse RXEV High for one PSCLK cycle."]
37    #[inline(always)]
38    pub fn is_pulse_rxev_high(&self) -> bool {
39        *self == Rxevpulsegen::PulseRxevHigh
40    }
41}
42#[doc = "Field `RXEVPULSEGEN` writer - RX Event Pulse Generator. Writing a '1' to this register will create a one PSCLK pulse width of logic '1'. It is automatically cleared."]
43pub type RxevpulsegenW<'a, REG> = crate::BitWriter<'a, REG, Rxevpulsegen>;
44impl<'a, REG> RxevpulsegenW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "No effect."]
49    #[inline(always)]
50    pub fn no_effect(self) -> &'a mut crate::W<REG> {
51        self.variant(Rxevpulsegen::NoEffect)
52    }
53    #[doc = "Pulse RXEV High for one PSCLK cycle."]
54    #[inline(always)]
55    pub fn pulse_rxev_high(self) -> &'a mut crate::W<REG> {
56        self.variant(Rxevpulsegen::PulseRxevHigh)
57    }
58}
59impl R {
60    #[doc = "Bit 0 - RX Event Pulse Generator. Writing a '1' to this register will create a one PSCLK pulse width of logic '1'. It is automatically cleared."]
61    #[inline(always)]
62    pub fn rxevpulsegen(&self) -> RxevpulsegenR {
63        RxevpulsegenR::new((self.bits & 1) != 0)
64    }
65}
66#[cfg(feature = "debug")]
67impl core::fmt::Debug for R {
68    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
69        f.debug_struct("RXEVPULSEGEN")
70            .field("rxevpulsegen", &self.rxevpulsegen())
71            .finish()
72    }
73}
74impl W {
75    #[doc = "Bit 0 - RX Event Pulse Generator. Writing a '1' to this register will create a one PSCLK pulse width of logic '1'. It is automatically cleared."]
76    #[inline(always)]
77    pub fn rxevpulsegen(&mut self) -> RxevpulsegenW<RxevpulsegenSpec> {
78        RxevpulsegenW::new(self, 0)
79    }
80}
81#[doc = "RX Event Pulse Generator\n\nYou can [`read`](crate::Reg::read) this register and get [`rxevpulsegen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxevpulsegen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
82pub struct RxevpulsegenSpec;
83impl crate::RegisterSpec for RxevpulsegenSpec {
84    type Ux = u32;
85}
86#[doc = "`read()` method returns [`rxevpulsegen::R`](R) reader structure"]
87impl crate::Readable for RxevpulsegenSpec {}
88#[doc = "`write(|w| ..)` method takes [`rxevpulsegen::W`](W) writer structure"]
89impl crate::Writable for RxevpulsegenSpec {
90    type Safety = crate::Unsafe;
91    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
92    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
93}
94#[doc = "`reset()` method sets RXEVPULSEGEN to value 0"]
95impl crate::Resettable for RxevpulsegenSpec {
96    const RESET_VALUE: u32 = 0;
97}
mimxrt685s_pac/sysctl1/rxevpulsegen.rs

mimxrt685s_pac/sysctl1/
rxevpulsegen.rs
