mimxrt685s_pac/sct0/
capctrl3.rs

1#[doc = "Register `CAPCTRL3` reader"]
2pub type R = crate::R<Capctrl3Spec>;
3#[doc = "Register `CAPCTRL3` writer"]
4pub type W = crate::W<Capctrl3Spec>;
5#[doc = "Field `CAPCONn_L` reader - If bit m is one, event m causes the CAPn_L (UNIFY = 0) or the CAPn (UNIFY = 1) register to be loaded (event 0 = bit 0, event 1 = bit 1, etc.). The number of bits = number of match/captures in this SCT."]
6pub type CapconnLR = crate::FieldReader<u16>;
7#[doc = "Field `CAPCONn_L` writer - If bit m is one, event m causes the CAPn_L (UNIFY = 0) or the CAPn (UNIFY = 1) register to be loaded (event 0 = bit 0, event 1 = bit 1, etc.). The number of bits = number of match/captures in this SCT."]
8pub type CapconnLW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
9#[doc = "Field `CAPCONn_H` reader - If bit m is one, event m causes the CAPn_H (UNIFY = 0) register to be loaded (event 0 = bit 16, event 1 = bit 17, etc.). The number of bits = number of match/captures in this SCT."]
10pub type CapconnHR = crate::FieldReader<u16>;
11#[doc = "Field `CAPCONn_H` writer - If bit m is one, event m causes the CAPn_H (UNIFY = 0) register to be loaded (event 0 = bit 16, event 1 = bit 17, etc.). The number of bits = number of match/captures in this SCT."]
12pub type CapconnHW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
13impl R {
14    #[doc = "Bits 0:15 - If bit m is one, event m causes the CAPn_L (UNIFY = 0) or the CAPn (UNIFY = 1) register to be loaded (event 0 = bit 0, event 1 = bit 1, etc.). The number of bits = number of match/captures in this SCT."]
15    #[inline(always)]
16    pub fn capconn_l(&self) -> CapconnLR {
17        CapconnLR::new((self.bits & 0xffff) as u16)
18    }
19    #[doc = "Bits 16:31 - If bit m is one, event m causes the CAPn_H (UNIFY = 0) register to be loaded (event 0 = bit 16, event 1 = bit 17, etc.). The number of bits = number of match/captures in this SCT."]
20    #[inline(always)]
21    pub fn capconn_h(&self) -> CapconnHR {
22        CapconnHR::new(((self.bits >> 16) & 0xffff) as u16)
23    }
24}
25#[cfg(feature = "debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("CAPCTRL3")
29            .field("capconn_l", &self.capconn_l())
30            .field("capconn_h", &self.capconn_h())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bits 0:15 - If bit m is one, event m causes the CAPn_L (UNIFY = 0) or the CAPn (UNIFY = 1) register to be loaded (event 0 = bit 0, event 1 = bit 1, etc.). The number of bits = number of match/captures in this SCT."]
36    #[inline(always)]
37    pub fn capconn_l(&mut self) -> CapconnLW<Capctrl3Spec> {
38        CapconnLW::new(self, 0)
39    }
40    #[doc = "Bits 16:31 - If bit m is one, event m causes the CAPn_H (UNIFY = 0) register to be loaded (event 0 = bit 16, event 1 = bit 17, etc.). The number of bits = number of match/captures in this SCT."]
41    #[inline(always)]
42    pub fn capconn_h(&mut self) -> CapconnHW<Capctrl3Spec> {
43        CapconnHW::new(self, 16)
44    }
45}
46#[doc = "SCT capture control register\n\nYou can [`read`](crate::Reg::read) this register and get [`capctrl3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`capctrl3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
47pub struct Capctrl3Spec;
48impl crate::RegisterSpec for Capctrl3Spec {
49    type Ux = u32;
50}
51#[doc = "`read()` method returns [`capctrl3::R`](R) reader structure"]
52impl crate::Readable for Capctrl3Spec {}
53#[doc = "`write(|w| ..)` method takes [`capctrl3::W`](W) writer structure"]
54impl crate::Writable for Capctrl3Spec {
55    type Safety = crate::Unsafe;
56    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
57    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
58}
59#[doc = "`reset()` method sets CAPCTRL3 to value 0"]
60impl crate::Resettable for Capctrl3Spec {
61    const RESET_VALUE: u32 = 0;
62}
mimxrt685s_pac/sct0/capctrl3.rs

mimxrt685s_pac/sct0/
capctrl3.rs
