mimxrt685s_pac/
rstctl0.rs

1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    sysrststat: Sysrststat,
6    _reserved1: [u8; 0x0c],
7    prstctl0: Prstctl0,
8    prstctl1: Prstctl1,
9    prstctl2: Prstctl2,
10    _reserved4: [u8; 0x24],
11    prstctl0_set: Prstctl0Set,
12    prstctl1_set: Prstctl1Set,
13    prstctl2_set: Prstctl2Set,
14    _reserved7: [u8; 0x24],
15    prstctl0_clr: Prstctl0Clr,
16    prstctl1_clr: Prstctl1Clr,
17    prstctl2_clr: Prstctl2Clr,
18}
19impl RegisterBlock {
20    #[doc = "0x00 - system reset status register"]
21    #[inline(always)]
22    pub const fn sysrststat(&self) -> &Sysrststat {
23        &self.sysrststat
24    }
25    #[doc = "0x10 - peripheral reset control register 0"]
26    #[inline(always)]
27    pub const fn prstctl0(&self) -> &Prstctl0 {
28        &self.prstctl0
29    }
30    #[doc = "0x14 - peripheral reset control register 1"]
31    #[inline(always)]
32    pub const fn prstctl1(&self) -> &Prstctl1 {
33        &self.prstctl1
34    }
35    #[doc = "0x18 - peripheral reset control register 2"]
36    #[inline(always)]
37    pub const fn prstctl2(&self) -> &Prstctl2 {
38        &self.prstctl2
39    }
40    #[doc = "0x40 - peripheral reset set register 0"]
41    #[inline(always)]
42    pub const fn prstctl0_set(&self) -> &Prstctl0Set {
43        &self.prstctl0_set
44    }
45    #[doc = "0x44 - peripheral reset set register 1"]
46    #[inline(always)]
47    pub const fn prstctl1_set(&self) -> &Prstctl1Set {
48        &self.prstctl1_set
49    }
50    #[doc = "0x48 - peripheral reset set register 2"]
51    #[inline(always)]
52    pub const fn prstctl2_set(&self) -> &Prstctl2Set {
53        &self.prstctl2_set
54    }
55    #[doc = "0x70 - peripheral reset clear register 0"]
56    #[inline(always)]
57    pub const fn prstctl0_clr(&self) -> &Prstctl0Clr {
58        &self.prstctl0_clr
59    }
60    #[doc = "0x74 - peripheral reset clear register 1"]
61    #[inline(always)]
62    pub const fn prstctl1_clr(&self) -> &Prstctl1Clr {
63        &self.prstctl1_clr
64    }
65    #[doc = "0x78 - peripheral reset clear register 2"]
66    #[inline(always)]
67    pub const fn prstctl2_clr(&self) -> &Prstctl2Clr {
68        &self.prstctl2_clr
69    }
70}
71#[doc = "SYSRSTSTAT (rw) register accessor: system reset status register\n\nYou can [`read`](crate::Reg::read) this register and get [`sysrststat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysrststat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysrststat`]
72module"]
73#[doc(alias = "SYSRSTSTAT")]
74pub type Sysrststat = crate::Reg<sysrststat::SysrststatSpec>;
75#[doc = "system reset status register"]
76pub mod sysrststat;
77#[doc = "PRSTCTL0 (rw) register accessor: peripheral reset control register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`prstctl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prstctl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstctl0`]
78module"]
79#[doc(alias = "PRSTCTL0")]
80pub type Prstctl0 = crate::Reg<prstctl0::Prstctl0Spec>;
81#[doc = "peripheral reset control register 0"]
82pub mod prstctl0;
83#[doc = "PRSTCTL1 (rw) register accessor: peripheral reset control register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`prstctl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prstctl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstctl1`]
84module"]
85#[doc(alias = "PRSTCTL1")]
86pub type Prstctl1 = crate::Reg<prstctl1::Prstctl1Spec>;
87#[doc = "peripheral reset control register 1"]
88pub mod prstctl1;
89#[doc = "PRSTCTL2 (rw) register accessor: peripheral reset control register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`prstctl2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prstctl2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstctl2`]
90module"]
91#[doc(alias = "PRSTCTL2")]
92pub type Prstctl2 = crate::Reg<prstctl2::Prstctl2Spec>;
93#[doc = "peripheral reset control register 2"]
94pub mod prstctl2;
95#[doc = "PRSTCTL0_SET (w) register accessor: peripheral reset set register 0\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prstctl0_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstctl0_set`]
96module"]
97#[doc(alias = "PRSTCTL0_SET")]
98pub type Prstctl0Set = crate::Reg<prstctl0_set::Prstctl0SetSpec>;
99#[doc = "peripheral reset set register 0"]
100pub mod prstctl0_set;
101#[doc = "PRSTCTL1_SET (w) register accessor: peripheral reset set register 1\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prstctl1_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstctl1_set`]
102module"]
103#[doc(alias = "PRSTCTL1_SET")]
104pub type Prstctl1Set = crate::Reg<prstctl1_set::Prstctl1SetSpec>;
105#[doc = "peripheral reset set register 1"]
106pub mod prstctl1_set;
107#[doc = "PRSTCTL2_SET (w) register accessor: peripheral reset set register 2\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prstctl2_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstctl2_set`]
108module"]
109#[doc(alias = "PRSTCTL2_SET")]
110pub type Prstctl2Set = crate::Reg<prstctl2_set::Prstctl2SetSpec>;
111#[doc = "peripheral reset set register 2"]
112pub mod prstctl2_set;
113#[doc = "PRSTCTL0_CLR (w) register accessor: peripheral reset clear register 0\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prstctl0_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstctl0_clr`]
114module"]
115#[doc(alias = "PRSTCTL0_CLR")]
116pub type Prstctl0Clr = crate::Reg<prstctl0_clr::Prstctl0ClrSpec>;
117#[doc = "peripheral reset clear register 0"]
118pub mod prstctl0_clr;
119#[doc = "PRSTCTL1_CLR (w) register accessor: peripheral reset clear register 1\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prstctl1_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstctl1_clr`]
120module"]
121#[doc(alias = "PRSTCTL1_CLR")]
122pub type Prstctl1Clr = crate::Reg<prstctl1_clr::Prstctl1ClrSpec>;
123#[doc = "peripheral reset clear register 1"]
124pub mod prstctl1_clr;
125#[doc = "PRSTCTL2_CLR (w) register accessor: peripheral reset clear register 2\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prstctl2_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstctl2_clr`]
126module"]
127#[doc(alias = "PRSTCTL2_CLR")]
128pub type Prstctl2Clr = crate::Reg<prstctl2_clr::Prstctl2ClrSpec>;
129#[doc = "peripheral reset clear register 2"]
130pub mod prstctl2_clr;
mimxrt685s_pac/rstctl0.rs

mimxrt685s_pac/
rstctl0.rs
