mimxrt685s_pac/pmc/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub type R = crate::R<CtrlSpec>;
3#[doc = "Register `CTRL` writer"]
4pub type W = crate::W<CtrlSpec>;
5#[doc = "Apply updated PMC PDRUNCFG bits (SRAM power gates, RBB, FBB, LVD, and HVD control bits) and/or RUNCTRL setting\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Applycfg {
9    #[doc = "0: Always reads 0. Write 0 has no effect"]
10    Applycfg0 = 0,
11    #[doc = "1: Write 1 = initiate update sequencing of PMC state machines"]
12    Applycfg1 = 1,
13}
14impl From<Applycfg> for bool {
15    #[inline(always)]
16    fn from(variant: Applycfg) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `APPLYCFG` reader - Apply updated PMC PDRUNCFG bits (SRAM power gates, RBB, FBB, LVD, and HVD control bits) and/or RUNCTRL setting"]
21pub type ApplycfgR = crate::BitReader<Applycfg>;
22impl ApplycfgR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Applycfg {
26        match self.bits {
27            false => Applycfg::Applycfg0,
28            true => Applycfg::Applycfg1,
29        }
30    }
31    #[doc = "Always reads 0. Write 0 has no effect"]
32    #[inline(always)]
33    pub fn is_applycfg_0(&self) -> bool {
34        *self == Applycfg::Applycfg0
35    }
36    #[doc = "Write 1 = initiate update sequencing of PMC state machines"]
37    #[inline(always)]
38    pub fn is_applycfg_1(&self) -> bool {
39        *self == Applycfg::Applycfg1
40    }
41}
42#[doc = "Field `APPLYCFG` writer - Apply updated PMC PDRUNCFG bits (SRAM power gates, RBB, FBB, LVD, and HVD control bits) and/or RUNCTRL setting"]
43pub type ApplycfgW<'a, REG> = crate::BitWriter<'a, REG, Applycfg>;
44impl<'a, REG> ApplycfgW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Always reads 0. Write 0 has no effect"]
49    #[inline(always)]
50    pub fn applycfg_0(self) -> &'a mut crate::W<REG> {
51        self.variant(Applycfg::Applycfg0)
52    }
53    #[doc = "Write 1 = initiate update sequencing of PMC state machines"]
54    #[inline(always)]
55    pub fn applycfg_1(self) -> &'a mut crate::W<REG> {
56        self.variant(Applycfg::Applycfg1)
57    }
58}
59#[doc = "Enable analog buffer for references or ATX2\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Bufen {
63    #[doc = "0: disabled"]
64    Bufen0 = 0,
65    #[doc = "1: enabled"]
66    Bufen1 = 1,
67}
68impl From<Bufen> for bool {
69    #[inline(always)]
70    fn from(variant: Bufen) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `BUFEN` reader - Enable analog buffer for references or ATX2"]
75pub type BufenR = crate::BitReader<Bufen>;
76impl BufenR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Bufen {
80        match self.bits {
81            false => Bufen::Bufen0,
82            true => Bufen::Bufen1,
83        }
84    }
85    #[doc = "disabled"]
86    #[inline(always)]
87    pub fn is_bufen_0(&self) -> bool {
88        *self == Bufen::Bufen0
89    }
90    #[doc = "enabled"]
91    #[inline(always)]
92    pub fn is_bufen_1(&self) -> bool {
93        *self == Bufen::Bufen1
94    }
95}
96#[doc = "Field `BUFEN` writer - Enable analog buffer for references or ATX2"]
97pub type BufenW<'a, REG> = crate::BitWriter<'a, REG, Bufen>;
98impl<'a, REG> BufenW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "disabled"]
103    #[inline(always)]
104    pub fn bufen_0(self) -> &'a mut crate::W<REG> {
105        self.variant(Bufen::Bufen0)
106    }
107    #[doc = "enabled"]
108    #[inline(always)]
109    pub fn bufen_1(self) -> &'a mut crate::W<REG> {
110        self.variant(Bufen::Bufen1)
111    }
112}
113#[doc = "vddcore Low-Voltage Detector Interrupt Enable\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Lvdcoreie {
117    #[doc = "0: vddcore LVD interrupt disabled"]
118    Lvdcoreie0 = 0,
119    #[doc = "1: vddcore LVD causes interrupt and wakeup from deep sleep."]
120    Lvdcoreie1 = 1,
121}
122impl From<Lvdcoreie> for bool {
123    #[inline(always)]
124    fn from(variant: Lvdcoreie) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `LVDCOREIE` reader - vddcore Low-Voltage Detector Interrupt Enable"]
129pub type LvdcoreieR = crate::BitReader<Lvdcoreie>;
130impl LvdcoreieR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Lvdcoreie {
134        match self.bits {
135            false => Lvdcoreie::Lvdcoreie0,
136            true => Lvdcoreie::Lvdcoreie1,
137        }
138    }
139    #[doc = "vddcore LVD interrupt disabled"]
140    #[inline(always)]
141    pub fn is_lvdcoreie_0(&self) -> bool {
142        *self == Lvdcoreie::Lvdcoreie0
143    }
144    #[doc = "vddcore LVD causes interrupt and wakeup from deep sleep."]
145    #[inline(always)]
146    pub fn is_lvdcoreie_1(&self) -> bool {
147        *self == Lvdcoreie::Lvdcoreie1
148    }
149}
150#[doc = "Field `LVDCOREIE` writer - vddcore Low-Voltage Detector Interrupt Enable"]
151pub type LvdcoreieW<'a, REG> = crate::BitWriter<'a, REG, Lvdcoreie>;
152impl<'a, REG> LvdcoreieW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "vddcore LVD interrupt disabled"]
157    #[inline(always)]
158    pub fn lvdcoreie_0(self) -> &'a mut crate::W<REG> {
159        self.variant(Lvdcoreie::Lvdcoreie0)
160    }
161    #[doc = "vddcore LVD causes interrupt and wakeup from deep sleep."]
162    #[inline(always)]
163    pub fn lvdcoreie_1(self) -> &'a mut crate::W<REG> {
164        self.variant(Lvdcoreie::Lvdcoreie1)
165    }
166}
167#[doc = "vddcore Low-Voltage Detector Reset Enable\n\nValue on reset: 1"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Lvdcorere {
171    #[doc = "0: vddcore LVD reset disabled"]
172    Lvdcorere0 = 0,
173    #[doc = "1: vddcore LVD causes reset"]
174    Lvdcorere1 = 1,
175}
176impl From<Lvdcorere> for bool {
177    #[inline(always)]
178    fn from(variant: Lvdcorere) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `LVDCORERE` reader - vddcore Low-Voltage Detector Reset Enable"]
183pub type LvdcorereR = crate::BitReader<Lvdcorere>;
184impl LvdcorereR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Lvdcorere {
188        match self.bits {
189            false => Lvdcorere::Lvdcorere0,
190            true => Lvdcorere::Lvdcorere1,
191        }
192    }
193    #[doc = "vddcore LVD reset disabled"]
194    #[inline(always)]
195    pub fn is_lvdcorere_0(&self) -> bool {
196        *self == Lvdcorere::Lvdcorere0
197    }
198    #[doc = "vddcore LVD causes reset"]
199    #[inline(always)]
200    pub fn is_lvdcorere_1(&self) -> bool {
201        *self == Lvdcorere::Lvdcorere1
202    }
203}
204#[doc = "Field `LVDCORERE` writer - vddcore Low-Voltage Detector Reset Enable"]
205pub type LvdcorereW<'a, REG> = crate::BitWriter<'a, REG, Lvdcorere>;
206impl<'a, REG> LvdcorereW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "vddcore LVD reset disabled"]
211    #[inline(always)]
212    pub fn lvdcorere_0(self) -> &'a mut crate::W<REG> {
213        self.variant(Lvdcorere::Lvdcorere0)
214    }
215    #[doc = "vddcore LVD causes reset"]
216    #[inline(always)]
217    pub fn lvdcorere_1(self) -> &'a mut crate::W<REG> {
218        self.variant(Lvdcorere::Lvdcorere1)
219    }
220}
221#[doc = "vddcore High-Voltage Detector Interrupt Enable\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Hvdcoreie {
225    #[doc = "0: vddcore HVD interrupt disabled"]
226    Hvdcoreie0 = 0,
227    #[doc = "1: vddcore HVD causes interrupt and wakeup from deep sleep."]
228    Hvdcoreie1 = 1,
229}
230impl From<Hvdcoreie> for bool {
231    #[inline(always)]
232    fn from(variant: Hvdcoreie) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `HVDCOREIE` reader - vddcore High-Voltage Detector Interrupt Enable"]
237pub type HvdcoreieR = crate::BitReader<Hvdcoreie>;
238impl HvdcoreieR {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Hvdcoreie {
242        match self.bits {
243            false => Hvdcoreie::Hvdcoreie0,
244            true => Hvdcoreie::Hvdcoreie1,
245        }
246    }
247    #[doc = "vddcore HVD interrupt disabled"]
248    #[inline(always)]
249    pub fn is_hvdcoreie_0(&self) -> bool {
250        *self == Hvdcoreie::Hvdcoreie0
251    }
252    #[doc = "vddcore HVD causes interrupt and wakeup from deep sleep."]
253    #[inline(always)]
254    pub fn is_hvdcoreie_1(&self) -> bool {
255        *self == Hvdcoreie::Hvdcoreie1
256    }
257}
258#[doc = "Field `HVDCOREIE` writer - vddcore High-Voltage Detector Interrupt Enable"]
259pub type HvdcoreieW<'a, REG> = crate::BitWriter<'a, REG, Hvdcoreie>;
260impl<'a, REG> HvdcoreieW<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "vddcore HVD interrupt disabled"]
265    #[inline(always)]
266    pub fn hvdcoreie_0(self) -> &'a mut crate::W<REG> {
267        self.variant(Hvdcoreie::Hvdcoreie0)
268    }
269    #[doc = "vddcore HVD causes interrupt and wakeup from deep sleep."]
270    #[inline(always)]
271    pub fn hvdcoreie_1(self) -> &'a mut crate::W<REG> {
272        self.variant(Hvdcoreie::Hvdcoreie1)
273    }
274}
275#[doc = "vddcore High-Voltage Detector Reset Enable\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Hvdcorere {
279    #[doc = "0: vddcore HVD reset disabled"]
280    Hvdcorere0 = 0,
281    #[doc = "1: vddcore HVD causes reset"]
282    Hvdcorere1 = 1,
283}
284impl From<Hvdcorere> for bool {
285    #[inline(always)]
286    fn from(variant: Hvdcorere) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `HVDCORERE` reader - vddcore High-Voltage Detector Reset Enable"]
291pub type HvdcorereR = crate::BitReader<Hvdcorere>;
292impl HvdcorereR {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> Hvdcorere {
296        match self.bits {
297            false => Hvdcorere::Hvdcorere0,
298            true => Hvdcorere::Hvdcorere1,
299        }
300    }
301    #[doc = "vddcore HVD reset disabled"]
302    #[inline(always)]
303    pub fn is_hvdcorere_0(&self) -> bool {
304        *self == Hvdcorere::Hvdcorere0
305    }
306    #[doc = "vddcore HVD causes reset"]
307    #[inline(always)]
308    pub fn is_hvdcorere_1(&self) -> bool {
309        *self == Hvdcorere::Hvdcorere1
310    }
311}
312#[doc = "Field `HVDCORERE` writer - vddcore High-Voltage Detector Reset Enable"]
313pub type HvdcorereW<'a, REG> = crate::BitWriter<'a, REG, Hvdcorere>;
314impl<'a, REG> HvdcorereW<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "vddcore HVD reset disabled"]
319    #[inline(always)]
320    pub fn hvdcorere_0(self) -> &'a mut crate::W<REG> {
321        self.variant(Hvdcorere::Hvdcorere0)
322    }
323    #[doc = "vddcore HVD causes reset"]
324    #[inline(always)]
325    pub fn hvdcorere_1(self) -> &'a mut crate::W<REG> {
326        self.variant(Hvdcorere::Hvdcorere1)
327    }
328}
329#[doc = "vdd1v8 High-Voltage Detector Interrupt Enable\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum Hvd1v8ie {
333    #[doc = "0: vdd1v8 HVD interrupt disabled"]
334    Hvd1v8ie0 = 0,
335    #[doc = "1: vdd1v8 HVD causes interrupt and wakeup from deep sleep or deep power down mode"]
336    Hvd1v8ie1 = 1,
337}
338impl From<Hvd1v8ie> for bool {
339    #[inline(always)]
340    fn from(variant: Hvd1v8ie) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `HVD1V8IE` reader - vdd1v8 High-Voltage Detector Interrupt Enable"]
345pub type Hvd1v8ieR = crate::BitReader<Hvd1v8ie>;
346impl Hvd1v8ieR {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub const fn variant(&self) -> Hvd1v8ie {
350        match self.bits {
351            false => Hvd1v8ie::Hvd1v8ie0,
352            true => Hvd1v8ie::Hvd1v8ie1,
353        }
354    }
355    #[doc = "vdd1v8 HVD interrupt disabled"]
356    #[inline(always)]
357    pub fn is_hvd1v8ie_0(&self) -> bool {
358        *self == Hvd1v8ie::Hvd1v8ie0
359    }
360    #[doc = "vdd1v8 HVD causes interrupt and wakeup from deep sleep or deep power down mode"]
361    #[inline(always)]
362    pub fn is_hvd1v8ie_1(&self) -> bool {
363        *self == Hvd1v8ie::Hvd1v8ie1
364    }
365}
366#[doc = "Field `HVD1V8IE` writer - vdd1v8 High-Voltage Detector Interrupt Enable"]
367pub type Hvd1v8ieW<'a, REG> = crate::BitWriter<'a, REG, Hvd1v8ie>;
368impl<'a, REG> Hvd1v8ieW<'a, REG>
369where
370    REG: crate::Writable + crate::RegisterSpec,
371{
372    #[doc = "vdd1v8 HVD interrupt disabled"]
373    #[inline(always)]
374    pub fn hvd1v8ie_0(self) -> &'a mut crate::W<REG> {
375        self.variant(Hvd1v8ie::Hvd1v8ie0)
376    }
377    #[doc = "vdd1v8 HVD causes interrupt and wakeup from deep sleep or deep power down mode"]
378    #[inline(always)]
379    pub fn hvd1v8ie_1(self) -> &'a mut crate::W<REG> {
380        self.variant(Hvd1v8ie::Hvd1v8ie1)
381    }
382}
383#[doc = "vdd1v8 High-Voltage Detector Reset Enable\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum Hvd1v8re {
387    #[doc = "0: vdd1v8 HVD reset disabled"]
388    Hvd1v8re0 = 0,
389    #[doc = "1: vdd1v8 HVD causes reset"]
390    Hvd1v8re1 = 1,
391}
392impl From<Hvd1v8re> for bool {
393    #[inline(always)]
394    fn from(variant: Hvd1v8re) -> Self {
395        variant as u8 != 0
396    }
397}
398#[doc = "Field `HVD1V8RE` reader - vdd1v8 High-Voltage Detector Reset Enable"]
399pub type Hvd1v8reR = crate::BitReader<Hvd1v8re>;
400impl Hvd1v8reR {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub const fn variant(&self) -> Hvd1v8re {
404        match self.bits {
405            false => Hvd1v8re::Hvd1v8re0,
406            true => Hvd1v8re::Hvd1v8re1,
407        }
408    }
409    #[doc = "vdd1v8 HVD reset disabled"]
410    #[inline(always)]
411    pub fn is_hvd1v8re_0(&self) -> bool {
412        *self == Hvd1v8re::Hvd1v8re0
413    }
414    #[doc = "vdd1v8 HVD causes reset"]
415    #[inline(always)]
416    pub fn is_hvd1v8re_1(&self) -> bool {
417        *self == Hvd1v8re::Hvd1v8re1
418    }
419}
420#[doc = "Field `HVD1V8RE` writer - vdd1v8 High-Voltage Detector Reset Enable"]
421pub type Hvd1v8reW<'a, REG> = crate::BitWriter<'a, REG, Hvd1v8re>;
422impl<'a, REG> Hvd1v8reW<'a, REG>
423where
424    REG: crate::Writable + crate::RegisterSpec,
425{
426    #[doc = "vdd1v8 HVD reset disabled"]
427    #[inline(always)]
428    pub fn hvd1v8re_0(self) -> &'a mut crate::W<REG> {
429        self.variant(Hvd1v8re::Hvd1v8re0)
430    }
431    #[doc = "vdd1v8 HVD causes reset"]
432    #[inline(always)]
433    pub fn hvd1v8re_1(self) -> &'a mut crate::W<REG> {
434        self.variant(Hvd1v8re::Hvd1v8re1)
435    }
436}
437#[doc = "PMC automatic wakeup enable and interrupt enable\n\nValue on reset: 0"]
438#[cfg_attr(feature = "defmt", derive(defmt::Format))]
439#[derive(Clone, Copy, Debug, PartialEq, Eq)]
440pub enum Autowken {
441    #[doc = "0: Auto wakeup interrupt and counter disabled"]
442    Autowken0 = 0,
443    #[doc = "1: Auto wakeup interrupt generated when PMC sequencer finishes and AUTOWAKE counter = 0 after entering deep sleep mode (but not deep powerdown mode). Interrupt will wake up the M33."]
444    Autowken1 = 1,
445}
446impl From<Autowken> for bool {
447    #[inline(always)]
448    fn from(variant: Autowken) -> Self {
449        variant as u8 != 0
450    }
451}
452#[doc = "Field `AUTOWKEN` reader - PMC automatic wakeup enable and interrupt enable"]
453pub type AutowkenR = crate::BitReader<Autowken>;
454impl AutowkenR {
455    #[doc = "Get enumerated values variant"]
456    #[inline(always)]
457    pub const fn variant(&self) -> Autowken {
458        match self.bits {
459            false => Autowken::Autowken0,
460            true => Autowken::Autowken1,
461        }
462    }
463    #[doc = "Auto wakeup interrupt and counter disabled"]
464    #[inline(always)]
465    pub fn is_autowken_0(&self) -> bool {
466        *self == Autowken::Autowken0
467    }
468    #[doc = "Auto wakeup interrupt generated when PMC sequencer finishes and AUTOWAKE counter = 0 after entering deep sleep mode (but not deep powerdown mode). Interrupt will wake up the M33."]
469    #[inline(always)]
470    pub fn is_autowken_1(&self) -> bool {
471        *self == Autowken::Autowken1
472    }
473}
474#[doc = "Field `AUTOWKEN` writer - PMC automatic wakeup enable and interrupt enable"]
475pub type AutowkenW<'a, REG> = crate::BitWriter<'a, REG, Autowken>;
476impl<'a, REG> AutowkenW<'a, REG>
477where
478    REG: crate::Writable + crate::RegisterSpec,
479{
480    #[doc = "Auto wakeup interrupt and counter disabled"]
481    #[inline(always)]
482    pub fn autowken_0(self) -> &'a mut crate::W<REG> {
483        self.variant(Autowken::Autowken0)
484    }
485    #[doc = "Auto wakeup interrupt generated when PMC sequencer finishes and AUTOWAKE counter = 0 after entering deep sleep mode (but not deep powerdown mode). Interrupt will wake up the M33."]
486    #[inline(always)]
487    pub fn autowken_1(self) -> &'a mut crate::W<REG> {
488        self.variant(Autowken::Autowken1)
489    }
490}
491#[doc = "PMIC interrupt pin enable\n\nValue on reset: 0"]
492#[cfg_attr(feature = "defmt", derive(defmt::Format))]
493#[derive(Clone, Copy, Debug, PartialEq, Eq)]
494pub enum Intrpaden {
495    #[doc = "0: Interrupt pad low has no effect"]
496    Intrpaden0 = 0,
497    #[doc = "1: Interrupt pad low triggers an interrupt and deep sleep wakeup or deep powerdown wakeup event."]
498    Intrpaden1 = 1,
499}
500impl From<Intrpaden> for bool {
501    #[inline(always)]
502    fn from(variant: Intrpaden) -> Self {
503        variant as u8 != 0
504    }
505}
506#[doc = "Field `INTRPADEN` reader - PMIC interrupt pin enable"]
507pub type IntrpadenR = crate::BitReader<Intrpaden>;
508impl IntrpadenR {
509    #[doc = "Get enumerated values variant"]
510    #[inline(always)]
511    pub const fn variant(&self) -> Intrpaden {
512        match self.bits {
513            false => Intrpaden::Intrpaden0,
514            true => Intrpaden::Intrpaden1,
515        }
516    }
517    #[doc = "Interrupt pad low has no effect"]
518    #[inline(always)]
519    pub fn is_intrpaden_0(&self) -> bool {
520        *self == Intrpaden::Intrpaden0
521    }
522    #[doc = "Interrupt pad low triggers an interrupt and deep sleep wakeup or deep powerdown wakeup event."]
523    #[inline(always)]
524    pub fn is_intrpaden_1(&self) -> bool {
525        *self == Intrpaden::Intrpaden1
526    }
527}
528#[doc = "Field `INTRPADEN` writer - PMIC interrupt pin enable"]
529pub type IntrpadenW<'a, REG> = crate::BitWriter<'a, REG, Intrpaden>;
530impl<'a, REG> IntrpadenW<'a, REG>
531where
532    REG: crate::Writable + crate::RegisterSpec,
533{
534    #[doc = "Interrupt pad low has no effect"]
535    #[inline(always)]
536    pub fn intrpaden_0(self) -> &'a mut crate::W<REG> {
537        self.variant(Intrpaden::Intrpaden0)
538    }
539    #[doc = "Interrupt pad low triggers an interrupt and deep sleep wakeup or deep powerdown wakeup event."]
540    #[inline(always)]
541    pub fn intrpaden_1(self) -> &'a mut crate::W<REG> {
542        self.variant(Intrpaden::Intrpaden1)
543    }
544}
545impl R {
546    #[doc = "Bit 0 - Apply updated PMC PDRUNCFG bits (SRAM power gates, RBB, FBB, LVD, and HVD control bits) and/or RUNCTRL setting"]
547    #[inline(always)]
548    pub fn applycfg(&self) -> ApplycfgR {
549        ApplycfgR::new((self.bits & 1) != 0)
550    }
551    #[doc = "Bit 4 - Enable analog buffer for references or ATX2"]
552    #[inline(always)]
553    pub fn bufen(&self) -> BufenR {
554        BufenR::new(((self.bits >> 4) & 1) != 0)
555    }
556    #[doc = "Bit 20 - vddcore Low-Voltage Detector Interrupt Enable"]
557    #[inline(always)]
558    pub fn lvdcoreie(&self) -> LvdcoreieR {
559        LvdcoreieR::new(((self.bits >> 20) & 1) != 0)
560    }
561    #[doc = "Bit 21 - vddcore Low-Voltage Detector Reset Enable"]
562    #[inline(always)]
563    pub fn lvdcorere(&self) -> LvdcorereR {
564        LvdcorereR::new(((self.bits >> 21) & 1) != 0)
565    }
566    #[doc = "Bit 22 - vddcore High-Voltage Detector Interrupt Enable"]
567    #[inline(always)]
568    pub fn hvdcoreie(&self) -> HvdcoreieR {
569        HvdcoreieR::new(((self.bits >> 22) & 1) != 0)
570    }
571    #[doc = "Bit 23 - vddcore High-Voltage Detector Reset Enable"]
572    #[inline(always)]
573    pub fn hvdcorere(&self) -> HvdcorereR {
574        HvdcorereR::new(((self.bits >> 23) & 1) != 0)
575    }
576    #[doc = "Bit 24 - vdd1v8 High-Voltage Detector Interrupt Enable"]
577    #[inline(always)]
578    pub fn hvd1v8ie(&self) -> Hvd1v8ieR {
579        Hvd1v8ieR::new(((self.bits >> 24) & 1) != 0)
580    }
581    #[doc = "Bit 25 - vdd1v8 High-Voltage Detector Reset Enable"]
582    #[inline(always)]
583    pub fn hvd1v8re(&self) -> Hvd1v8reR {
584        Hvd1v8reR::new(((self.bits >> 25) & 1) != 0)
585    }
586    #[doc = "Bit 28 - PMC automatic wakeup enable and interrupt enable"]
587    #[inline(always)]
588    pub fn autowken(&self) -> AutowkenR {
589        AutowkenR::new(((self.bits >> 28) & 1) != 0)
590    }
591    #[doc = "Bit 29 - PMIC interrupt pin enable"]
592    #[inline(always)]
593    pub fn intrpaden(&self) -> IntrpadenR {
594        IntrpadenR::new(((self.bits >> 29) & 1) != 0)
595    }
596}
597#[cfg(feature = "debug")]
598impl core::fmt::Debug for R {
599    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
600        f.debug_struct("CTRL")
601            .field("applycfg", &self.applycfg())
602            .field("bufen", &self.bufen())
603            .field("lvdcoreie", &self.lvdcoreie())
604            .field("lvdcorere", &self.lvdcorere())
605            .field("hvdcoreie", &self.hvdcoreie())
606            .field("hvdcorere", &self.hvdcorere())
607            .field("hvd1v8ie", &self.hvd1v8ie())
608            .field("hvd1v8re", &self.hvd1v8re())
609            .field("autowken", &self.autowken())
610            .field("intrpaden", &self.intrpaden())
611            .finish()
612    }
613}
614impl W {
615    #[doc = "Bit 0 - Apply updated PMC PDRUNCFG bits (SRAM power gates, RBB, FBB, LVD, and HVD control bits) and/or RUNCTRL setting"]
616    #[inline(always)]
617    pub fn applycfg(&mut self) -> ApplycfgW<CtrlSpec> {
618        ApplycfgW::new(self, 0)
619    }
620    #[doc = "Bit 4 - Enable analog buffer for references or ATX2"]
621    #[inline(always)]
622    pub fn bufen(&mut self) -> BufenW<CtrlSpec> {
623        BufenW::new(self, 4)
624    }
625    #[doc = "Bit 20 - vddcore Low-Voltage Detector Interrupt Enable"]
626    #[inline(always)]
627    pub fn lvdcoreie(&mut self) -> LvdcoreieW<CtrlSpec> {
628        LvdcoreieW::new(self, 20)
629    }
630    #[doc = "Bit 21 - vddcore Low-Voltage Detector Reset Enable"]
631    #[inline(always)]
632    pub fn lvdcorere(&mut self) -> LvdcorereW<CtrlSpec> {
633        LvdcorereW::new(self, 21)
634    }
635    #[doc = "Bit 22 - vddcore High-Voltage Detector Interrupt Enable"]
636    #[inline(always)]
637    pub fn hvdcoreie(&mut self) -> HvdcoreieW<CtrlSpec> {
638        HvdcoreieW::new(self, 22)
639    }
640    #[doc = "Bit 23 - vddcore High-Voltage Detector Reset Enable"]
641    #[inline(always)]
642    pub fn hvdcorere(&mut self) -> HvdcorereW<CtrlSpec> {
643        HvdcorereW::new(self, 23)
644    }
645    #[doc = "Bit 24 - vdd1v8 High-Voltage Detector Interrupt Enable"]
646    #[inline(always)]
647    pub fn hvd1v8ie(&mut self) -> Hvd1v8ieW<CtrlSpec> {
648        Hvd1v8ieW::new(self, 24)
649    }
650    #[doc = "Bit 25 - vdd1v8 High-Voltage Detector Reset Enable"]
651    #[inline(always)]
652    pub fn hvd1v8re(&mut self) -> Hvd1v8reW<CtrlSpec> {
653        Hvd1v8reW::new(self, 25)
654    }
655    #[doc = "Bit 28 - PMC automatic wakeup enable and interrupt enable"]
656    #[inline(always)]
657    pub fn autowken(&mut self) -> AutowkenW<CtrlSpec> {
658        AutowkenW::new(self, 28)
659    }
660    #[doc = "Bit 29 - PMIC interrupt pin enable"]
661    #[inline(always)]
662    pub fn intrpaden(&mut self) -> IntrpadenW<CtrlSpec> {
663        IntrpadenW::new(self, 29)
664    }
665}
666#[doc = "PMC control register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
667pub struct CtrlSpec;
668impl crate::RegisterSpec for CtrlSpec {
669    type Ux = u32;
670}
671#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
672impl crate::Readable for CtrlSpec {}
673#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
674impl crate::Writable for CtrlSpec {
675    type Safety = crate::Unsafe;
676    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
677    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
678}
679#[doc = "`reset()` method sets CTRL to value 0x0020_0000"]
680impl crate::Resettable for CtrlSpec {
681    const RESET_VALUE: u32 = 0x0020_0000;
682}
mimxrt685s_pac/pmc/ctrl.rs

mimxrt685s_pac/pmc/
ctrl.rs
