mimxrt685s_pac/
i3c.rs

1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    mconfig: Mconfig,
6    sconfig: Sconfig,
7    sstatus: Sstatus,
8    sctrl: Sctrl,
9    sintset: Sintset,
10    sintclr: Sintclr,
11    sintmasked: Sintmasked,
12    serrwarn: Serrwarn,
13    sdmactrl: Sdmactrl,
14    _reserved9: [u8; 0x08],
15    sdatactrl: Sdatactrl,
16    swdatab: Swdatab,
17    swdatabe: Swdatabe,
18    swdatah: Swdatah,
19    swdatahe: Swdatahe,
20    srdatab: Srdatab,
21    _reserved15: [u8; 0x04],
22    srdatah: Srdatah,
23    _reserved16: [u8; 0x14],
24    scapabilities: Scapabilities,
25    sdynaddr: Sdynaddr,
26    smaxlimits: Smaxlimits,
27    sidpartno: Sidpartno,
28    sidext: Sidext,
29    svendorid: Svendorid,
30    stcclock: Stcclock,
31    smsgmapaddr: Smsgmapaddr,
32    _reserved24: [u8; 0x04],
33    mctrl: Mctrl,
34    mstatus: Mstatus,
35    mibirules: Mibirules,
36    mintset: Mintset,
37    mintclr: Mintclr,
38    mintmasked: Mintmasked,
39    merrwarn: Merrwarn,
40    mdmactrl: Mdmactrl,
41    _reserved32: [u8; 0x08],
42    mdatactrl: Mdatactrl,
43    mwdatab: Mwdatab,
44    mwdatabe: Mwdatabe,
45    mwdatah: Mwdatah,
46    mwdatahe: Mwdatahe,
47    mrdatab: Mrdatab,
48    _reserved38: [u8; 0x04],
49    mrdatah: Mrdatah,
50    _reserved39: [u8; 0x04],
51    _reserved_39_mwmsg_sdr: [u8; 0x04],
52    mrmsg_sdr: MrmsgSdr,
53    _reserved_41_mwmsg_ddr: [u8; 0x04],
54    mrmsg_ddr: MrmsgDdr,
55    _reserved43: [u8; 0x04],
56    mdynaddr: Mdynaddr,
57    _reserved44: [u8; 0x0f14],
58    sid: Sid,
59}
60impl RegisterBlock {
61    #[doc = "0x00 - Master Configuration Register"]
62    #[inline(always)]
63    pub const fn mconfig(&self) -> &Mconfig {
64        &self.mconfig
65    }
66    #[doc = "0x04 - Slave Configuration Register"]
67    #[inline(always)]
68    pub const fn sconfig(&self) -> &Sconfig {
69        &self.sconfig
70    }
71    #[doc = "0x08 - Slave Status Register"]
72    #[inline(always)]
73    pub const fn sstatus(&self) -> &Sstatus {
74        &self.sstatus
75    }
76    #[doc = "0x0c - Slave Control Register"]
77    #[inline(always)]
78    pub const fn sctrl(&self) -> &Sctrl {
79        &self.sctrl
80    }
81    #[doc = "0x10 - Slave Interrupt Set Register"]
82    #[inline(always)]
83    pub const fn sintset(&self) -> &Sintset {
84        &self.sintset
85    }
86    #[doc = "0x14 - Slave Interrupt Clear Register"]
87    #[inline(always)]
88    pub const fn sintclr(&self) -> &Sintclr {
89        &self.sintclr
90    }
91    #[doc = "0x18 - Slave Interrupt Mask Register"]
92    #[inline(always)]
93    pub const fn sintmasked(&self) -> &Sintmasked {
94        &self.sintmasked
95    }
96    #[doc = "0x1c - Slave Errors and Warnings Register"]
97    #[inline(always)]
98    pub const fn serrwarn(&self) -> &Serrwarn {
99        &self.serrwarn
100    }
101    #[doc = "0x20 - Slave DMA Control Register"]
102    #[inline(always)]
103    pub const fn sdmactrl(&self) -> &Sdmactrl {
104        &self.sdmactrl
105    }
106    #[doc = "0x2c - Slave Data Control Register"]
107    #[inline(always)]
108    pub const fn sdatactrl(&self) -> &Sdatactrl {
109        &self.sdatactrl
110    }
111    #[doc = "0x30 - Slave Write Data Byte Register"]
112    #[inline(always)]
113    pub const fn swdatab(&self) -> &Swdatab {
114        &self.swdatab
115    }
116    #[doc = "0x34 - Slave Write Data Byte End"]
117    #[inline(always)]
118    pub const fn swdatabe(&self) -> &Swdatabe {
119        &self.swdatabe
120    }
121    #[doc = "0x38 - Slave Write Data Half-word Register"]
122    #[inline(always)]
123    pub const fn swdatah(&self) -> &Swdatah {
124        &self.swdatah
125    }
126    #[doc = "0x3c - Slave Write Data Half-word End Register"]
127    #[inline(always)]
128    pub const fn swdatahe(&self) -> &Swdatahe {
129        &self.swdatahe
130    }
131    #[doc = "0x40 - Slave Read Data Byte Register"]
132    #[inline(always)]
133    pub const fn srdatab(&self) -> &Srdatab {
134        &self.srdatab
135    }
136    #[doc = "0x48 - Slave Read Data Half-word Register"]
137    #[inline(always)]
138    pub const fn srdatah(&self) -> &Srdatah {
139        &self.srdatah
140    }
141    #[doc = "0x60 - Slave Capabilities Register"]
142    #[inline(always)]
143    pub const fn scapabilities(&self) -> &Scapabilities {
144        &self.scapabilities
145    }
146    #[doc = "0x64 - Slave Dynamic Address Register"]
147    #[inline(always)]
148    pub const fn sdynaddr(&self) -> &Sdynaddr {
149        &self.sdynaddr
150    }
151    #[doc = "0x68 - Slave Maximum Limits Register"]
152    #[inline(always)]
153    pub const fn smaxlimits(&self) -> &Smaxlimits {
154        &self.smaxlimits
155    }
156    #[doc = "0x6c - Slave ID Part Number Register"]
157    #[inline(always)]
158    pub const fn sidpartno(&self) -> &Sidpartno {
159        &self.sidpartno
160    }
161    #[doc = "0x70 - Slave ID Extension Register"]
162    #[inline(always)]
163    pub const fn sidext(&self) -> &Sidext {
164        &self.sidext
165    }
166    #[doc = "0x74 - Slave Vendor ID Register"]
167    #[inline(always)]
168    pub const fn svendorid(&self) -> &Svendorid {
169        &self.svendorid
170    }
171    #[doc = "0x78 - Slave Time Control Clock Register"]
172    #[inline(always)]
173    pub const fn stcclock(&self) -> &Stcclock {
174        &self.stcclock
175    }
176    #[doc = "0x7c - Slave Message-Mapped Address Register"]
177    #[inline(always)]
178    pub const fn smsgmapaddr(&self) -> &Smsgmapaddr {
179        &self.smsgmapaddr
180    }
181    #[doc = "0x84 - Master Main Control Register"]
182    #[inline(always)]
183    pub const fn mctrl(&self) -> &Mctrl {
184        &self.mctrl
185    }
186    #[doc = "0x88 - Master Status Register"]
187    #[inline(always)]
188    pub const fn mstatus(&self) -> &Mstatus {
189        &self.mstatus
190    }
191    #[doc = "0x8c - Master In-band Interrupt Registry and Rules Register"]
192    #[inline(always)]
193    pub const fn mibirules(&self) -> &Mibirules {
194        &self.mibirules
195    }
196    #[doc = "0x90 - Master Interrupt Set Register"]
197    #[inline(always)]
198    pub const fn mintset(&self) -> &Mintset {
199        &self.mintset
200    }
201    #[doc = "0x94 - Master Interrupt Clear Register"]
202    #[inline(always)]
203    pub const fn mintclr(&self) -> &Mintclr {
204        &self.mintclr
205    }
206    #[doc = "0x98 - Master Interrupt Mask Register"]
207    #[inline(always)]
208    pub const fn mintmasked(&self) -> &Mintmasked {
209        &self.mintmasked
210    }
211    #[doc = "0x9c - Master Errors and Warnings Register"]
212    #[inline(always)]
213    pub const fn merrwarn(&self) -> &Merrwarn {
214        &self.merrwarn
215    }
216    #[doc = "0xa0 - Master DMA Control Register"]
217    #[inline(always)]
218    pub const fn mdmactrl(&self) -> &Mdmactrl {
219        &self.mdmactrl
220    }
221    #[doc = "0xac - Master Data Control Register"]
222    #[inline(always)]
223    pub const fn mdatactrl(&self) -> &Mdatactrl {
224        &self.mdatactrl
225    }
226    #[doc = "0xb0 - Master Write Data Byte Register"]
227    #[inline(always)]
228    pub const fn mwdatab(&self) -> &Mwdatab {
229        &self.mwdatab
230    }
231    #[doc = "0xb4 - Master Write Data Byte End Register"]
232    #[inline(always)]
233    pub const fn mwdatabe(&self) -> &Mwdatabe {
234        &self.mwdatabe
235    }
236    #[doc = "0xb8 - Master Write Data Half-word Register"]
237    #[inline(always)]
238    pub const fn mwdatah(&self) -> &Mwdatah {
239        &self.mwdatah
240    }
241    #[doc = "0xbc - Master Write Data Byte End Register"]
242    #[inline(always)]
243    pub const fn mwdatahe(&self) -> &Mwdatahe {
244        &self.mwdatahe
245    }
246    #[doc = "0xc0 - Master Read Data Byte Register"]
247    #[inline(always)]
248    pub const fn mrdatab(&self) -> &Mrdatab {
249        &self.mrdatab
250    }
251    #[doc = "0xc8 - Master Read Data Half-word Register"]
252    #[inline(always)]
253    pub const fn mrdatah(&self) -> &Mrdatah {
254        &self.mrdatah
255    }
256    #[doc = "0xd0 - Master Write Message Data in SDR mode"]
257    #[inline(always)]
258    pub const fn mwmsg_sdr_data(&self) -> &MwmsgSdrData {
259        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(208).cast() }
260    }
261    #[doc = "0xd0 - Master Write Message in SDR mode"]
262    #[inline(always)]
263    pub const fn mwmsg_sdr_control(&self) -> &MwmsgSdrControl {
264        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(208).cast() }
265    }
266    #[doc = "0xd4 - Master Read Message in SDR mode"]
267    #[inline(always)]
268    pub const fn mrmsg_sdr(&self) -> &MrmsgSdr {
269        &self.mrmsg_sdr
270    }
271    #[doc = "0xd8 - Master Write Message Data in DDR mode"]
272    #[inline(always)]
273    pub const fn mwmsg_ddr_data(&self) -> &MwmsgDdrData {
274        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(216).cast() }
275    }
276    #[doc = "0xd8 - Master Write Message in DDR mode"]
277    #[inline(always)]
278    pub const fn mwmsg_ddr_control(&self) -> &MwmsgDdrControl {
279        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(216).cast() }
280    }
281    #[doc = "0xdc - Master Read Message in DDR mode"]
282    #[inline(always)]
283    pub const fn mrmsg_ddr(&self) -> &MrmsgDdr {
284        &self.mrmsg_ddr
285    }
286    #[doc = "0xe4 - Master Dynamic Address Register"]
287    #[inline(always)]
288    pub const fn mdynaddr(&self) -> &Mdynaddr {
289        &self.mdynaddr
290    }
291    #[doc = "0xffc - Slave Module ID Register"]
292    #[inline(always)]
293    pub const fn sid(&self) -> &Sid {
294        &self.sid
295    }
296}
297#[doc = "MCONFIG (rw) register accessor: Master Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mconfig::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mconfig::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mconfig`]
298module"]
299#[doc(alias = "MCONFIG")]
300pub type Mconfig = crate::Reg<mconfig::MconfigSpec>;
301#[doc = "Master Configuration Register"]
302pub mod mconfig;
303#[doc = "SCONFIG (rw) register accessor: Slave Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sconfig::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sconfig::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sconfig`]
304module"]
305#[doc(alias = "SCONFIG")]
306pub type Sconfig = crate::Reg<sconfig::SconfigSpec>;
307#[doc = "Slave Configuration Register"]
308pub mod sconfig;
309#[doc = "SSTATUS (rw) register accessor: Slave Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sstatus::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sstatus::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sstatus`]
310module"]
311#[doc(alias = "SSTATUS")]
312pub type Sstatus = crate::Reg<sstatus::SstatusSpec>;
313#[doc = "Slave Status Register"]
314pub mod sstatus;
315#[doc = "SCTRL (rw) register accessor: Slave Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sctrl`]
316module"]
317#[doc(alias = "SCTRL")]
318pub type Sctrl = crate::Reg<sctrl::SctrlSpec>;
319#[doc = "Slave Control Register"]
320pub mod sctrl;
321#[doc = "SINTSET (rw) register accessor: Slave Interrupt Set Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sintset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sintset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sintset`]
322module"]
323#[doc(alias = "SINTSET")]
324pub type Sintset = crate::Reg<sintset::SintsetSpec>;
325#[doc = "Slave Interrupt Set Register"]
326pub mod sintset;
327#[doc = "SINTCLR (rw) register accessor: Slave Interrupt Clear Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sintclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sintclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sintclr`]
328module"]
329#[doc(alias = "SINTCLR")]
330pub type Sintclr = crate::Reg<sintclr::SintclrSpec>;
331#[doc = "Slave Interrupt Clear Register"]
332pub mod sintclr;
333#[doc = "SINTMASKED (r) register accessor: Slave Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sintmasked::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sintmasked`]
334module"]
335#[doc(alias = "SINTMASKED")]
336pub type Sintmasked = crate::Reg<sintmasked::SintmaskedSpec>;
337#[doc = "Slave Interrupt Mask Register"]
338pub mod sintmasked;
339#[doc = "SERRWARN (rw) register accessor: Slave Errors and Warnings Register\n\nYou can [`read`](crate::Reg::read) this register and get [`serrwarn::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`serrwarn::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@serrwarn`]
340module"]
341#[doc(alias = "SERRWARN")]
342pub type Serrwarn = crate::Reg<serrwarn::SerrwarnSpec>;
343#[doc = "Slave Errors and Warnings Register"]
344pub mod serrwarn;
345#[doc = "SDMACTRL (rw) register accessor: Slave DMA Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sdmactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdmactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdmactrl`]
346module"]
347#[doc(alias = "SDMACTRL")]
348pub type Sdmactrl = crate::Reg<sdmactrl::SdmactrlSpec>;
349#[doc = "Slave DMA Control Register"]
350pub mod sdmactrl;
351#[doc = "SDATACTRL (rw) register accessor: Slave Data Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sdatactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdatactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdatactrl`]
352module"]
353#[doc(alias = "SDATACTRL")]
354pub type Sdatactrl = crate::Reg<sdatactrl::SdatactrlSpec>;
355#[doc = "Slave Data Control Register"]
356pub mod sdatactrl;
357#[doc = "SWDATAB (w) register accessor: Slave Write Data Byte Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swdatab::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swdatab`]
358module"]
359#[doc(alias = "SWDATAB")]
360pub type Swdatab = crate::Reg<swdatab::SwdatabSpec>;
361#[doc = "Slave Write Data Byte Register"]
362pub mod swdatab;
363#[doc = "SWDATABE (w) register accessor: Slave Write Data Byte End\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swdatabe::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swdatabe`]
364module"]
365#[doc(alias = "SWDATABE")]
366pub type Swdatabe = crate::Reg<swdatabe::SwdatabeSpec>;
367#[doc = "Slave Write Data Byte End"]
368pub mod swdatabe;
369#[doc = "SWDATAH (w) register accessor: Slave Write Data Half-word Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swdatah::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swdatah`]
370module"]
371#[doc(alias = "SWDATAH")]
372pub type Swdatah = crate::Reg<swdatah::SwdatahSpec>;
373#[doc = "Slave Write Data Half-word Register"]
374pub mod swdatah;
375#[doc = "SWDATAHE (w) register accessor: Slave Write Data Half-word End Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swdatahe::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swdatahe`]
376module"]
377#[doc(alias = "SWDATAHE")]
378pub type Swdatahe = crate::Reg<swdatahe::SwdataheSpec>;
379#[doc = "Slave Write Data Half-word End Register"]
380pub mod swdatahe;
381#[doc = "SRDATAB (r) register accessor: Slave Read Data Byte Register\n\nYou can [`read`](crate::Reg::read) this register and get [`srdatab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srdatab`]
382module"]
383#[doc(alias = "SRDATAB")]
384pub type Srdatab = crate::Reg<srdatab::SrdatabSpec>;
385#[doc = "Slave Read Data Byte Register"]
386pub mod srdatab;
387#[doc = "SRDATAH (r) register accessor: Slave Read Data Half-word Register\n\nYou can [`read`](crate::Reg::read) this register and get [`srdatah::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srdatah`]
388module"]
389#[doc(alias = "SRDATAH")]
390pub type Srdatah = crate::Reg<srdatah::SrdatahSpec>;
391#[doc = "Slave Read Data Half-word Register"]
392pub mod srdatah;
393#[doc = "SCAPABILITIES (r) register accessor: Slave Capabilities Register\n\nYou can [`read`](crate::Reg::read) this register and get [`scapabilities::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scapabilities`]
394module"]
395#[doc(alias = "SCAPABILITIES")]
396pub type Scapabilities = crate::Reg<scapabilities::ScapabilitiesSpec>;
397#[doc = "Slave Capabilities Register"]
398pub mod scapabilities;
399#[doc = "SDYNADDR (rw) register accessor: Slave Dynamic Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sdynaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdynaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdynaddr`]
400module"]
401#[doc(alias = "SDYNADDR")]
402pub type Sdynaddr = crate::Reg<sdynaddr::SdynaddrSpec>;
403#[doc = "Slave Dynamic Address Register"]
404pub mod sdynaddr;
405#[doc = "SMAXLIMITS (rw) register accessor: Slave Maximum Limits Register\n\nYou can [`read`](crate::Reg::read) this register and get [`smaxlimits::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`smaxlimits::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@smaxlimits`]
406module"]
407#[doc(alias = "SMAXLIMITS")]
408pub type Smaxlimits = crate::Reg<smaxlimits::SmaxlimitsSpec>;
409#[doc = "Slave Maximum Limits Register"]
410pub mod smaxlimits;
411#[doc = "SIDPARTNO (rw) register accessor: Slave ID Part Number Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sidpartno::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sidpartno::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sidpartno`]
412module"]
413#[doc(alias = "SIDPARTNO")]
414pub type Sidpartno = crate::Reg<sidpartno::SidpartnoSpec>;
415#[doc = "Slave ID Part Number Register"]
416pub mod sidpartno;
417#[doc = "SIDEXT (rw) register accessor: Slave ID Extension Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sidext::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sidext::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sidext`]
418module"]
419#[doc(alias = "SIDEXT")]
420pub type Sidext = crate::Reg<sidext::SidextSpec>;
421#[doc = "Slave ID Extension Register"]
422pub mod sidext;
423#[doc = "SVENDORID (rw) register accessor: Slave Vendor ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`svendorid::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`svendorid::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@svendorid`]
424module"]
425#[doc(alias = "SVENDORID")]
426pub type Svendorid = crate::Reg<svendorid::SvendoridSpec>;
427#[doc = "Slave Vendor ID Register"]
428pub mod svendorid;
429#[doc = "STCCLOCK (rw) register accessor: Slave Time Control Clock Register\n\nYou can [`read`](crate::Reg::read) this register and get [`stcclock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stcclock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stcclock`]
430module"]
431#[doc(alias = "STCCLOCK")]
432pub type Stcclock = crate::Reg<stcclock::StcclockSpec>;
433#[doc = "Slave Time Control Clock Register"]
434pub mod stcclock;
435#[doc = "SMSGMAPADDR (r) register accessor: Slave Message-Mapped Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`smsgmapaddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@smsgmapaddr`]
436module"]
437#[doc(alias = "SMSGMAPADDR")]
438pub type Smsgmapaddr = crate::Reg<smsgmapaddr::SmsgmapaddrSpec>;
439#[doc = "Slave Message-Mapped Address Register"]
440pub mod smsgmapaddr;
441#[doc = "MCTRL (rw) register accessor: Master Main Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mctrl`]
442module"]
443#[doc(alias = "MCTRL")]
444pub type Mctrl = crate::Reg<mctrl::MctrlSpec>;
445#[doc = "Master Main Control Register"]
446pub mod mctrl;
447#[doc = "MSTATUS (rw) register accessor: Master Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mstatus::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mstatus::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mstatus`]
448module"]
449#[doc(alias = "MSTATUS")]
450pub type Mstatus = crate::Reg<mstatus::MstatusSpec>;
451#[doc = "Master Status Register"]
452pub mod mstatus;
453#[doc = "MIBIRULES (rw) register accessor: Master In-band Interrupt Registry and Rules Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mibirules::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mibirules::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mibirules`]
454module"]
455#[doc(alias = "MIBIRULES")]
456pub type Mibirules = crate::Reg<mibirules::MibirulesSpec>;
457#[doc = "Master In-band Interrupt Registry and Rules Register"]
458pub mod mibirules;
459#[doc = "MINTSET (rw) register accessor: Master Interrupt Set Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mintset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mintset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mintset`]
460module"]
461#[doc(alias = "MINTSET")]
462pub type Mintset = crate::Reg<mintset::MintsetSpec>;
463#[doc = "Master Interrupt Set Register"]
464pub mod mintset;
465#[doc = "MINTCLR (w) register accessor: Master Interrupt Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mintclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mintclr`]
466module"]
467#[doc(alias = "MINTCLR")]
468pub type Mintclr = crate::Reg<mintclr::MintclrSpec>;
469#[doc = "Master Interrupt Clear Register"]
470pub mod mintclr;
471#[doc = "MINTMASKED (r) register accessor: Master Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mintmasked::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mintmasked`]
472module"]
473#[doc(alias = "MINTMASKED")]
474pub type Mintmasked = crate::Reg<mintmasked::MintmaskedSpec>;
475#[doc = "Master Interrupt Mask Register"]
476pub mod mintmasked;
477#[doc = "MERRWARN (rw) register accessor: Master Errors and Warnings Register\n\nYou can [`read`](crate::Reg::read) this register and get [`merrwarn::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`merrwarn::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@merrwarn`]
478module"]
479#[doc(alias = "MERRWARN")]
480pub type Merrwarn = crate::Reg<merrwarn::MerrwarnSpec>;
481#[doc = "Master Errors and Warnings Register"]
482pub mod merrwarn;
483#[doc = "MDMACTRL (rw) register accessor: Master DMA Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mdmactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mdmactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mdmactrl`]
484module"]
485#[doc(alias = "MDMACTRL")]
486pub type Mdmactrl = crate::Reg<mdmactrl::MdmactrlSpec>;
487#[doc = "Master DMA Control Register"]
488pub mod mdmactrl;
489#[doc = "MDATACTRL (rw) register accessor: Master Data Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mdatactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mdatactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mdatactrl`]
490module"]
491#[doc(alias = "MDATACTRL")]
492pub type Mdatactrl = crate::Reg<mdatactrl::MdatactrlSpec>;
493#[doc = "Master Data Control Register"]
494pub mod mdatactrl;
495#[doc = "MWDATAB (w) register accessor: Master Write Data Byte Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwdatab::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwdatab`]
496module"]
497#[doc(alias = "MWDATAB")]
498pub type Mwdatab = crate::Reg<mwdatab::MwdatabSpec>;
499#[doc = "Master Write Data Byte Register"]
500pub mod mwdatab;
501#[doc = "MWDATABE (w) register accessor: Master Write Data Byte End Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwdatabe::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwdatabe`]
502module"]
503#[doc(alias = "MWDATABE")]
504pub type Mwdatabe = crate::Reg<mwdatabe::MwdatabeSpec>;
505#[doc = "Master Write Data Byte End Register"]
506pub mod mwdatabe;
507#[doc = "MWDATAH (w) register accessor: Master Write Data Half-word Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwdatah::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwdatah`]
508module"]
509#[doc(alias = "MWDATAH")]
510pub type Mwdatah = crate::Reg<mwdatah::MwdatahSpec>;
511#[doc = "Master Write Data Half-word Register"]
512pub mod mwdatah;
513#[doc = "MWDATAHE (w) register accessor: Master Write Data Byte End Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwdatahe::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwdatahe`]
514module"]
515#[doc(alias = "MWDATAHE")]
516pub type Mwdatahe = crate::Reg<mwdatahe::MwdataheSpec>;
517#[doc = "Master Write Data Byte End Register"]
518pub mod mwdatahe;
519#[doc = "MRDATAB (r) register accessor: Master Read Data Byte Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mrdatab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mrdatab`]
520module"]
521#[doc(alias = "MRDATAB")]
522pub type Mrdatab = crate::Reg<mrdatab::MrdatabSpec>;
523#[doc = "Master Read Data Byte Register"]
524pub mod mrdatab;
525#[doc = "MRDATAH (r) register accessor: Master Read Data Half-word Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mrdatah::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mrdatah`]
526module"]
527#[doc(alias = "MRDATAH")]
528pub type Mrdatah = crate::Reg<mrdatah::MrdatahSpec>;
529#[doc = "Master Read Data Half-word Register"]
530pub mod mrdatah;
531#[doc = "MWMSG_SDR_CONTROL (w) register accessor: Master Write Message in SDR mode\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwmsg_sdr_control::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwmsg_sdr_control`]
532module"]
533#[doc(alias = "MWMSG_SDR_CONTROL")]
534pub type MwmsgSdrControl = crate::Reg<mwmsg_sdr_control::MwmsgSdrControlSpec>;
535#[doc = "Master Write Message in SDR mode"]
536pub mod mwmsg_sdr_control;
537#[doc = "MWMSG_SDR_DATA (w) register accessor: Master Write Message Data in SDR mode\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwmsg_sdr_data::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwmsg_sdr_data`]
538module"]
539#[doc(alias = "MWMSG_SDR_DATA")]
540pub type MwmsgSdrData = crate::Reg<mwmsg_sdr_data::MwmsgSdrDataSpec>;
541#[doc = "Master Write Message Data in SDR mode"]
542pub mod mwmsg_sdr_data;
543#[doc = "MRMSG_SDR (r) register accessor: Master Read Message in SDR mode\n\nYou can [`read`](crate::Reg::read) this register and get [`mrmsg_sdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mrmsg_sdr`]
544module"]
545#[doc(alias = "MRMSG_SDR")]
546pub type MrmsgSdr = crate::Reg<mrmsg_sdr::MrmsgSdrSpec>;
547#[doc = "Master Read Message in SDR mode"]
548pub mod mrmsg_sdr;
549#[doc = "MWMSG_DDR_CONTROL (w) register accessor: Master Write Message in DDR mode\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwmsg_ddr_control::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwmsg_ddr_control`]
550module"]
551#[doc(alias = "MWMSG_DDR_CONTROL")]
552pub type MwmsgDdrControl = crate::Reg<mwmsg_ddr_control::MwmsgDdrControlSpec>;
553#[doc = "Master Write Message in DDR mode"]
554pub mod mwmsg_ddr_control;
555#[doc = "MWMSG_DDR_DATA (w) register accessor: Master Write Message Data in DDR mode\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwmsg_ddr_data::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwmsg_ddr_data`]
556module"]
557#[doc(alias = "MWMSG_DDR_DATA")]
558pub type MwmsgDdrData = crate::Reg<mwmsg_ddr_data::MwmsgDdrDataSpec>;
559#[doc = "Master Write Message Data in DDR mode"]
560pub mod mwmsg_ddr_data;
561#[doc = "MRMSG_DDR (rw) register accessor: Master Read Message in DDR mode\n\nYou can [`read`](crate::Reg::read) this register and get [`mrmsg_ddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mrmsg_ddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mrmsg_ddr`]
562module"]
563#[doc(alias = "MRMSG_DDR")]
564pub type MrmsgDdr = crate::Reg<mrmsg_ddr::MrmsgDdrSpec>;
565#[doc = "Master Read Message in DDR mode"]
566pub mod mrmsg_ddr;
567#[doc = "MDYNADDR (rw) register accessor: Master Dynamic Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mdynaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mdynaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mdynaddr`]
568module"]
569#[doc(alias = "MDYNADDR")]
570pub type Mdynaddr = crate::Reg<mdynaddr::MdynaddrSpec>;
571#[doc = "Master Dynamic Address Register"]
572pub mod mdynaddr;
573#[doc = "SID (r) register accessor: Slave Module ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sid`]
574module"]
575#[doc(alias = "SID")]
576pub type Sid = crate::Reg<sid::SidSpec>;
577#[doc = "Slave Module ID Register"]
578pub mod sid;
mimxrt685s_pac/i3c.rs

mimxrt685s_pac/
i3c.rs
