mimxrt685s_pac/hashcrypt/
alias.rs

1#[doc = "Register `ALIAS[%s]` writer"]
2pub type W = crate::W<AliasSpec>;
3#[doc = "Field `DATA` writer - Write next word in little-endian form. The hash requires big endian word data, but this block swaps the bytes automatically. That is, SHA assumes the data coming in is treated as bytes (e.g. \"abcd\") and since the ARM core will treat \"abcd\" as a word as 0x64636261, the block will swap the word to restore into big endian."]
4pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
5#[cfg(feature = "debug")]
6impl core::fmt::Debug for crate::generic::Reg<AliasSpec> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bits 0:31 - Write next word in little-endian form. The hash requires big endian word data, but this block swaps the bytes automatically. That is, SHA assumes the data coming in is treated as bytes (e.g. \"abcd\") and since the ARM core will treat \"abcd\" as a word as 0x64636261, the block will swap the word to restore into big endian."]
13    #[inline(always)]
14    pub fn data(&mut self) -> DataW<AliasSpec> {
15        DataW::new(self, 0)
16    }
17}
18#[doc = "no description available\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`alias::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct AliasSpec;
20impl crate::RegisterSpec for AliasSpec {
21    type Ux = u32;
22}
23#[doc = "`write(|w| ..)` method takes [`alias::W`](W) writer structure"]
24impl crate::Writable for AliasSpec {
25    type Safety = crate::Unsafe;
26    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
27    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
28}
29#[doc = "`reset()` method sets ALIAS[%s]
30to value 0"]
31impl crate::Resettable for AliasSpec {
32    const RESET_VALUE: u32 = 0;
33}
mimxrt685s_pac/hashcrypt/alias.rs

mimxrt685s_pac/hashcrypt/
alias.rs
