mimxrt685s_pac/freqme/
freqmectrl_w.rs1#[doc = "Register `FREQMECTRL_W` writer"]
2pub type W = crate::W<FreqmectrlWSpec>;
3#[doc = "Reference Clock Scaling Factor\n\nValue on reset: 0"]
4#[cfg_attr(feature = "defmt", derive(defmt::Format))]
5#[derive(Clone, Copy, Debug, PartialEq, Eq)]
6#[repr(u8)]
7pub enum RefScale {
8 #[doc = "0: Count cycle = 2^0 = 1"]
9 Countcycle1 = 0,
10 #[doc = "1: Count cycle = 2^1 = 2"]
11 Countcycle2 = 1,
12 #[doc = "2: Count cycle = 2^4 = 4"]
13 Countcycle4 = 2,
14 #[doc = "31: Count cycle = 2^31 = 2,147,483,648"]
15 Countcycle31 = 31,
16}
17impl From<RefScale> for u8 {
18 #[inline(always)]
19 fn from(variant: RefScale) -> Self {
20 variant as _
21 }
22}
23impl crate::FieldSpec for RefScale {
24 type Ux = u8;
25}
26impl crate::IsEnum for RefScale {}
27#[doc = "Field `REF_SCALE` writer - Reference Clock Scaling Factor"]
28pub type RefScaleW<'a, REG> = crate::FieldWriter<'a, REG, 5, RefScale>;
29impl<'a, REG> RefScaleW<'a, REG>
30where
31 REG: crate::Writable + crate::RegisterSpec,
32 REG::Ux: From<u8>,
33{
34 #[doc = "Count cycle = 2^0 = 1"]
35 #[inline(always)]
36 pub fn countcycle_1(self) -> &'a mut crate::W<REG> {
37 self.variant(RefScale::Countcycle1)
38 }
39 #[doc = "Count cycle = 2^1 = 2"]
40 #[inline(always)]
41 pub fn countcycle_2(self) -> &'a mut crate::W<REG> {
42 self.variant(RefScale::Countcycle2)
43 }
44 #[doc = "Count cycle = 2^4 = 4"]
45 #[inline(always)]
46 pub fn countcycle_4(self) -> &'a mut crate::W<REG> {
47 self.variant(RefScale::Countcycle4)
48 }
49 #[doc = "Count cycle = 2^31 = 2,147,483,648"]
50 #[inline(always)]
51 pub fn countcycle_31(self) -> &'a mut crate::W<REG> {
52 self.variant(RefScale::Countcycle31)
53 }
54}
55#[doc = "Pulse Width Measurement mode select\n\nValue on reset: 0"]
56#[cfg_attr(feature = "defmt", derive(defmt::Format))]
57#[derive(Clone, Copy, Debug, PartialEq, Eq)]
58pub enum PulseMode {
59 #[doc = "0: Frequency Measurement Mode. FREQMECTRL works in a Frequency Measurement mode. Once the measurement starts (real count start is aligned at rising edge arrival on reference clock), the target counter increments by the target clock until the reference counter running by the reference clock reaches the count end point selected by REF_SCALE."]
60 FreqMeMode = 0,
61 #[doc = "1: Pulse Width Measurement mode. FREQMECTRL works in a Pulse Width Measurement mode, measuring the high or low period of reference clock input selected by PULSE_POL. The target counter starts incrementing by the target clock once a corresponding trigger edge (rising edge for high period measurement and falling edge for low period) occurs."]
62 PulseMeMode = 1,
63}
64impl From<PulseMode> for bool {
65 #[inline(always)]
66 fn from(variant: PulseMode) -> Self {
67 variant as u8 != 0
68 }
69}
70#[doc = "Field `PULSE_MODE` writer - Pulse Width Measurement mode select"]
71pub type PulseModeW<'a, REG> = crate::BitWriter<'a, REG, PulseMode>;
72impl<'a, REG> PulseModeW<'a, REG>
73where
74 REG: crate::Writable + crate::RegisterSpec,
75{
76 #[doc = "Frequency Measurement Mode. FREQMECTRL works in a Frequency Measurement mode. Once the measurement starts (real count start is aligned at rising edge arrival on reference clock), the target counter increments by the target clock until the reference counter running by the reference clock reaches the count end point selected by REF_SCALE."]
77 #[inline(always)]
78 pub fn freq_me_mode(self) -> &'a mut crate::W<REG> {
79 self.variant(PulseMode::FreqMeMode)
80 }
81 #[doc = "Pulse Width Measurement mode. FREQMECTRL works in a Pulse Width Measurement mode, measuring the high or low period of reference clock input selected by PULSE_POL. The target counter starts incrementing by the target clock once a corresponding trigger edge (rising edge for high period measurement and falling edge for low period) occurs."]
82 #[inline(always)]
83 pub fn pulse_me_mode(self) -> &'a mut crate::W<REG> {
84 self.variant(PulseMode::PulseMeMode)
85 }
86}
87#[doc = "Pulse Polarity\n\nValue on reset: 0"]
88#[cfg_attr(feature = "defmt", derive(defmt::Format))]
89#[derive(Clone, Copy, Debug, PartialEq, Eq)]
90pub enum PulsePol {
91 #[doc = "0: High Period. High period of reference clock is measured in Pulse Width Measurement mode triggered by the rising edge on the reference clock input."]
92 HighPeriod = 0,
93 #[doc = "1: Low Period. Low period of reference clock is measured in Pulse Width Measurement mode triggered by the falling edge on the reference clock input."]
94 LowPeriod = 1,
95}
96impl From<PulsePol> for bool {
97 #[inline(always)]
98 fn from(variant: PulsePol) -> Self {
99 variant as u8 != 0
100 }
101}
102#[doc = "Field `PULSE_POL` writer - Pulse Polarity"]
103pub type PulsePolW<'a, REG> = crate::BitWriter<'a, REG, PulsePol>;
104impl<'a, REG> PulsePolW<'a, REG>
105where
106 REG: crate::Writable + crate::RegisterSpec,
107{
108 #[doc = "High Period. High period of reference clock is measured in Pulse Width Measurement mode triggered by the rising edge on the reference clock input."]
109 #[inline(always)]
110 pub fn high_period(self) -> &'a mut crate::W<REG> {
111 self.variant(PulsePol::HighPeriod)
112 }
113 #[doc = "Low Period. Low period of reference clock is measured in Pulse Width Measurement mode triggered by the falling edge on the reference clock input."]
114 #[inline(always)]
115 pub fn low_period(self) -> &'a mut crate::W<REG> {
116 self.variant(PulsePol::LowPeriod)
117 }
118}
119#[doc = "Measure in Progress\n\nValue on reset: 0"]
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122pub enum MeasureInProgress {
123 #[doc = "0: Force Terminate. Forces the termination of any measurement cycle currently in progress and resets RESULT or just resets RESULT if in idle."]
124 ForceTerminate = 0,
125 #[doc = "1: Initiates Measurement Cycle. Initiates frequency or pulse width measurement process. Hardware clears the MEASURE_IN_PROGRESS bit when the measurement cycle completes. A new measurement starts if there is an active measurement in progress."]
126 InitiateAFreqmeCycle = 1,
127}
128impl From<MeasureInProgress> for bool {
129 #[inline(always)]
130 fn from(variant: MeasureInProgress) -> Self {
131 variant as u8 != 0
132 }
133}
134#[doc = "Field `MEASURE_IN_PROGRESS` writer - Measure in Progress"]
135pub type MeasureInProgressW<'a, REG> = crate::BitWriter<'a, REG, MeasureInProgress>;
136impl<'a, REG> MeasureInProgressW<'a, REG>
137where
138 REG: crate::Writable + crate::RegisterSpec,
139{
140 #[doc = "Force Terminate. Forces the termination of any measurement cycle currently in progress and resets RESULT or just resets RESULT if in idle."]
141 #[inline(always)]
142 pub fn force_terminate(self) -> &'a mut crate::W<REG> {
143 self.variant(MeasureInProgress::ForceTerminate)
144 }
145 #[doc = "Initiates Measurement Cycle. Initiates frequency or pulse width measurement process. Hardware clears the MEASURE_IN_PROGRESS bit when the measurement cycle completes. A new measurement starts if there is an active measurement in progress."]
146 #[inline(always)]
147 pub fn initiate_a_freqme_cycle(self) -> &'a mut crate::W<REG> {
148 self.variant(MeasureInProgress::InitiateAFreqmeCycle)
149 }
150}
151#[cfg(feature = "debug")]
152impl core::fmt::Debug for crate::generic::Reg<FreqmectrlWSpec> {
153 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
154 write!(f, "(not readable)")
155 }
156}
157impl W {
158 #[doc = "Bits 0:4 - Reference Clock Scaling Factor"]
159 #[inline(always)]
160 pub fn ref_scale(&mut self) -> RefScaleW<FreqmectrlWSpec> {
161 RefScaleW::new(self, 0)
162 }
163 #[doc = "Bit 8 - Pulse Width Measurement mode select"]
164 #[inline(always)]
165 pub fn pulse_mode(&mut self) -> PulseModeW<FreqmectrlWSpec> {
166 PulseModeW::new(self, 8)
167 }
168 #[doc = "Bit 9 - Pulse Polarity"]
169 #[inline(always)]
170 pub fn pulse_pol(&mut self) -> PulsePolW<FreqmectrlWSpec> {
171 PulsePolW::new(self, 9)
172 }
173 #[doc = "Bit 31 - Measure in Progress"]
174 #[inline(always)]
175 pub fn measure_in_progress(&mut self) -> MeasureInProgressW<FreqmectrlWSpec> {
176 MeasureInProgressW::new(self, 31)
177 }
178}
179#[doc = "Freqeuncy Measurement (in Write mode)\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`freqmectrl_w::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
180pub struct FreqmectrlWSpec;
181impl crate::RegisterSpec for FreqmectrlWSpec {
182 type Ux = u32;
183}
184#[doc = "`write(|w| ..)` method takes [`freqmectrl_w::W`](W) writer structure"]
185impl crate::Writable for FreqmectrlWSpec {
186 type Safety = crate::Unsafe;
187 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
188 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
189}
190#[doc = "`reset()` method sets FREQMECTRL_W to value 0"]
191impl crate::Resettable for FreqmectrlWSpec {
192 const RESET_VALUE: u32 = 0;
193}