mimxrt685s_pac/dma0/
settrig0.rs

1#[doc = "Register `SETTRIG0` writer"]
2pub type W = crate::W<Settrig0Spec>;
3#[doc = "Set Trigger control bit for DMA channel 0.\n\nValue on reset: 0"]
4#[cfg_attr(feature = "defmt", derive(defmt::Format))]
5#[derive(Clone, Copy, Debug, PartialEq, Eq)]
6#[repr(u32)]
7pub enum Trig {
8    #[doc = "0: No effect."]
9    NoEffect = 0,
10    #[doc = "1: Sets the Trig bit for DMA channel 0."]
11    Effect = 1,
12}
13impl From<Trig> for u32 {
14    #[inline(always)]
15    fn from(variant: Trig) -> Self {
16        variant as _
17    }
18}
19impl crate::FieldSpec for Trig {
20    type Ux = u32;
21}
22impl crate::IsEnum for Trig {}
23#[doc = "Field `TRIG` writer - Set Trigger control bit for DMA channel 0."]
24pub type TrigW<'a, REG> = crate::FieldWriter<'a, REG, 32, Trig>;
25impl<'a, REG> TrigW<'a, REG>
26where
27    REG: crate::Writable + crate::RegisterSpec,
28    REG::Ux: From<u32>,
29{
30    #[doc = "No effect."]
31    #[inline(always)]
32    pub fn no_effect(self) -> &'a mut crate::W<REG> {
33        self.variant(Trig::NoEffect)
34    }
35    #[doc = "Sets the Trig bit for DMA channel 0."]
36    #[inline(always)]
37    pub fn effect(self) -> &'a mut crate::W<REG> {
38        self.variant(Trig::Effect)
39    }
40}
41#[cfg(feature = "debug")]
42impl core::fmt::Debug for crate::generic::Reg<Settrig0Spec> {
43    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
44        write!(f, "(not readable)")
45    }
46}
47impl W {
48    #[doc = "Bits 0:31 - Set Trigger control bit for DMA channel 0."]
49    #[inline(always)]
50    pub fn trig(&mut self) -> TrigW<Settrig0Spec> {
51        TrigW::new(self, 0)
52    }
53}
54#[doc = "Set Trigger control bits for all DMA channels.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`settrig0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
55pub struct Settrig0Spec;
56impl crate::RegisterSpec for Settrig0Spec {
57    type Ux = u32;
58}
59#[doc = "`write(|w| ..)` method takes [`settrig0::W`](W) writer structure"]
60impl crate::Writable for Settrig0Spec {
61    type Safety = crate::Unsafe;
62    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
63    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
64}
65#[doc = "`reset()` method sets SETTRIG0 to value 0"]
66impl crate::Resettable for Settrig0Spec {
67    const RESET_VALUE: u32 = 0;
68}
mimxrt685s_pac/dma0/settrig0.rs

mimxrt685s_pac/dma0/
settrig0.rs
