mimxrt685s_pac/dma0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub type R = crate::R<CtrlSpec>;
3#[doc = "Register `CTRL` writer"]
4pub type W = crate::W<CtrlSpec>;
5#[doc = "DMA controller master enable.\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Enable {
9    #[doc = "0: Disabled. The DMA controller is disabled. This clears any triggers that were asserted at the point when disabled, but does not prevent re-triggering when the DMA controller is re-enabled."]
10    Disabled = 0,
11    #[doc = "1: Enabled. The DMA controller is enabled."]
12    Enabled = 1,
13}
14impl From<Enable> for bool {
15    #[inline(always)]
16    fn from(variant: Enable) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `ENABLE` reader - DMA controller master enable."]
21pub type EnableR = crate::BitReader<Enable>;
22impl EnableR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Enable {
26        match self.bits {
27            false => Enable::Disabled,
28            true => Enable::Enabled,
29        }
30    }
31    #[doc = "Disabled. The DMA controller is disabled. This clears any triggers that were asserted at the point when disabled, but does not prevent re-triggering when the DMA controller is re-enabled."]
32    #[inline(always)]
33    pub fn is_disabled(&self) -> bool {
34        *self == Enable::Disabled
35    }
36    #[doc = "Enabled. The DMA controller is enabled."]
37    #[inline(always)]
38    pub fn is_enabled(&self) -> bool {
39        *self == Enable::Enabled
40    }
41}
42#[doc = "Field `ENABLE` writer - DMA controller master enable."]
43pub type EnableW<'a, REG> = crate::BitWriter<'a, REG, Enable>;
44impl<'a, REG> EnableW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Disabled. The DMA controller is disabled. This clears any triggers that were asserted at the point when disabled, but does not prevent re-triggering when the DMA controller is re-enabled."]
49    #[inline(always)]
50    pub fn disabled(self) -> &'a mut crate::W<REG> {
51        self.variant(Enable::Disabled)
52    }
53    #[doc = "Enabled. The DMA controller is enabled."]
54    #[inline(always)]
55    pub fn enabled(self) -> &'a mut crate::W<REG> {
56        self.variant(Enable::Enabled)
57    }
58}
59impl R {
60    #[doc = "Bit 0 - DMA controller master enable."]
61    #[inline(always)]
62    pub fn enable(&self) -> EnableR {
63        EnableR::new((self.bits & 1) != 0)
64    }
65}
66#[cfg(feature = "debug")]
67impl core::fmt::Debug for R {
68    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
69        f.debug_struct("CTRL")
70            .field("enable", &self.enable())
71            .finish()
72    }
73}
74impl W {
75    #[doc = "Bit 0 - DMA controller master enable."]
76    #[inline(always)]
77    pub fn enable(&mut self) -> EnableW<CtrlSpec> {
78        EnableW::new(self, 0)
79    }
80}
81#[doc = "DMA control.\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
82pub struct CtrlSpec;
83impl crate::RegisterSpec for CtrlSpec {
84    type Ux = u32;
85}
86#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
87impl crate::Readable for CtrlSpec {}
88#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
89impl crate::Writable for CtrlSpec {
90    type Safety = crate::Unsafe;
91    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
92    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
93}
94#[doc = "`reset()` method sets CTRL to value 0"]
95impl crate::Resettable for CtrlSpec {
96    const RESET_VALUE: u32 = 0;
97}
mimxrt685s_pac/dma0/ctrl.rs

mimxrt685s_pac/dma0/
ctrl.rs
