mimxrt685s_pac/crc_engine/
mode.rs

1#[doc = "Register `MODE` reader"]
2pub type R = crate::R<ModeSpec>;
3#[doc = "Register `MODE` writer"]
4pub type W = crate::W<ModeSpec>;
5#[doc = "CRC polynomial: 1X = CRC-32 polynomial 01 = CRC-16 polynomial 00 = CRC-CCITT polynomial\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum CrcPolynomial {
10    #[doc = "0: CRC-CCITT polynomial"]
11    CrcCcitt = 0,
12    #[doc = "1: CRC16 polynomial"]
13    Crc16 = 1,
14    #[doc = "2: CRC32 polynomial"]
15    Crc32 = 2,
16}
17impl From<CrcPolynomial> for u8 {
18    #[inline(always)]
19    fn from(variant: CrcPolynomial) -> Self {
20        variant as _
21    }
22}
23impl crate::FieldSpec for CrcPolynomial {
24    type Ux = u8;
25}
26impl crate::IsEnum for CrcPolynomial {}
27#[doc = "Field `CRC_POLY` reader - CRC polynomial: 1X = CRC-32 polynomial 01 = CRC-16 polynomial 00 = CRC-CCITT polynomial"]
28pub type CrcPolyR = crate::FieldReader<CrcPolynomial>;
29impl CrcPolyR {
30    #[doc = "Get enumerated values variant"]
31    #[inline(always)]
32    pub const fn variant(&self) -> Option<CrcPolynomial> {
33        match self.bits {
34            0 => Some(CrcPolynomial::CrcCcitt),
35            1 => Some(CrcPolynomial::Crc16),
36            2 => Some(CrcPolynomial::Crc32),
37            _ => None,
38        }
39    }
40    #[doc = "CRC-CCITT polynomial"]
41    #[inline(always)]
42    pub fn is_crc_ccitt(&self) -> bool {
43        *self == CrcPolynomial::CrcCcitt
44    }
45    #[doc = "CRC16 polynomial"]
46    #[inline(always)]
47    pub fn is_crc16(&self) -> bool {
48        *self == CrcPolynomial::Crc16
49    }
50    #[doc = "CRC32 polynomial"]
51    #[inline(always)]
52    pub fn is_crc32(&self) -> bool {
53        *self == CrcPolynomial::Crc32
54    }
55}
56#[doc = "Field `CRC_POLY` writer - CRC polynomial: 1X = CRC-32 polynomial 01 = CRC-16 polynomial 00 = CRC-CCITT polynomial"]
57pub type CrcPolyW<'a, REG> = crate::FieldWriter<'a, REG, 2, CrcPolynomial>;
58impl<'a, REG> CrcPolyW<'a, REG>
59where
60    REG: crate::Writable + crate::RegisterSpec,
61    REG::Ux: From<u8>,
62{
63    #[doc = "CRC-CCITT polynomial"]
64    #[inline(always)]
65    pub fn crc_ccitt(self) -> &'a mut crate::W<REG> {
66        self.variant(CrcPolynomial::CrcCcitt)
67    }
68    #[doc = "CRC16 polynomial"]
69    #[inline(always)]
70    pub fn crc16(self) -> &'a mut crate::W<REG> {
71        self.variant(CrcPolynomial::Crc16)
72    }
73    #[doc = "CRC32 polynomial"]
74    #[inline(always)]
75    pub fn crc32(self) -> &'a mut crate::W<REG> {
76        self.variant(CrcPolynomial::Crc32)
77    }
78}
79#[doc = "Field `BIT_RVS_WR` reader - Data bit order: 1 = Bit order reverse for CRC_WR_DATA (per byte) 0 = No bit order reverse for CRC_WR_DATA (per byte)"]
80pub type BitRvsWrR = crate::BitReader;
81#[doc = "Field `BIT_RVS_WR` writer - Data bit order: 1 = Bit order reverse for CRC_WR_DATA (per byte) 0 = No bit order reverse for CRC_WR_DATA (per byte)"]
82pub type BitRvsWrW<'a, REG> = crate::BitWriter<'a, REG>;
83#[doc = "Field `CMPL_WR` reader - Data complement: 1 = 1's complement for CRC_WR_DATA 0 = No 1's complement for CRC_WR_DATA"]
84pub type CmplWrR = crate::BitReader;
85#[doc = "Field `CMPL_WR` writer - Data complement: 1 = 1's complement for CRC_WR_DATA 0 = No 1's complement for CRC_WR_DATA"]
86pub type CmplWrW<'a, REG> = crate::BitWriter<'a, REG>;
87#[doc = "Field `BIT_RVS_SUM` reader - CRC sum bit order: 1 = Bit order reverse for CRC_SUM 0 = No bit order reverse for CRC_SUM"]
88pub type BitRvsSumR = crate::BitReader;
89#[doc = "Field `BIT_RVS_SUM` writer - CRC sum bit order: 1 = Bit order reverse for CRC_SUM 0 = No bit order reverse for CRC_SUM"]
90pub type BitRvsSumW<'a, REG> = crate::BitWriter<'a, REG>;
91#[doc = "Field `CMPL_SUM` reader - CRC sum complement: 1 = 1's complement for CRC_SUM 0 = No 1's complement for CRC_SUM"]
92pub type CmplSumR = crate::BitReader;
93#[doc = "Field `CMPL_SUM` writer - CRC sum complement: 1 = 1's complement for CRC_SUM 0 = No 1's complement for CRC_SUM"]
94pub type CmplSumW<'a, REG> = crate::BitWriter<'a, REG>;
95impl R {
96    #[doc = "Bits 0:1 - CRC polynomial: 1X = CRC-32 polynomial 01 = CRC-16 polynomial 00 = CRC-CCITT polynomial"]
97    #[inline(always)]
98    pub fn crc_poly(&self) -> CrcPolyR {
99        CrcPolyR::new((self.bits & 3) as u8)
100    }
101    #[doc = "Bit 2 - Data bit order: 1 = Bit order reverse for CRC_WR_DATA (per byte) 0 = No bit order reverse for CRC_WR_DATA (per byte)"]
102    #[inline(always)]
103    pub fn bit_rvs_wr(&self) -> BitRvsWrR {
104        BitRvsWrR::new(((self.bits >> 2) & 1) != 0)
105    }
106    #[doc = "Bit 3 - Data complement: 1 = 1's complement for CRC_WR_DATA 0 = No 1's complement for CRC_WR_DATA"]
107    #[inline(always)]
108    pub fn cmpl_wr(&self) -> CmplWrR {
109        CmplWrR::new(((self.bits >> 3) & 1) != 0)
110    }
111    #[doc = "Bit 4 - CRC sum bit order: 1 = Bit order reverse for CRC_SUM 0 = No bit order reverse for CRC_SUM"]
112    #[inline(always)]
113    pub fn bit_rvs_sum(&self) -> BitRvsSumR {
114        BitRvsSumR::new(((self.bits >> 4) & 1) != 0)
115    }
116    #[doc = "Bit 5 - CRC sum complement: 1 = 1's complement for CRC_SUM 0 = No 1's complement for CRC_SUM"]
117    #[inline(always)]
118    pub fn cmpl_sum(&self) -> CmplSumR {
119        CmplSumR::new(((self.bits >> 5) & 1) != 0)
120    }
121}
122#[cfg(feature = "debug")]
123impl core::fmt::Debug for R {
124    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
125        f.debug_struct("MODE")
126            .field("crc_poly", &self.crc_poly())
127            .field("bit_rvs_wr", &self.bit_rvs_wr())
128            .field("cmpl_wr", &self.cmpl_wr())
129            .field("bit_rvs_sum", &self.bit_rvs_sum())
130            .field("cmpl_sum", &self.cmpl_sum())
131            .finish()
132    }
133}
134impl W {
135    #[doc = "Bits 0:1 - CRC polynomial: 1X = CRC-32 polynomial 01 = CRC-16 polynomial 00 = CRC-CCITT polynomial"]
136    #[inline(always)]
137    pub fn crc_poly(&mut self) -> CrcPolyW<ModeSpec> {
138        CrcPolyW::new(self, 0)
139    }
140    #[doc = "Bit 2 - Data bit order: 1 = Bit order reverse for CRC_WR_DATA (per byte) 0 = No bit order reverse for CRC_WR_DATA (per byte)"]
141    #[inline(always)]
142    pub fn bit_rvs_wr(&mut self) -> BitRvsWrW<ModeSpec> {
143        BitRvsWrW::new(self, 2)
144    }
145    #[doc = "Bit 3 - Data complement: 1 = 1's complement for CRC_WR_DATA 0 = No 1's complement for CRC_WR_DATA"]
146    #[inline(always)]
147    pub fn cmpl_wr(&mut self) -> CmplWrW<ModeSpec> {
148        CmplWrW::new(self, 3)
149    }
150    #[doc = "Bit 4 - CRC sum bit order: 1 = Bit order reverse for CRC_SUM 0 = No bit order reverse for CRC_SUM"]
151    #[inline(always)]
152    pub fn bit_rvs_sum(&mut self) -> BitRvsSumW<ModeSpec> {
153        BitRvsSumW::new(self, 4)
154    }
155    #[doc = "Bit 5 - CRC sum complement: 1 = 1's complement for CRC_SUM 0 = No 1's complement for CRC_SUM"]
156    #[inline(always)]
157    pub fn cmpl_sum(&mut self) -> CmplSumW<ModeSpec> {
158        CmplSumW::new(self, 5)
159    }
160}
161#[doc = "CRC mode register\n\nYou can [`read`](crate::Reg::read) this register and get [`mode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
162pub struct ModeSpec;
163impl crate::RegisterSpec for ModeSpec {
164    type Ux = u32;
165}
166#[doc = "`read()` method returns [`mode::R`](R) reader structure"]
167impl crate::Readable for ModeSpec {}
168#[doc = "`write(|w| ..)` method takes [`mode::W`](W) writer structure"]
169impl crate::Writable for ModeSpec {
170    type Safety = crate::Unsafe;
171    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
172    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
173}
174#[doc = "`reset()` method sets MODE to value 0"]
175impl crate::Resettable for ModeSpec {
176    const RESET_VALUE: u32 = 0;
177}
mimxrt685s_pac/crc_engine/mode.rs

mimxrt685s_pac/crc_engine/
mode.rs
