mimxrt685s_pac/clkctl1/
oseventfclksel.rs

1#[doc = "Register `OSEVENTFCLKSEL` reader"]
2pub type R = crate::R<OseventfclkselSpec>;
3#[doc = "Register `OSEVENTFCLKSEL` writer"]
4pub type W = crate::W<OseventfclkselSpec>;
5#[doc = "OS Event Timer Functional Clock Source Selection. . .\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum Sel {
10    #[doc = "0: Low Power Oscillator Clock (LPOSC)."]
11    Lposc = 0,
12    #[doc = "1: RTC 32KHz Clock."]
13    Rtc32khzClk = 1,
14    #[doc = "2: Teal Free Running Clock (Global Time Stamping)"]
15    TealFreeRunningClk = 2,
16    #[doc = "7: None, this may be selected in order to reduce power when no output is needed."]
17    None = 7,
18}
19impl From<Sel> for u8 {
20    #[inline(always)]
21    fn from(variant: Sel) -> Self {
22        variant as _
23    }
24}
25impl crate::FieldSpec for Sel {
26    type Ux = u8;
27}
28impl crate::IsEnum for Sel {}
29#[doc = "Field `SEL` reader - OS Event Timer Functional Clock Source Selection. . ."]
30pub type SelR = crate::FieldReader<Sel>;
31impl SelR {
32    #[doc = "Get enumerated values variant"]
33    #[inline(always)]
34    pub const fn variant(&self) -> Option<Sel> {
35        match self.bits {
36            0 => Some(Sel::Lposc),
37            1 => Some(Sel::Rtc32khzClk),
38            2 => Some(Sel::TealFreeRunningClk),
39            7 => Some(Sel::None),
40            _ => None,
41        }
42    }
43    #[doc = "Low Power Oscillator Clock (LPOSC)."]
44    #[inline(always)]
45    pub fn is_lposc(&self) -> bool {
46        *self == Sel::Lposc
47    }
48    #[doc = "RTC 32KHz Clock."]
49    #[inline(always)]
50    pub fn is_rtc_32khz_clk(&self) -> bool {
51        *self == Sel::Rtc32khzClk
52    }
53    #[doc = "Teal Free Running Clock (Global Time Stamping)"]
54    #[inline(always)]
55    pub fn is_teal_free_running_clk(&self) -> bool {
56        *self == Sel::TealFreeRunningClk
57    }
58    #[doc = "None, this may be selected in order to reduce power when no output is needed."]
59    #[inline(always)]
60    pub fn is_none(&self) -> bool {
61        *self == Sel::None
62    }
63}
64#[doc = "Field `SEL` writer - OS Event Timer Functional Clock Source Selection. . ."]
65pub type SelW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sel>;
66impl<'a, REG> SelW<'a, REG>
67where
68    REG: crate::Writable + crate::RegisterSpec,
69    REG::Ux: From<u8>,
70{
71    #[doc = "Low Power Oscillator Clock (LPOSC)."]
72    #[inline(always)]
73    pub fn lposc(self) -> &'a mut crate::W<REG> {
74        self.variant(Sel::Lposc)
75    }
76    #[doc = "RTC 32KHz Clock."]
77    #[inline(always)]
78    pub fn rtc_32khz_clk(self) -> &'a mut crate::W<REG> {
79        self.variant(Sel::Rtc32khzClk)
80    }
81    #[doc = "Teal Free Running Clock (Global Time Stamping)"]
82    #[inline(always)]
83    pub fn teal_free_running_clk(self) -> &'a mut crate::W<REG> {
84        self.variant(Sel::TealFreeRunningClk)
85    }
86    #[doc = "None, this may be selected in order to reduce power when no output is needed."]
87    #[inline(always)]
88    pub fn none(self) -> &'a mut crate::W<REG> {
89        self.variant(Sel::None)
90    }
91}
92impl R {
93    #[doc = "Bits 0:2 - OS Event Timer Functional Clock Source Selection. . ."]
94    #[inline(always)]
95    pub fn sel(&self) -> SelR {
96        SelR::new((self.bits & 7) as u8)
97    }
98}
99#[cfg(feature = "debug")]
100impl core::fmt::Debug for R {
101    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
102        f.debug_struct("OSEVENTFCLKSEL")
103            .field("sel", &self.sel())
104            .finish()
105    }
106}
107impl W {
108    #[doc = "Bits 0:2 - OS Event Timer Functional Clock Source Selection. . ."]
109    #[inline(always)]
110    pub fn sel(&mut self) -> SelW<OseventfclkselSpec> {
111        SelW::new(self, 0)
112    }
113}
114#[doc = "OS EVENT clock selection\n\nYou can [`read`](crate::Reg::read) this register and get [`oseventfclksel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`oseventfclksel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
115pub struct OseventfclkselSpec;
116impl crate::RegisterSpec for OseventfclkselSpec {
117    type Ux = u32;
118}
119#[doc = "`read()` method returns [`oseventfclksel::R`](R) reader structure"]
120impl crate::Readable for OseventfclkselSpec {}
121#[doc = "`write(|w| ..)` method takes [`oseventfclksel::W`](W) writer structure"]
122impl crate::Writable for OseventfclkselSpec {
123    type Safety = crate::Unsafe;
124    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
125    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
126}
127#[doc = "`reset()` method sets OSEVENTFCLKSEL to value 0"]
128impl crate::Resettable for OseventfclkselSpec {
129    const RESET_VALUE: u32 = 0;
130}
mimxrt685s_pac/clkctl1/oseventfclksel.rs

mimxrt685s_pac/clkctl1/
oseventfclksel.rs
