1#[doc = "Register `MASTER_SEC_LEVEL_ANTI_POL` reader"]
2pub type R = crate::R<MasterSecLevelAntiPolSpec>;
3#[doc = "Register `MASTER_SEC_LEVEL_ANTI_POL` writer"]
4pub type W = crate::W<MasterSecLevelAntiPolSpec>;
5#[doc = "POWERQUAD master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg).\n\nValue on reset: 3"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum PowerquadSec {
10 #[doc = "0: Secure and Priviledge user access allowed."]
11 EnumSP = 0,
12 #[doc = "1: Secure and Non-priviledge user access allowed."]
13 EnumSNp = 1,
14 #[doc = "2: Non-secure and Privilege access allowed."]
15 EnumNsP = 2,
16 #[doc = "3: Non-secure and Non-priviledge user access allowed."]
17 EnumNsNp = 3,
18}
19impl From<PowerquadSec> for u8 {
20 #[inline(always)]
21 fn from(variant: PowerquadSec) -> Self {
22 variant as _
23 }
24}
25impl crate::FieldSpec for PowerquadSec {
26 type Ux = u8;
27}
28impl crate::IsEnum for PowerquadSec {}
29#[doc = "Field `POWERQUAD_SEC` reader - POWERQUAD master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
30pub type PowerquadSecR = crate::FieldReader<PowerquadSec>;
31impl PowerquadSecR {
32 #[doc = "Get enumerated values variant"]
33 #[inline(always)]
34 pub const fn variant(&self) -> PowerquadSec {
35 match self.bits {
36 0 => PowerquadSec::EnumSP,
37 1 => PowerquadSec::EnumSNp,
38 2 => PowerquadSec::EnumNsP,
39 3 => PowerquadSec::EnumNsNp,
40 _ => unreachable!(),
41 }
42 }
43 #[doc = "Secure and Priviledge user access allowed."]
44 #[inline(always)]
45 pub fn is_enum_s_p(&self) -> bool {
46 *self == PowerquadSec::EnumSP
47 }
48 #[doc = "Secure and Non-priviledge user access allowed."]
49 #[inline(always)]
50 pub fn is_enum_s_np(&self) -> bool {
51 *self == PowerquadSec::EnumSNp
52 }
53 #[doc = "Non-secure and Privilege access allowed."]
54 #[inline(always)]
55 pub fn is_enum_ns_p(&self) -> bool {
56 *self == PowerquadSec::EnumNsP
57 }
58 #[doc = "Non-secure and Non-priviledge user access allowed."]
59 #[inline(always)]
60 pub fn is_enum_ns_np(&self) -> bool {
61 *self == PowerquadSec::EnumNsNp
62 }
63}
64#[doc = "Field `POWERQUAD_SEC` writer - POWERQUAD master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
65pub type PowerquadSecW<'a, REG> = crate::FieldWriter<'a, REG, 2, PowerquadSec, crate::Safe>;
66impl<'a, REG> PowerquadSecW<'a, REG>
67where
68 REG: crate::Writable + crate::RegisterSpec,
69 REG::Ux: From<u8>,
70{
71 #[doc = "Secure and Priviledge user access allowed."]
72 #[inline(always)]
73 pub fn enum_s_p(self) -> &'a mut crate::W<REG> {
74 self.variant(PowerquadSec::EnumSP)
75 }
76 #[doc = "Secure and Non-priviledge user access allowed."]
77 #[inline(always)]
78 pub fn enum_s_np(self) -> &'a mut crate::W<REG> {
79 self.variant(PowerquadSec::EnumSNp)
80 }
81 #[doc = "Non-secure and Privilege access allowed."]
82 #[inline(always)]
83 pub fn enum_ns_p(self) -> &'a mut crate::W<REG> {
84 self.variant(PowerquadSec::EnumNsP)
85 }
86 #[doc = "Non-secure and Non-priviledge user access allowed."]
87 #[inline(always)]
88 pub fn enum_ns_np(self) -> &'a mut crate::W<REG> {
89 self.variant(PowerquadSec::EnumNsNp)
90 }
91}
92#[doc = "DSP master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg).\n\nValue on reset: 3"]
93#[cfg_attr(feature = "defmt", derive(defmt::Format))]
94#[derive(Clone, Copy, Debug, PartialEq, Eq)]
95#[repr(u8)]
96pub enum DspSec {
97 #[doc = "0: Secure and Priviledge user access allowed."]
98 EnumSP = 0,
99 #[doc = "1: Secure and Non-priviledge user access allowed."]
100 EnumSNp = 1,
101 #[doc = "2: Non-secure and Privilege access allowed."]
102 EnumNsP = 2,
103 #[doc = "3: Non-secure and Non-priviledge user access allowed."]
104 EnumNsNp = 3,
105}
106impl From<DspSec> for u8 {
107 #[inline(always)]
108 fn from(variant: DspSec) -> Self {
109 variant as _
110 }
111}
112impl crate::FieldSpec for DspSec {
113 type Ux = u8;
114}
115impl crate::IsEnum for DspSec {}
116#[doc = "Field `DSP_SEC` reader - DSP master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
117pub type DspSecR = crate::FieldReader<DspSec>;
118impl DspSecR {
119 #[doc = "Get enumerated values variant"]
120 #[inline(always)]
121 pub const fn variant(&self) -> DspSec {
122 match self.bits {
123 0 => DspSec::EnumSP,
124 1 => DspSec::EnumSNp,
125 2 => DspSec::EnumNsP,
126 3 => DspSec::EnumNsNp,
127 _ => unreachable!(),
128 }
129 }
130 #[doc = "Secure and Priviledge user access allowed."]
131 #[inline(always)]
132 pub fn is_enum_s_p(&self) -> bool {
133 *self == DspSec::EnumSP
134 }
135 #[doc = "Secure and Non-priviledge user access allowed."]
136 #[inline(always)]
137 pub fn is_enum_s_np(&self) -> bool {
138 *self == DspSec::EnumSNp
139 }
140 #[doc = "Non-secure and Privilege access allowed."]
141 #[inline(always)]
142 pub fn is_enum_ns_p(&self) -> bool {
143 *self == DspSec::EnumNsP
144 }
145 #[doc = "Non-secure and Non-priviledge user access allowed."]
146 #[inline(always)]
147 pub fn is_enum_ns_np(&self) -> bool {
148 *self == DspSec::EnumNsNp
149 }
150}
151#[doc = "Field `DSP_SEC` writer - DSP master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
152pub type DspSecW<'a, REG> = crate::FieldWriter<'a, REG, 2, DspSec, crate::Safe>;
153impl<'a, REG> DspSecW<'a, REG>
154where
155 REG: crate::Writable + crate::RegisterSpec,
156 REG::Ux: From<u8>,
157{
158 #[doc = "Secure and Priviledge user access allowed."]
159 #[inline(always)]
160 pub fn enum_s_p(self) -> &'a mut crate::W<REG> {
161 self.variant(DspSec::EnumSP)
162 }
163 #[doc = "Secure and Non-priviledge user access allowed."]
164 #[inline(always)]
165 pub fn enum_s_np(self) -> &'a mut crate::W<REG> {
166 self.variant(DspSec::EnumSNp)
167 }
168 #[doc = "Non-secure and Privilege access allowed."]
169 #[inline(always)]
170 pub fn enum_ns_p(self) -> &'a mut crate::W<REG> {
171 self.variant(DspSec::EnumNsP)
172 }
173 #[doc = "Non-secure and Non-priviledge user access allowed."]
174 #[inline(always)]
175 pub fn enum_ns_np(self) -> &'a mut crate::W<REG> {
176 self.variant(DspSec::EnumNsNp)
177 }
178}
179#[doc = "DMA0 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg).\n\nValue on reset: 3"]
180#[cfg_attr(feature = "defmt", derive(defmt::Format))]
181#[derive(Clone, Copy, Debug, PartialEq, Eq)]
182#[repr(u8)]
183pub enum Dma0Sec {
184 #[doc = "0: Secure and Priviledge user access allowed."]
185 EnumSP = 0,
186 #[doc = "1: Secure and Non-priviledge user access allowed."]
187 EnumSNp = 1,
188 #[doc = "2: Non-secure and Privilege access allowed."]
189 EnumNsP = 2,
190 #[doc = "3: Non-secure and Non-priviledge user access allowed."]
191 EnumNsNp = 3,
192}
193impl From<Dma0Sec> for u8 {
194 #[inline(always)]
195 fn from(variant: Dma0Sec) -> Self {
196 variant as _
197 }
198}
199impl crate::FieldSpec for Dma0Sec {
200 type Ux = u8;
201}
202impl crate::IsEnum for Dma0Sec {}
203#[doc = "Field `DMA0_SEC` reader - DMA0 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
204pub type Dma0SecR = crate::FieldReader<Dma0Sec>;
205impl Dma0SecR {
206 #[doc = "Get enumerated values variant"]
207 #[inline(always)]
208 pub const fn variant(&self) -> Dma0Sec {
209 match self.bits {
210 0 => Dma0Sec::EnumSP,
211 1 => Dma0Sec::EnumSNp,
212 2 => Dma0Sec::EnumNsP,
213 3 => Dma0Sec::EnumNsNp,
214 _ => unreachable!(),
215 }
216 }
217 #[doc = "Secure and Priviledge user access allowed."]
218 #[inline(always)]
219 pub fn is_enum_s_p(&self) -> bool {
220 *self == Dma0Sec::EnumSP
221 }
222 #[doc = "Secure and Non-priviledge user access allowed."]
223 #[inline(always)]
224 pub fn is_enum_s_np(&self) -> bool {
225 *self == Dma0Sec::EnumSNp
226 }
227 #[doc = "Non-secure and Privilege access allowed."]
228 #[inline(always)]
229 pub fn is_enum_ns_p(&self) -> bool {
230 *self == Dma0Sec::EnumNsP
231 }
232 #[doc = "Non-secure and Non-priviledge user access allowed."]
233 #[inline(always)]
234 pub fn is_enum_ns_np(&self) -> bool {
235 *self == Dma0Sec::EnumNsNp
236 }
237}
238#[doc = "Field `DMA0_SEC` writer - DMA0 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
239pub type Dma0SecW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dma0Sec, crate::Safe>;
240impl<'a, REG> Dma0SecW<'a, REG>
241where
242 REG: crate::Writable + crate::RegisterSpec,
243 REG::Ux: From<u8>,
244{
245 #[doc = "Secure and Priviledge user access allowed."]
246 #[inline(always)]
247 pub fn enum_s_p(self) -> &'a mut crate::W<REG> {
248 self.variant(Dma0Sec::EnumSP)
249 }
250 #[doc = "Secure and Non-priviledge user access allowed."]
251 #[inline(always)]
252 pub fn enum_s_np(self) -> &'a mut crate::W<REG> {
253 self.variant(Dma0Sec::EnumSNp)
254 }
255 #[doc = "Non-secure and Privilege access allowed."]
256 #[inline(always)]
257 pub fn enum_ns_p(self) -> &'a mut crate::W<REG> {
258 self.variant(Dma0Sec::EnumNsP)
259 }
260 #[doc = "Non-secure and Non-priviledge user access allowed."]
261 #[inline(always)]
262 pub fn enum_ns_np(self) -> &'a mut crate::W<REG> {
263 self.variant(Dma0Sec::EnumNsNp)
264 }
265}
266#[doc = "DMA1 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg).\n\nValue on reset: 3"]
267#[cfg_attr(feature = "defmt", derive(defmt::Format))]
268#[derive(Clone, Copy, Debug, PartialEq, Eq)]
269#[repr(u8)]
270pub enum Dma1Sec {
271 #[doc = "0: Secure and Priviledge user access allowed."]
272 EnumSP = 0,
273 #[doc = "1: Secure and Non-priviledge user access allowed."]
274 EnumSNp = 1,
275 #[doc = "2: Non-secure and Privilege access allowed."]
276 EnumNsP = 2,
277 #[doc = "3: Non-secure and Non-priviledge user access allowed."]
278 EnumNsNp = 3,
279}
280impl From<Dma1Sec> for u8 {
281 #[inline(always)]
282 fn from(variant: Dma1Sec) -> Self {
283 variant as _
284 }
285}
286impl crate::FieldSpec for Dma1Sec {
287 type Ux = u8;
288}
289impl crate::IsEnum for Dma1Sec {}
290#[doc = "Field `DMA1_SEC` reader - DMA1 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
291pub type Dma1SecR = crate::FieldReader<Dma1Sec>;
292impl Dma1SecR {
293 #[doc = "Get enumerated values variant"]
294 #[inline(always)]
295 pub const fn variant(&self) -> Dma1Sec {
296 match self.bits {
297 0 => Dma1Sec::EnumSP,
298 1 => Dma1Sec::EnumSNp,
299 2 => Dma1Sec::EnumNsP,
300 3 => Dma1Sec::EnumNsNp,
301 _ => unreachable!(),
302 }
303 }
304 #[doc = "Secure and Priviledge user access allowed."]
305 #[inline(always)]
306 pub fn is_enum_s_p(&self) -> bool {
307 *self == Dma1Sec::EnumSP
308 }
309 #[doc = "Secure and Non-priviledge user access allowed."]
310 #[inline(always)]
311 pub fn is_enum_s_np(&self) -> bool {
312 *self == Dma1Sec::EnumSNp
313 }
314 #[doc = "Non-secure and Privilege access allowed."]
315 #[inline(always)]
316 pub fn is_enum_ns_p(&self) -> bool {
317 *self == Dma1Sec::EnumNsP
318 }
319 #[doc = "Non-secure and Non-priviledge user access allowed."]
320 #[inline(always)]
321 pub fn is_enum_ns_np(&self) -> bool {
322 *self == Dma1Sec::EnumNsNp
323 }
324}
325#[doc = "Field `DMA1_SEC` writer - DMA1 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
326pub type Dma1SecW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dma1Sec, crate::Safe>;
327impl<'a, REG> Dma1SecW<'a, REG>
328where
329 REG: crate::Writable + crate::RegisterSpec,
330 REG::Ux: From<u8>,
331{
332 #[doc = "Secure and Priviledge user access allowed."]
333 #[inline(always)]
334 pub fn enum_s_p(self) -> &'a mut crate::W<REG> {
335 self.variant(Dma1Sec::EnumSP)
336 }
337 #[doc = "Secure and Non-priviledge user access allowed."]
338 #[inline(always)]
339 pub fn enum_s_np(self) -> &'a mut crate::W<REG> {
340 self.variant(Dma1Sec::EnumSNp)
341 }
342 #[doc = "Non-secure and Privilege access allowed."]
343 #[inline(always)]
344 pub fn enum_ns_p(self) -> &'a mut crate::W<REG> {
345 self.variant(Dma1Sec::EnumNsP)
346 }
347 #[doc = "Non-secure and Non-priviledge user access allowed."]
348 #[inline(always)]
349 pub fn enum_ns_np(self) -> &'a mut crate::W<REG> {
350 self.variant(Dma1Sec::EnumNsNp)
351 }
352}
353#[doc = "SDIO0 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg).\n\nValue on reset: 3"]
354#[cfg_attr(feature = "defmt", derive(defmt::Format))]
355#[derive(Clone, Copy, Debug, PartialEq, Eq)]
356#[repr(u8)]
357pub enum Sdio0Sec {
358 #[doc = "0: Secure and Priviledge user access allowed."]
359 EnumSP = 0,
360 #[doc = "1: Secure and Non-priviledge user access allowed."]
361 EnumSNp = 1,
362 #[doc = "2: Non-secure and Privilege access allowed."]
363 EnumNsP = 2,
364 #[doc = "3: Non-secure and Non-priviledge user access allowed."]
365 EnumNsNp = 3,
366}
367impl From<Sdio0Sec> for u8 {
368 #[inline(always)]
369 fn from(variant: Sdio0Sec) -> Self {
370 variant as _
371 }
372}
373impl crate::FieldSpec for Sdio0Sec {
374 type Ux = u8;
375}
376impl crate::IsEnum for Sdio0Sec {}
377#[doc = "Field `SDIO0_SEC` reader - SDIO0 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
378pub type Sdio0SecR = crate::FieldReader<Sdio0Sec>;
379impl Sdio0SecR {
380 #[doc = "Get enumerated values variant"]
381 #[inline(always)]
382 pub const fn variant(&self) -> Sdio0Sec {
383 match self.bits {
384 0 => Sdio0Sec::EnumSP,
385 1 => Sdio0Sec::EnumSNp,
386 2 => Sdio0Sec::EnumNsP,
387 3 => Sdio0Sec::EnumNsNp,
388 _ => unreachable!(),
389 }
390 }
391 #[doc = "Secure and Priviledge user access allowed."]
392 #[inline(always)]
393 pub fn is_enum_s_p(&self) -> bool {
394 *self == Sdio0Sec::EnumSP
395 }
396 #[doc = "Secure and Non-priviledge user access allowed."]
397 #[inline(always)]
398 pub fn is_enum_s_np(&self) -> bool {
399 *self == Sdio0Sec::EnumSNp
400 }
401 #[doc = "Non-secure and Privilege access allowed."]
402 #[inline(always)]
403 pub fn is_enum_ns_p(&self) -> bool {
404 *self == Sdio0Sec::EnumNsP
405 }
406 #[doc = "Non-secure and Non-priviledge user access allowed."]
407 #[inline(always)]
408 pub fn is_enum_ns_np(&self) -> bool {
409 *self == Sdio0Sec::EnumNsNp
410 }
411}
412#[doc = "Field `SDIO0_SEC` writer - SDIO0 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
413pub type Sdio0SecW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sdio0Sec, crate::Safe>;
414impl<'a, REG> Sdio0SecW<'a, REG>
415where
416 REG: crate::Writable + crate::RegisterSpec,
417 REG::Ux: From<u8>,
418{
419 #[doc = "Secure and Priviledge user access allowed."]
420 #[inline(always)]
421 pub fn enum_s_p(self) -> &'a mut crate::W<REG> {
422 self.variant(Sdio0Sec::EnumSP)
423 }
424 #[doc = "Secure and Non-priviledge user access allowed."]
425 #[inline(always)]
426 pub fn enum_s_np(self) -> &'a mut crate::W<REG> {
427 self.variant(Sdio0Sec::EnumSNp)
428 }
429 #[doc = "Non-secure and Privilege access allowed."]
430 #[inline(always)]
431 pub fn enum_ns_p(self) -> &'a mut crate::W<REG> {
432 self.variant(Sdio0Sec::EnumNsP)
433 }
434 #[doc = "Non-secure and Non-priviledge user access allowed."]
435 #[inline(always)]
436 pub fn enum_ns_np(self) -> &'a mut crate::W<REG> {
437 self.variant(Sdio0Sec::EnumNsNp)
438 }
439}
440#[doc = "SDIO1 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg).\n\nValue on reset: 3"]
441#[cfg_attr(feature = "defmt", derive(defmt::Format))]
442#[derive(Clone, Copy, Debug, PartialEq, Eq)]
443#[repr(u8)]
444pub enum Sdio1Sec {
445 #[doc = "0: Secure and Priviledge user access allowed."]
446 EnumSP = 0,
447 #[doc = "1: Secure and Non-priviledge user access allowed."]
448 EnumSNp = 1,
449 #[doc = "2: Non-secure and Privilege access allowed."]
450 EnumNsP = 2,
451 #[doc = "3: Non-secure and Non-priviledge user access allowed."]
452 EnumNsNp = 3,
453}
454impl From<Sdio1Sec> for u8 {
455 #[inline(always)]
456 fn from(variant: Sdio1Sec) -> Self {
457 variant as _
458 }
459}
460impl crate::FieldSpec for Sdio1Sec {
461 type Ux = u8;
462}
463impl crate::IsEnum for Sdio1Sec {}
464#[doc = "Field `SDIO1_SEC` reader - SDIO1 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
465pub type Sdio1SecR = crate::FieldReader<Sdio1Sec>;
466impl Sdio1SecR {
467 #[doc = "Get enumerated values variant"]
468 #[inline(always)]
469 pub const fn variant(&self) -> Sdio1Sec {
470 match self.bits {
471 0 => Sdio1Sec::EnumSP,
472 1 => Sdio1Sec::EnumSNp,
473 2 => Sdio1Sec::EnumNsP,
474 3 => Sdio1Sec::EnumNsNp,
475 _ => unreachable!(),
476 }
477 }
478 #[doc = "Secure and Priviledge user access allowed."]
479 #[inline(always)]
480 pub fn is_enum_s_p(&self) -> bool {
481 *self == Sdio1Sec::EnumSP
482 }
483 #[doc = "Secure and Non-priviledge user access allowed."]
484 #[inline(always)]
485 pub fn is_enum_s_np(&self) -> bool {
486 *self == Sdio1Sec::EnumSNp
487 }
488 #[doc = "Non-secure and Privilege access allowed."]
489 #[inline(always)]
490 pub fn is_enum_ns_p(&self) -> bool {
491 *self == Sdio1Sec::EnumNsP
492 }
493 #[doc = "Non-secure and Non-priviledge user access allowed."]
494 #[inline(always)]
495 pub fn is_enum_ns_np(&self) -> bool {
496 *self == Sdio1Sec::EnumNsNp
497 }
498}
499#[doc = "Field `SDIO1_SEC` writer - SDIO1 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
500pub type Sdio1SecW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sdio1Sec, crate::Safe>;
501impl<'a, REG> Sdio1SecW<'a, REG>
502where
503 REG: crate::Writable + crate::RegisterSpec,
504 REG::Ux: From<u8>,
505{
506 #[doc = "Secure and Priviledge user access allowed."]
507 #[inline(always)]
508 pub fn enum_s_p(self) -> &'a mut crate::W<REG> {
509 self.variant(Sdio1Sec::EnumSP)
510 }
511 #[doc = "Secure and Non-priviledge user access allowed."]
512 #[inline(always)]
513 pub fn enum_s_np(self) -> &'a mut crate::W<REG> {
514 self.variant(Sdio1Sec::EnumSNp)
515 }
516 #[doc = "Non-secure and Privilege access allowed."]
517 #[inline(always)]
518 pub fn enum_ns_p(self) -> &'a mut crate::W<REG> {
519 self.variant(Sdio1Sec::EnumNsP)
520 }
521 #[doc = "Non-secure and Non-priviledge user access allowed."]
522 #[inline(always)]
523 pub fn enum_ns_np(self) -> &'a mut crate::W<REG> {
524 self.variant(Sdio1Sec::EnumNsNp)
525 }
526}
527#[doc = "MASTER_SEC_LEVEL_ANTI_POL register write-lock.\n\nValue on reset: 2"]
528#[cfg_attr(feature = "defmt", derive(defmt::Format))]
529#[derive(Clone, Copy, Debug, PartialEq, Eq)]
530#[repr(u8)]
531pub enum MasterSecLevelAntiPoleLock {
532 #[doc = "1: Restrictive mode."]
533 Blocked = 1,
534 #[doc = "2: Writable."]
535 Writable = 2,
536}
537impl From<MasterSecLevelAntiPoleLock> for u8 {
538 #[inline(always)]
539 fn from(variant: MasterSecLevelAntiPoleLock) -> Self {
540 variant as _
541 }
542}
543impl crate::FieldSpec for MasterSecLevelAntiPoleLock {
544 type Ux = u8;
545}
546impl crate::IsEnum for MasterSecLevelAntiPoleLock {}
547#[doc = "Field `MASTER_SEC_LEVEL_ANTI_POLE_LOCK` reader - MASTER_SEC_LEVEL_ANTI_POL register write-lock."]
548pub type MasterSecLevelAntiPoleLockR = crate::FieldReader<MasterSecLevelAntiPoleLock>;
549impl MasterSecLevelAntiPoleLockR {
550 #[doc = "Get enumerated values variant"]
551 #[inline(always)]
552 pub const fn variant(&self) -> Option<MasterSecLevelAntiPoleLock> {
553 match self.bits {
554 1 => Some(MasterSecLevelAntiPoleLock::Blocked),
555 2 => Some(MasterSecLevelAntiPoleLock::Writable),
556 _ => None,
557 }
558 }
559 #[doc = "Restrictive mode."]
560 #[inline(always)]
561 pub fn is_blocked(&self) -> bool {
562 *self == MasterSecLevelAntiPoleLock::Blocked
563 }
564 #[doc = "Writable."]
565 #[inline(always)]
566 pub fn is_writable(&self) -> bool {
567 *self == MasterSecLevelAntiPoleLock::Writable
568 }
569}
570#[doc = "Field `MASTER_SEC_LEVEL_ANTI_POLE_LOCK` writer - MASTER_SEC_LEVEL_ANTI_POL register write-lock."]
571pub type MasterSecLevelAntiPoleLockW<'a, REG> =
572 crate::FieldWriter<'a, REG, 2, MasterSecLevelAntiPoleLock>;
573impl<'a, REG> MasterSecLevelAntiPoleLockW<'a, REG>
574where
575 REG: crate::Writable + crate::RegisterSpec,
576 REG::Ux: From<u8>,
577{
578 #[doc = "Restrictive mode."]
579 #[inline(always)]
580 pub fn blocked(self) -> &'a mut crate::W<REG> {
581 self.variant(MasterSecLevelAntiPoleLock::Blocked)
582 }
583 #[doc = "Writable."]
584 #[inline(always)]
585 pub fn writable(self) -> &'a mut crate::W<REG> {
586 self.variant(MasterSecLevelAntiPoleLock::Writable)
587 }
588}
589impl R {
590 #[doc = "Bits 4:5 - POWERQUAD master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
591 #[inline(always)]
592 pub fn powerquad_sec(&self) -> PowerquadSecR {
593 PowerquadSecR::new(((self.bits >> 4) & 3) as u8)
594 }
595 #[doc = "Bits 6:7 - DSP master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
596 #[inline(always)]
597 pub fn dsp_sec(&self) -> DspSecR {
598 DspSecR::new(((self.bits >> 6) & 3) as u8)
599 }
600 #[doc = "Bits 8:9 - DMA0 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
601 #[inline(always)]
602 pub fn dma0_sec(&self) -> Dma0SecR {
603 Dma0SecR::new(((self.bits >> 8) & 3) as u8)
604 }
605 #[doc = "Bits 10:11 - DMA1 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
606 #[inline(always)]
607 pub fn dma1_sec(&self) -> Dma1SecR {
608 Dma1SecR::new(((self.bits >> 10) & 3) as u8)
609 }
610 #[doc = "Bits 12:13 - SDIO0 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
611 #[inline(always)]
612 pub fn sdio0_sec(&self) -> Sdio0SecR {
613 Sdio0SecR::new(((self.bits >> 12) & 3) as u8)
614 }
615 #[doc = "Bits 14:15 - SDIO1 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
616 #[inline(always)]
617 pub fn sdio1_sec(&self) -> Sdio1SecR {
618 Sdio1SecR::new(((self.bits >> 14) & 3) as u8)
619 }
620 #[doc = "Bits 30:31 - MASTER_SEC_LEVEL_ANTI_POL register write-lock."]
621 #[inline(always)]
622 pub fn master_sec_level_anti_pole_lock(&self) -> MasterSecLevelAntiPoleLockR {
623 MasterSecLevelAntiPoleLockR::new(((self.bits >> 30) & 3) as u8)
624 }
625}
626#[cfg(feature = "debug")]
627impl core::fmt::Debug for R {
628 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
629 f.debug_struct("MASTER_SEC_LEVEL_ANTI_POL")
630 .field("powerquad_sec", &self.powerquad_sec())
631 .field("dsp_sec", &self.dsp_sec())
632 .field("dma0_sec", &self.dma0_sec())
633 .field("dma1_sec", &self.dma1_sec())
634 .field("sdio0_sec", &self.sdio0_sec())
635 .field("sdio1_sec", &self.sdio1_sec())
636 .field(
637 "master_sec_level_anti_pole_lock",
638 &self.master_sec_level_anti_pole_lock(),
639 )
640 .finish()
641 }
642}
643impl W {
644 #[doc = "Bits 4:5 - POWERQUAD master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
645 #[inline(always)]
646 pub fn powerquad_sec(&mut self) -> PowerquadSecW<MasterSecLevelAntiPolSpec> {
647 PowerquadSecW::new(self, 4)
648 }
649 #[doc = "Bits 6:7 - DSP master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
650 #[inline(always)]
651 pub fn dsp_sec(&mut self) -> DspSecW<MasterSecLevelAntiPolSpec> {
652 DspSecW::new(self, 6)
653 }
654 #[doc = "Bits 8:9 - DMA0 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
655 #[inline(always)]
656 pub fn dma0_sec(&mut self) -> Dma0SecW<MasterSecLevelAntiPolSpec> {
657 Dma0SecW::new(self, 8)
658 }
659 #[doc = "Bits 10:11 - DMA1 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
660 #[inline(always)]
661 pub fn dma1_sec(&mut self) -> Dma1SecW<MasterSecLevelAntiPolSpec> {
662 Dma1SecW::new(self, 10)
663 }
664 #[doc = "Bits 12:13 - SDIO0 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
665 #[inline(always)]
666 pub fn sdio0_sec(&mut self) -> Sdio0SecW<MasterSecLevelAntiPolSpec> {
667 Sdio0SecW::new(self, 12)
668 }
669 #[doc = "Bits 14:15 - SDIO1 master secure level control anti-pole value (i.e It must be written with the inverted value of the corresponding field in master_sec_reg)."]
670 #[inline(always)]
671 pub fn sdio1_sec(&mut self) -> Sdio1SecW<MasterSecLevelAntiPolSpec> {
672 Sdio1SecW::new(self, 14)
673 }
674 #[doc = "Bits 30:31 - MASTER_SEC_LEVEL_ANTI_POL register write-lock."]
675 #[inline(always)]
676 pub fn master_sec_level_anti_pole_lock(
677 &mut self,
678 ) -> MasterSecLevelAntiPoleLockW<MasterSecLevelAntiPolSpec> {
679 MasterSecLevelAntiPoleLockW::new(self, 30)
680 }
681}
682#[doc = "master secure level anti-pole register\n\nYou can [`read`](crate::Reg::read) this register and get [`master_sec_level_anti_pol::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`master_sec_level_anti_pol::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
683pub struct MasterSecLevelAntiPolSpec;
684impl crate::RegisterSpec for MasterSecLevelAntiPolSpec {
685 type Ux = u32;
686}
687#[doc = "`read()` method returns [`master_sec_level_anti_pol::R`](R) reader structure"]
688impl crate::Readable for MasterSecLevelAntiPolSpec {}
689#[doc = "`write(|w| ..)` method takes [`master_sec_level_anti_pol::W`](W) writer structure"]
690impl crate::Writable for MasterSecLevelAntiPolSpec {
691 type Safety = crate::Unsafe;
692 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
693 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
694}
695#[doc = "`reset()` method sets MASTER_SEC_LEVEL_ANTI_POL to value 0xbfff_ffff"]
696impl crate::Resettable for MasterSecLevelAntiPolSpec {
697 const RESET_VALUE: u32 = 0xbfff_ffff;
698}