mimxrt685s_pac/trng/
int_ctrl.rs

1#[doc = "Register `INT_CTRL` reader"]
2pub type R = crate::R<IntCtrlSpec>;
3#[doc = "Register `INT_CTRL` writer"]
4pub type W = crate::W<IntCtrlSpec>;
5#[doc = "Bit position that can be cleared if corresponding bit of INT_STATUS has been asserted.\n\nValue on reset: 1"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum HwErr {
9    #[doc = "0: Corresponding bit of INT_STATUS cleared."]
10    HwErr0 = 0,
11    #[doc = "1: Corresponding bit of INT_STATUS active."]
12    HwErr1 = 1,
13}
14impl From<HwErr> for bool {
15    #[inline(always)]
16    fn from(variant: HwErr) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `HW_ERR` reader - Bit position that can be cleared if corresponding bit of INT_STATUS has been asserted."]
21pub type HwErrR = crate::BitReader<HwErr>;
22impl HwErrR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> HwErr {
26        match self.bits {
27            false => HwErr::HwErr0,
28            true => HwErr::HwErr1,
29        }
30    }
31    #[doc = "Corresponding bit of INT_STATUS cleared."]
32    #[inline(always)]
33    pub fn is_hw_err_0(&self) -> bool {
34        *self == HwErr::HwErr0
35    }
36    #[doc = "Corresponding bit of INT_STATUS active."]
37    #[inline(always)]
38    pub fn is_hw_err_1(&self) -> bool {
39        *self == HwErr::HwErr1
40    }
41}
42#[doc = "Field `HW_ERR` writer - Bit position that can be cleared if corresponding bit of INT_STATUS has been asserted."]
43pub type HwErrW<'a, REG> = crate::BitWriter<'a, REG, HwErr>;
44impl<'a, REG> HwErrW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Corresponding bit of INT_STATUS cleared."]
49    #[inline(always)]
50    pub fn hw_err_0(self) -> &'a mut crate::W<REG> {
51        self.variant(HwErr::HwErr0)
52    }
53    #[doc = "Corresponding bit of INT_STATUS active."]
54    #[inline(always)]
55    pub fn hw_err_1(self) -> &'a mut crate::W<REG> {
56        self.variant(HwErr::HwErr1)
57    }
58}
59#[doc = "Same behavior as bit 0 above.\n\nValue on reset: 1"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum EntVal {
63    #[doc = "0: Same behavior as bit 0 above."]
64    EntVal0 = 0,
65    #[doc = "1: Same behavior as bit 0 above."]
66    EntVal1 = 1,
67}
68impl From<EntVal> for bool {
69    #[inline(always)]
70    fn from(variant: EntVal) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `ENT_VAL` reader - Same behavior as bit 0 above."]
75pub type EntValR = crate::BitReader<EntVal>;
76impl EntValR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> EntVal {
80        match self.bits {
81            false => EntVal::EntVal0,
82            true => EntVal::EntVal1,
83        }
84    }
85    #[doc = "Same behavior as bit 0 above."]
86    #[inline(always)]
87    pub fn is_ent_val_0(&self) -> bool {
88        *self == EntVal::EntVal0
89    }
90    #[doc = "Same behavior as bit 0 above."]
91    #[inline(always)]
92    pub fn is_ent_val_1(&self) -> bool {
93        *self == EntVal::EntVal1
94    }
95}
96#[doc = "Field `ENT_VAL` writer - Same behavior as bit 0 above."]
97pub type EntValW<'a, REG> = crate::BitWriter<'a, REG, EntVal>;
98impl<'a, REG> EntValW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Same behavior as bit 0 above."]
103    #[inline(always)]
104    pub fn ent_val_0(self) -> &'a mut crate::W<REG> {
105        self.variant(EntVal::EntVal0)
106    }
107    #[doc = "Same behavior as bit 0 above."]
108    #[inline(always)]
109    pub fn ent_val_1(self) -> &'a mut crate::W<REG> {
110        self.variant(EntVal::EntVal1)
111    }
112}
113#[doc = "Same behavior as bit 0 above.\n\nValue on reset: 1"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum FrqCtFail {
117    #[doc = "0: Same behavior as bit 0 above."]
118    FrqCtFail0 = 0,
119    #[doc = "1: Same behavior as bit 0 above."]
120    FrqCtFail1 = 1,
121}
122impl From<FrqCtFail> for bool {
123    #[inline(always)]
124    fn from(variant: FrqCtFail) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `FRQ_CT_FAIL` reader - Same behavior as bit 0 above."]
129pub type FrqCtFailR = crate::BitReader<FrqCtFail>;
130impl FrqCtFailR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> FrqCtFail {
134        match self.bits {
135            false => FrqCtFail::FrqCtFail0,
136            true => FrqCtFail::FrqCtFail1,
137        }
138    }
139    #[doc = "Same behavior as bit 0 above."]
140    #[inline(always)]
141    pub fn is_frq_ct_fail_0(&self) -> bool {
142        *self == FrqCtFail::FrqCtFail0
143    }
144    #[doc = "Same behavior as bit 0 above."]
145    #[inline(always)]
146    pub fn is_frq_ct_fail_1(&self) -> bool {
147        *self == FrqCtFail::FrqCtFail1
148    }
149}
150#[doc = "Field `FRQ_CT_FAIL` writer - Same behavior as bit 0 above."]
151pub type FrqCtFailW<'a, REG> = crate::BitWriter<'a, REG, FrqCtFail>;
152impl<'a, REG> FrqCtFailW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Same behavior as bit 0 above."]
157    #[inline(always)]
158    pub fn frq_ct_fail_0(self) -> &'a mut crate::W<REG> {
159        self.variant(FrqCtFail::FrqCtFail0)
160    }
161    #[doc = "Same behavior as bit 0 above."]
162    #[inline(always)]
163    pub fn frq_ct_fail_1(self) -> &'a mut crate::W<REG> {
164        self.variant(FrqCtFail::FrqCtFail1)
165    }
166}
167impl R {
168    #[doc = "Bit 0 - Bit position that can be cleared if corresponding bit of INT_STATUS has been asserted."]
169    #[inline(always)]
170    pub fn hw_err(&self) -> HwErrR {
171        HwErrR::new((self.bits & 1) != 0)
172    }
173    #[doc = "Bit 1 - Same behavior as bit 0 above."]
174    #[inline(always)]
175    pub fn ent_val(&self) -> EntValR {
176        EntValR::new(((self.bits >> 1) & 1) != 0)
177    }
178    #[doc = "Bit 2 - Same behavior as bit 0 above."]
179    #[inline(always)]
180    pub fn frq_ct_fail(&self) -> FrqCtFailR {
181        FrqCtFailR::new(((self.bits >> 2) & 1) != 0)
182    }
183}
184#[cfg(feature = "debug")]
185impl core::fmt::Debug for R {
186    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
187        f.debug_struct("INT_CTRL")
188            .field("hw_err", &self.hw_err())
189            .field("ent_val", &self.ent_val())
190            .field("frq_ct_fail", &self.frq_ct_fail())
191            .finish()
192    }
193}
194impl W {
195    #[doc = "Bit 0 - Bit position that can be cleared if corresponding bit of INT_STATUS has been asserted."]
196    #[inline(always)]
197    pub fn hw_err(&mut self) -> HwErrW<IntCtrlSpec> {
198        HwErrW::new(self, 0)
199    }
200    #[doc = "Bit 1 - Same behavior as bit 0 above."]
201    #[inline(always)]
202    pub fn ent_val(&mut self) -> EntValW<IntCtrlSpec> {
203        EntValW::new(self, 1)
204    }
205    #[doc = "Bit 2 - Same behavior as bit 0 above."]
206    #[inline(always)]
207    pub fn frq_ct_fail(&mut self) -> FrqCtFailW<IntCtrlSpec> {
208        FrqCtFailW::new(self, 2)
209    }
210}
211#[doc = "Interrupt Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
212pub struct IntCtrlSpec;
213impl crate::RegisterSpec for IntCtrlSpec {
214    type Ux = u32;
215}
216#[doc = "`read()` method returns [`int_ctrl::R`](R) reader structure"]
217impl crate::Readable for IntCtrlSpec {}
218#[doc = "`write(|w| ..)` method takes [`int_ctrl::W`](W) writer structure"]
219impl crate::Writable for IntCtrlSpec {
220    type Safety = crate::Unsafe;
221    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
222    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
223}
224#[doc = "`reset()` method sets INT_CTRL to value 0xffff_ffff"]
225impl crate::Resettable for IntCtrlSpec {
226    const RESET_VALUE: u32 = 0xffff_ffff;
227}
mimxrt685s_pac/trng/int_ctrl.rs

mimxrt685s_pac/trng/
int_ctrl.rs
