1#[doc = "Register `STAT` reader"]
2pub type R = crate::R<StatSpec>;
3#[doc = "Register `STAT` writer"]
4pub type W = crate::W<StatSpec>;
5#[doc = "Master Pending. Indicates that the Master is waiting to continue communication on the I2C-bus (pending) or is idle. When the master is pending, the MSTSTATE bits indicate what type of software service if any the master expects. This flag will cause an interrupt when set if, enabled via the INTENSET register. The MSTPENDING flag is not set when the DMA is handling an event (if the MSTDMA bit in the MSTCTL register is set). If the master is in the idle state, and no communication is needed, mask this interrupt.\n\nValue on reset: 1"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Mstpending {
9 #[doc = "0: In progress. Communication is in progress and the Master function is busy and cannot currently accept a command."]
10 InProgress = 0,
11 #[doc = "1: Pending. The Master function needs software service or is in the idle state. If the master is not in the idle state, it is waiting to receive or transmit data or the NACK bit."]
12 Pending = 1,
13}
14impl From<Mstpending> for bool {
15 #[inline(always)]
16 fn from(variant: Mstpending) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `MSTPENDING` reader - Master Pending. Indicates that the Master is waiting to continue communication on the I2C-bus (pending) or is idle. When the master is pending, the MSTSTATE bits indicate what type of software service if any the master expects. This flag will cause an interrupt when set if, enabled via the INTENSET register. The MSTPENDING flag is not set when the DMA is handling an event (if the MSTDMA bit in the MSTCTL register is set). If the master is in the idle state, and no communication is needed, mask this interrupt."]
21pub type MstpendingR = crate::BitReader<Mstpending>;
22impl MstpendingR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> Mstpending {
26 match self.bits {
27 false => Mstpending::InProgress,
28 true => Mstpending::Pending,
29 }
30 }
31 #[doc = "In progress. Communication is in progress and the Master function is busy and cannot currently accept a command."]
32 #[inline(always)]
33 pub fn is_in_progress(&self) -> bool {
34 *self == Mstpending::InProgress
35 }
36 #[doc = "Pending. The Master function needs software service or is in the idle state. If the master is not in the idle state, it is waiting to receive or transmit data or the NACK bit."]
37 #[inline(always)]
38 pub fn is_pending(&self) -> bool {
39 *self == Mstpending::Pending
40 }
41}
42#[doc = "Master State code. The master state code reflects the master state when the MSTPENDING bit is set, that is the master is pending or in the idle state. Each value of this field indicates a specific required service for the Master function. All other values are reserved. See Table 400 for details of state values and appropriate responses.\n\nValue on reset: 0"]
43#[cfg_attr(feature = "defmt", derive(defmt::Format))]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum Mststate {
47 #[doc = "0: Idle. The Master function is available to be used for a new transaction."]
48 Idle = 0,
49 #[doc = "1: Receive ready. Received data available (Master Receiver mode). Address plus Read was previously sent and Acknowledged by slave."]
50 ReceiveReady = 1,
51 #[doc = "2: Transmit ready. Data can be transmitted (Master Transmitter mode). Address plus Write was previously sent and Acknowledged by slave."]
52 TransmitReady = 2,
53 #[doc = "3: NACK Address. Slave NACKed address."]
54 NackAddress = 3,
55 #[doc = "4: NACK Data. Slave NACKed transmitted data."]
56 NackData = 4,
57}
58impl From<Mststate> for u8 {
59 #[inline(always)]
60 fn from(variant: Mststate) -> Self {
61 variant as _
62 }
63}
64impl crate::FieldSpec for Mststate {
65 type Ux = u8;
66}
67impl crate::IsEnum for Mststate {}
68#[doc = "Field `MSTSTATE` reader - Master State code. The master state code reflects the master state when the MSTPENDING bit is set, that is the master is pending or in the idle state. Each value of this field indicates a specific required service for the Master function. All other values are reserved. See Table 400 for details of state values and appropriate responses."]
69pub type MststateR = crate::FieldReader<Mststate>;
70impl MststateR {
71 #[doc = "Get enumerated values variant"]
72 #[inline(always)]
73 pub const fn variant(&self) -> Option<Mststate> {
74 match self.bits {
75 0 => Some(Mststate::Idle),
76 1 => Some(Mststate::ReceiveReady),
77 2 => Some(Mststate::TransmitReady),
78 3 => Some(Mststate::NackAddress),
79 4 => Some(Mststate::NackData),
80 _ => None,
81 }
82 }
83 #[doc = "Idle. The Master function is available to be used for a new transaction."]
84 #[inline(always)]
85 pub fn is_idle(&self) -> bool {
86 *self == Mststate::Idle
87 }
88 #[doc = "Receive ready. Received data available (Master Receiver mode). Address plus Read was previously sent and Acknowledged by slave."]
89 #[inline(always)]
90 pub fn is_receive_ready(&self) -> bool {
91 *self == Mststate::ReceiveReady
92 }
93 #[doc = "Transmit ready. Data can be transmitted (Master Transmitter mode). Address plus Write was previously sent and Acknowledged by slave."]
94 #[inline(always)]
95 pub fn is_transmit_ready(&self) -> bool {
96 *self == Mststate::TransmitReady
97 }
98 #[doc = "NACK Address. Slave NACKed address."]
99 #[inline(always)]
100 pub fn is_nack_address(&self) -> bool {
101 *self == Mststate::NackAddress
102 }
103 #[doc = "NACK Data. Slave NACKed transmitted data."]
104 #[inline(always)]
105 pub fn is_nack_data(&self) -> bool {
106 *self == Mststate::NackData
107 }
108}
109#[doc = "Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE.\n\nValue on reset: 0"]
110#[cfg_attr(feature = "defmt", derive(defmt::Format))]
111#[derive(Clone, Copy, Debug, PartialEq, Eq)]
112pub enum Mstarbloss {
113 #[doc = "0: No Arbitration Loss has occurred."]
114 NoLoss = 0,
115 #[doc = "1: Arbitration loss. The Master function has experienced an Arbitration Loss. At this point, the Master function has already stopped driving the bus and gone to an idle state. Software can respond by doing nothing, or by sending a Start in order to attempt to gain control of the bus when it next becomes idle."]
116 ArbitrationLoss = 1,
117}
118impl From<Mstarbloss> for bool {
119 #[inline(always)]
120 fn from(variant: Mstarbloss) -> Self {
121 variant as u8 != 0
122 }
123}
124#[doc = "Field `MSTARBLOSS` reader - Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
125pub type MstarblossR = crate::BitReader<Mstarbloss>;
126impl MstarblossR {
127 #[doc = "Get enumerated values variant"]
128 #[inline(always)]
129 pub const fn variant(&self) -> Mstarbloss {
130 match self.bits {
131 false => Mstarbloss::NoLoss,
132 true => Mstarbloss::ArbitrationLoss,
133 }
134 }
135 #[doc = "No Arbitration Loss has occurred."]
136 #[inline(always)]
137 pub fn is_no_loss(&self) -> bool {
138 *self == Mstarbloss::NoLoss
139 }
140 #[doc = "Arbitration loss. The Master function has experienced an Arbitration Loss. At this point, the Master function has already stopped driving the bus and gone to an idle state. Software can respond by doing nothing, or by sending a Start in order to attempt to gain control of the bus when it next becomes idle."]
141 #[inline(always)]
142 pub fn is_arbitration_loss(&self) -> bool {
143 *self == Mstarbloss::ArbitrationLoss
144 }
145}
146#[doc = "Field `MSTARBLOSS` writer - Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
147pub type MstarblossW<'a, REG> = crate::BitWriter<'a, REG, Mstarbloss>;
148impl<'a, REG> MstarblossW<'a, REG>
149where
150 REG: crate::Writable + crate::RegisterSpec,
151{
152 #[doc = "No Arbitration Loss has occurred."]
153 #[inline(always)]
154 pub fn no_loss(self) -> &'a mut crate::W<REG> {
155 self.variant(Mstarbloss::NoLoss)
156 }
157 #[doc = "Arbitration loss. The Master function has experienced an Arbitration Loss. At this point, the Master function has already stopped driving the bus and gone to an idle state. Software can respond by doing nothing, or by sending a Start in order to attempt to gain control of the bus when it next becomes idle."]
158 #[inline(always)]
159 pub fn arbitration_loss(self) -> &'a mut crate::W<REG> {
160 self.variant(Mstarbloss::ArbitrationLoss)
161 }
162}
163#[doc = "Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE.\n\nValue on reset: 0"]
164#[cfg_attr(feature = "defmt", derive(defmt::Format))]
165#[derive(Clone, Copy, Debug, PartialEq, Eq)]
166pub enum Mstststperr {
167 #[doc = "0: No Start/Stop Error has occurred."]
168 NoError = 0,
169 #[doc = "1: The Master function has experienced a Start/Stop Error. A Start or Stop was detected at a time when it is not allowed by the I2C specification. The Master interface has stopped driving the bus and gone to an idle state, no action is required. A request for a Start could be made, or software could attempt to insure that the bus has not stalled."]
170 Error = 1,
171}
172impl From<Mstststperr> for bool {
173 #[inline(always)]
174 fn from(variant: Mstststperr) -> Self {
175 variant as u8 != 0
176 }
177}
178#[doc = "Field `MSTSTSTPERR` reader - Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
179pub type MstststperrR = crate::BitReader<Mstststperr>;
180impl MstststperrR {
181 #[doc = "Get enumerated values variant"]
182 #[inline(always)]
183 pub const fn variant(&self) -> Mstststperr {
184 match self.bits {
185 false => Mstststperr::NoError,
186 true => Mstststperr::Error,
187 }
188 }
189 #[doc = "No Start/Stop Error has occurred."]
190 #[inline(always)]
191 pub fn is_no_error(&self) -> bool {
192 *self == Mstststperr::NoError
193 }
194 #[doc = "The Master function has experienced a Start/Stop Error. A Start or Stop was detected at a time when it is not allowed by the I2C specification. The Master interface has stopped driving the bus and gone to an idle state, no action is required. A request for a Start could be made, or software could attempt to insure that the bus has not stalled."]
195 #[inline(always)]
196 pub fn is_error(&self) -> bool {
197 *self == Mstststperr::Error
198 }
199}
200#[doc = "Field `MSTSTSTPERR` writer - Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
201pub type MstststperrW<'a, REG> = crate::BitWriter<'a, REG, Mstststperr>;
202impl<'a, REG> MstststperrW<'a, REG>
203where
204 REG: crate::Writable + crate::RegisterSpec,
205{
206 #[doc = "No Start/Stop Error has occurred."]
207 #[inline(always)]
208 pub fn no_error(self) -> &'a mut crate::W<REG> {
209 self.variant(Mstststperr::NoError)
210 }
211 #[doc = "The Master function has experienced a Start/Stop Error. A Start or Stop was detected at a time when it is not allowed by the I2C specification. The Master interface has stopped driving the bus and gone to an idle state, no action is required. A request for a Start could be made, or software could attempt to insure that the bus has not stalled."]
212 #[inline(always)]
213 pub fn error(self) -> &'a mut crate::W<REG> {
214 self.variant(Mstststperr::Error)
215 }
216}
217#[doc = "Slave Pending. Indicates that the Slave function is waiting to continue communication on the I2C-bus and needs software service. This flag will cause an interrupt when set if enabled via INTENSET. The SLVPENDING flag is not set when the DMA is handling an event (if the SLVDMA bit in the SLVCTL register is set). The SLVPENDING flag is read-only and is automatically cleared when a 1 is written to the SLVCONTINUE bit in the SLVCTL register. The point in time when SlvPending is set depends on whether the I2C interface is in HSCAPABLE mode. See Section 25.7.2.2.2. When the I2C interface is configured to be HSCAPABLE, HS master codes are detected automatically. Due to the requirements of the HS I2C specification, slave addresses must also be detected automatically, since the address must be acknowledged before the clock can be stretched.\n\nValue on reset: 0"]
218#[cfg_attr(feature = "defmt", derive(defmt::Format))]
219#[derive(Clone, Copy, Debug, PartialEq, Eq)]
220pub enum Slvpending {
221 #[doc = "0: In progress. The Slave function does not currently need service."]
222 InProgress = 0,
223 #[doc = "1: Pending. The Slave function needs service. Information on what is needed can be found in the adjacent SLVSTATE field."]
224 Pending = 1,
225}
226impl From<Slvpending> for bool {
227 #[inline(always)]
228 fn from(variant: Slvpending) -> Self {
229 variant as u8 != 0
230 }
231}
232#[doc = "Field `SLVPENDING` reader - Slave Pending. Indicates that the Slave function is waiting to continue communication on the I2C-bus and needs software service. This flag will cause an interrupt when set if enabled via INTENSET. The SLVPENDING flag is not set when the DMA is handling an event (if the SLVDMA bit in the SLVCTL register is set). The SLVPENDING flag is read-only and is automatically cleared when a 1 is written to the SLVCONTINUE bit in the SLVCTL register. The point in time when SlvPending is set depends on whether the I2C interface is in HSCAPABLE mode. See Section 25.7.2.2.2. When the I2C interface is configured to be HSCAPABLE, HS master codes are detected automatically. Due to the requirements of the HS I2C specification, slave addresses must also be detected automatically, since the address must be acknowledged before the clock can be stretched."]
233pub type SlvpendingR = crate::BitReader<Slvpending>;
234impl SlvpendingR {
235 #[doc = "Get enumerated values variant"]
236 #[inline(always)]
237 pub const fn variant(&self) -> Slvpending {
238 match self.bits {
239 false => Slvpending::InProgress,
240 true => Slvpending::Pending,
241 }
242 }
243 #[doc = "In progress. The Slave function does not currently need service."]
244 #[inline(always)]
245 pub fn is_in_progress(&self) -> bool {
246 *self == Slvpending::InProgress
247 }
248 #[doc = "Pending. The Slave function needs service. Information on what is needed can be found in the adjacent SLVSTATE field."]
249 #[inline(always)]
250 pub fn is_pending(&self) -> bool {
251 *self == Slvpending::Pending
252 }
253}
254#[doc = "Slave State code. Each value of this field indicates a specific required service for the Slave function. All other values are reserved. See Table 401 for state values and actions. note that the occurrence of some states and how they are handled are affected by DMA mode and Automatic Operation modes.\n\nValue on reset: 0"]
255#[cfg_attr(feature = "defmt", derive(defmt::Format))]
256#[derive(Clone, Copy, Debug, PartialEq, Eq)]
257#[repr(u8)]
258pub enum Slvstate {
259 #[doc = "0: Slave address. Address plus R/W received. At least one of the four slave addresses has been matched by hardware."]
260 SlaveAddress = 0,
261 #[doc = "1: Slave receive. Received data is available (Slave Receiver mode)."]
262 SlaveReceive = 1,
263 #[doc = "2: Slave transmit. Data can be transmitted (Slave Transmitter mode)."]
264 SlaveTransmit = 2,
265}
266impl From<Slvstate> for u8 {
267 #[inline(always)]
268 fn from(variant: Slvstate) -> Self {
269 variant as _
270 }
271}
272impl crate::FieldSpec for Slvstate {
273 type Ux = u8;
274}
275impl crate::IsEnum for Slvstate {}
276#[doc = "Field `SLVSTATE` reader - Slave State code. Each value of this field indicates a specific required service for the Slave function. All other values are reserved. See Table 401 for state values and actions. note that the occurrence of some states and how they are handled are affected by DMA mode and Automatic Operation modes."]
277pub type SlvstateR = crate::FieldReader<Slvstate>;
278impl SlvstateR {
279 #[doc = "Get enumerated values variant"]
280 #[inline(always)]
281 pub const fn variant(&self) -> Option<Slvstate> {
282 match self.bits {
283 0 => Some(Slvstate::SlaveAddress),
284 1 => Some(Slvstate::SlaveReceive),
285 2 => Some(Slvstate::SlaveTransmit),
286 _ => None,
287 }
288 }
289 #[doc = "Slave address. Address plus R/W received. At least one of the four slave addresses has been matched by hardware."]
290 #[inline(always)]
291 pub fn is_slave_address(&self) -> bool {
292 *self == Slvstate::SlaveAddress
293 }
294 #[doc = "Slave receive. Received data is available (Slave Receiver mode)."]
295 #[inline(always)]
296 pub fn is_slave_receive(&self) -> bool {
297 *self == Slvstate::SlaveReceive
298 }
299 #[doc = "Slave transmit. Data can be transmitted (Slave Transmitter mode)."]
300 #[inline(always)]
301 pub fn is_slave_transmit(&self) -> bool {
302 *self == Slvstate::SlaveTransmit
303 }
304}
305#[doc = "Slave Not Stretching. Indicates when the slave function is stretching the I2C clock. This is needed in order to gracefully invoke Deep Sleep or Power-down modes during slave operation. This read-only flag reflects the slave function status in real time.\n\nValue on reset: 1"]
306#[cfg_attr(feature = "defmt", derive(defmt::Format))]
307#[derive(Clone, Copy, Debug, PartialEq, Eq)]
308pub enum Slvnotstr {
309 #[doc = "0: Stretching. The slave function is currently stretching the I2C bus clock. Deep-Sleep or Power-down mode cannot be entered at this time."]
310 Stretching = 0,
311 #[doc = "1: Not stretching. The slave function is not currently stretching the I 2C bus clock. Deep-sleep or Power-down mode could be entered at this time."]
312 NotStretching = 1,
313}
314impl From<Slvnotstr> for bool {
315 #[inline(always)]
316 fn from(variant: Slvnotstr) -> Self {
317 variant as u8 != 0
318 }
319}
320#[doc = "Field `SLVNOTSTR` reader - Slave Not Stretching. Indicates when the slave function is stretching the I2C clock. This is needed in order to gracefully invoke Deep Sleep or Power-down modes during slave operation. This read-only flag reflects the slave function status in real time."]
321pub type SlvnotstrR = crate::BitReader<Slvnotstr>;
322impl SlvnotstrR {
323 #[doc = "Get enumerated values variant"]
324 #[inline(always)]
325 pub const fn variant(&self) -> Slvnotstr {
326 match self.bits {
327 false => Slvnotstr::Stretching,
328 true => Slvnotstr::NotStretching,
329 }
330 }
331 #[doc = "Stretching. The slave function is currently stretching the I2C bus clock. Deep-Sleep or Power-down mode cannot be entered at this time."]
332 #[inline(always)]
333 pub fn is_stretching(&self) -> bool {
334 *self == Slvnotstr::Stretching
335 }
336 #[doc = "Not stretching. The slave function is not currently stretching the I 2C bus clock. Deep-sleep or Power-down mode could be entered at this time."]
337 #[inline(always)]
338 pub fn is_not_stretching(&self) -> bool {
339 *self == Slvnotstr::NotStretching
340 }
341}
342#[doc = "Slave address match Index. This field is valid when the I2C slave function has been selected by receiving an address that matches one of the slave addresses defined by any enabled slave address registers, and provides an identification of the address that was matched. It is possible that more than one address could be matched, but only one match can be reported here.\n\nValue on reset: 0"]
343#[cfg_attr(feature = "defmt", derive(defmt::Format))]
344#[derive(Clone, Copy, Debug, PartialEq, Eq)]
345#[repr(u8)]
346pub enum Slvidx {
347 #[doc = "0: Address 0. Slave address 0 was matched."]
348 Address0 = 0,
349 #[doc = "1: Address 1. Slave address 1 was matched."]
350 Address1 = 1,
351 #[doc = "2: Address 2. Slave address 2 was matched."]
352 Address2 = 2,
353 #[doc = "3: Address 3. Slave address 3 was matched."]
354 Address3 = 3,
355}
356impl From<Slvidx> for u8 {
357 #[inline(always)]
358 fn from(variant: Slvidx) -> Self {
359 variant as _
360 }
361}
362impl crate::FieldSpec for Slvidx {
363 type Ux = u8;
364}
365impl crate::IsEnum for Slvidx {}
366#[doc = "Field `SLVIDX` reader - Slave address match Index. This field is valid when the I2C slave function has been selected by receiving an address that matches one of the slave addresses defined by any enabled slave address registers, and provides an identification of the address that was matched. It is possible that more than one address could be matched, but only one match can be reported here."]
367pub type SlvidxR = crate::FieldReader<Slvidx>;
368impl SlvidxR {
369 #[doc = "Get enumerated values variant"]
370 #[inline(always)]
371 pub const fn variant(&self) -> Slvidx {
372 match self.bits {
373 0 => Slvidx::Address0,
374 1 => Slvidx::Address1,
375 2 => Slvidx::Address2,
376 3 => Slvidx::Address3,
377 _ => unreachable!(),
378 }
379 }
380 #[doc = "Address 0. Slave address 0 was matched."]
381 #[inline(always)]
382 pub fn is_address0(&self) -> bool {
383 *self == Slvidx::Address0
384 }
385 #[doc = "Address 1. Slave address 1 was matched."]
386 #[inline(always)]
387 pub fn is_address1(&self) -> bool {
388 *self == Slvidx::Address1
389 }
390 #[doc = "Address 2. Slave address 2 was matched."]
391 #[inline(always)]
392 pub fn is_address2(&self) -> bool {
393 *self == Slvidx::Address2
394 }
395 #[doc = "Address 3. Slave address 3 was matched."]
396 #[inline(always)]
397 pub fn is_address3(&self) -> bool {
398 *self == Slvidx::Address3
399 }
400}
401#[doc = "Slave selected flag. SLVSEL is set after an address match when software tells the Slave function to acknowledge the address, or when the address has been automatically acknowledged. It is cleared when another address cycle presents an address that does not match an enabled address on the Slave function, when slave software decides to NACK a matched address, when there is a Stop detected on the bus, when the master NACKs slave data, and in some combinations of Automatic Operation. SLVSEL is not cleared if software NACKs data.\n\nValue on reset: 0"]
402#[cfg_attr(feature = "defmt", derive(defmt::Format))]
403#[derive(Clone, Copy, Debug, PartialEq, Eq)]
404pub enum Slvsel {
405 #[doc = "0: Not selected. The Slave function is not currently selected."]
406 NotSelected = 0,
407 #[doc = "1: Selected. The Slave function is currently selected."]
408 Selected = 1,
409}
410impl From<Slvsel> for bool {
411 #[inline(always)]
412 fn from(variant: Slvsel) -> Self {
413 variant as u8 != 0
414 }
415}
416#[doc = "Field `SLVSEL` reader - Slave selected flag. SLVSEL is set after an address match when software tells the Slave function to acknowledge the address, or when the address has been automatically acknowledged. It is cleared when another address cycle presents an address that does not match an enabled address on the Slave function, when slave software decides to NACK a matched address, when there is a Stop detected on the bus, when the master NACKs slave data, and in some combinations of Automatic Operation. SLVSEL is not cleared if software NACKs data."]
417pub type SlvselR = crate::BitReader<Slvsel>;
418impl SlvselR {
419 #[doc = "Get enumerated values variant"]
420 #[inline(always)]
421 pub const fn variant(&self) -> Slvsel {
422 match self.bits {
423 false => Slvsel::NotSelected,
424 true => Slvsel::Selected,
425 }
426 }
427 #[doc = "Not selected. The Slave function is not currently selected."]
428 #[inline(always)]
429 pub fn is_not_selected(&self) -> bool {
430 *self == Slvsel::NotSelected
431 }
432 #[doc = "Selected. The Slave function is currently selected."]
433 #[inline(always)]
434 pub fn is_selected(&self) -> bool {
435 *self == Slvsel::Selected
436 }
437}
438#[doc = "Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit.\n\nValue on reset: 0"]
439#[cfg_attr(feature = "defmt", derive(defmt::Format))]
440#[derive(Clone, Copy, Debug, PartialEq, Eq)]
441pub enum Slvdesel {
442 #[doc = "0: Not deselected. The Slave function has not become deselected. This does not mean that it is currently selected. That information can be found in the SLVSEL flag."]
443 NotDeselected = 0,
444 #[doc = "1: Deselected. The Slave function has become deselected. This is specifically caused by the SLVSEL flag changing from 1 to 0. See the description of SLVSEL for details on when that event occurs."]
445 Deselected = 1,
446}
447impl From<Slvdesel> for bool {
448 #[inline(always)]
449 fn from(variant: Slvdesel) -> Self {
450 variant as u8 != 0
451 }
452}
453#[doc = "Field `SLVDESEL` reader - Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit."]
454pub type SlvdeselR = crate::BitReader<Slvdesel>;
455impl SlvdeselR {
456 #[doc = "Get enumerated values variant"]
457 #[inline(always)]
458 pub const fn variant(&self) -> Slvdesel {
459 match self.bits {
460 false => Slvdesel::NotDeselected,
461 true => Slvdesel::Deselected,
462 }
463 }
464 #[doc = "Not deselected. The Slave function has not become deselected. This does not mean that it is currently selected. That information can be found in the SLVSEL flag."]
465 #[inline(always)]
466 pub fn is_not_deselected(&self) -> bool {
467 *self == Slvdesel::NotDeselected
468 }
469 #[doc = "Deselected. The Slave function has become deselected. This is specifically caused by the SLVSEL flag changing from 1 to 0. See the description of SLVSEL for details on when that event occurs."]
470 #[inline(always)]
471 pub fn is_deselected(&self) -> bool {
472 *self == Slvdesel::Deselected
473 }
474}
475#[doc = "Field `SLVDESEL` writer - Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit."]
476pub type SlvdeselW<'a, REG> = crate::BitWriter<'a, REG, Slvdesel>;
477impl<'a, REG> SlvdeselW<'a, REG>
478where
479 REG: crate::Writable + crate::RegisterSpec,
480{
481 #[doc = "Not deselected. The Slave function has not become deselected. This does not mean that it is currently selected. That information can be found in the SLVSEL flag."]
482 #[inline(always)]
483 pub fn not_deselected(self) -> &'a mut crate::W<REG> {
484 self.variant(Slvdesel::NotDeselected)
485 }
486 #[doc = "Deselected. The Slave function has become deselected. This is specifically caused by the SLVSEL flag changing from 1 to 0. See the description of SLVSEL for details on when that event occurs."]
487 #[inline(always)]
488 pub fn deselected(self) -> &'a mut crate::W<REG> {
489 self.variant(Slvdesel::Deselected)
490 }
491}
492#[doc = "Monitor Ready. This flag is cleared when the MONRXDAT register is read.\n\nValue on reset: 0"]
493#[cfg_attr(feature = "defmt", derive(defmt::Format))]
494#[derive(Clone, Copy, Debug, PartialEq, Eq)]
495pub enum Monrdy {
496 #[doc = "0: No data. The Monitor function does not currently have data available."]
497 NoData = 0,
498 #[doc = "1: Data waiting. The Monitor function has data waiting to be read."]
499 DataWaiting = 1,
500}
501impl From<Monrdy> for bool {
502 #[inline(always)]
503 fn from(variant: Monrdy) -> Self {
504 variant as u8 != 0
505 }
506}
507#[doc = "Field `MONRDY` reader - Monitor Ready. This flag is cleared when the MONRXDAT register is read."]
508pub type MonrdyR = crate::BitReader<Monrdy>;
509impl MonrdyR {
510 #[doc = "Get enumerated values variant"]
511 #[inline(always)]
512 pub const fn variant(&self) -> Monrdy {
513 match self.bits {
514 false => Monrdy::NoData,
515 true => Monrdy::DataWaiting,
516 }
517 }
518 #[doc = "No data. The Monitor function does not currently have data available."]
519 #[inline(always)]
520 pub fn is_no_data(&self) -> bool {
521 *self == Monrdy::NoData
522 }
523 #[doc = "Data waiting. The Monitor function has data waiting to be read."]
524 #[inline(always)]
525 pub fn is_data_waiting(&self) -> bool {
526 *self == Monrdy::DataWaiting
527 }
528}
529#[doc = "Monitor Overflow flag.\n\nValue on reset: 0"]
530#[cfg_attr(feature = "defmt", derive(defmt::Format))]
531#[derive(Clone, Copy, Debug, PartialEq, Eq)]
532pub enum Monov {
533 #[doc = "0: No overrun. Monitor data has not overrun."]
534 NoOverrun = 0,
535 #[doc = "1: Overrun. A Monitor data overrun has occurred. This can only happen when Monitor clock stretching not enabled via the MONCLKSTR bit in the CFG register. Writing 1 to this bit clears the flag."]
536 Overrun = 1,
537}
538impl From<Monov> for bool {
539 #[inline(always)]
540 fn from(variant: Monov) -> Self {
541 variant as u8 != 0
542 }
543}
544#[doc = "Field `MONOV` reader - Monitor Overflow flag."]
545pub type MonovR = crate::BitReader<Monov>;
546impl MonovR {
547 #[doc = "Get enumerated values variant"]
548 #[inline(always)]
549 pub const fn variant(&self) -> Monov {
550 match self.bits {
551 false => Monov::NoOverrun,
552 true => Monov::Overrun,
553 }
554 }
555 #[doc = "No overrun. Monitor data has not overrun."]
556 #[inline(always)]
557 pub fn is_no_overrun(&self) -> bool {
558 *self == Monov::NoOverrun
559 }
560 #[doc = "Overrun. A Monitor data overrun has occurred. This can only happen when Monitor clock stretching not enabled via the MONCLKSTR bit in the CFG register. Writing 1 to this bit clears the flag."]
561 #[inline(always)]
562 pub fn is_overrun(&self) -> bool {
563 *self == Monov::Overrun
564 }
565}
566#[doc = "Field `MONOV` writer - Monitor Overflow flag."]
567pub type MonovW<'a, REG> = crate::BitWriter<'a, REG, Monov>;
568impl<'a, REG> MonovW<'a, REG>
569where
570 REG: crate::Writable + crate::RegisterSpec,
571{
572 #[doc = "No overrun. Monitor data has not overrun."]
573 #[inline(always)]
574 pub fn no_overrun(self) -> &'a mut crate::W<REG> {
575 self.variant(Monov::NoOverrun)
576 }
577 #[doc = "Overrun. A Monitor data overrun has occurred. This can only happen when Monitor clock stretching not enabled via the MONCLKSTR bit in the CFG register. Writing 1 to this bit clears the flag."]
578 #[inline(always)]
579 pub fn overrun(self) -> &'a mut crate::W<REG> {
580 self.variant(Monov::Overrun)
581 }
582}
583#[doc = "Monitor Active flag. Indicates when the Monitor function considers the I 2C bus to be active. Active is defined here as when some Master is on the bus: a bus Start has occurred more recently than a bus Stop.\n\nValue on reset: 0"]
584#[cfg_attr(feature = "defmt", derive(defmt::Format))]
585#[derive(Clone, Copy, Debug, PartialEq, Eq)]
586pub enum Monactive {
587 #[doc = "0: Inactive. The Monitor function considers the I2C bus to be inactive."]
588 Inactive = 0,
589 #[doc = "1: Active. The Monitor function considers the I2C bus to be active."]
590 Active = 1,
591}
592impl From<Monactive> for bool {
593 #[inline(always)]
594 fn from(variant: Monactive) -> Self {
595 variant as u8 != 0
596 }
597}
598#[doc = "Field `MONACTIVE` reader - Monitor Active flag. Indicates when the Monitor function considers the I 2C bus to be active. Active is defined here as when some Master is on the bus: a bus Start has occurred more recently than a bus Stop."]
599pub type MonactiveR = crate::BitReader<Monactive>;
600impl MonactiveR {
601 #[doc = "Get enumerated values variant"]
602 #[inline(always)]
603 pub const fn variant(&self) -> Monactive {
604 match self.bits {
605 false => Monactive::Inactive,
606 true => Monactive::Active,
607 }
608 }
609 #[doc = "Inactive. The Monitor function considers the I2C bus to be inactive."]
610 #[inline(always)]
611 pub fn is_inactive(&self) -> bool {
612 *self == Monactive::Inactive
613 }
614 #[doc = "Active. The Monitor function considers the I2C bus to be active."]
615 #[inline(always)]
616 pub fn is_active(&self) -> bool {
617 *self == Monactive::Active
618 }
619}
620#[doc = "Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit.\n\nValue on reset: 0"]
621#[cfg_attr(feature = "defmt", derive(defmt::Format))]
622#[derive(Clone, Copy, Debug, PartialEq, Eq)]
623pub enum Monidle {
624 #[doc = "0: Not idle. The I2C bus is not idle, or this flag has been cleared by software."]
625 NotIdle = 0,
626 #[doc = "1: Idle. The I2C bus has gone idle at least once since the last time this flag was cleared by software."]
627 Idle = 1,
628}
629impl From<Monidle> for bool {
630 #[inline(always)]
631 fn from(variant: Monidle) -> Self {
632 variant as u8 != 0
633 }
634}
635#[doc = "Field `MONIDLE` reader - Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit."]
636pub type MonidleR = crate::BitReader<Monidle>;
637impl MonidleR {
638 #[doc = "Get enumerated values variant"]
639 #[inline(always)]
640 pub const fn variant(&self) -> Monidle {
641 match self.bits {
642 false => Monidle::NotIdle,
643 true => Monidle::Idle,
644 }
645 }
646 #[doc = "Not idle. The I2C bus is not idle, or this flag has been cleared by software."]
647 #[inline(always)]
648 pub fn is_not_idle(&self) -> bool {
649 *self == Monidle::NotIdle
650 }
651 #[doc = "Idle. The I2C bus has gone idle at least once since the last time this flag was cleared by software."]
652 #[inline(always)]
653 pub fn is_idle(&self) -> bool {
654 *self == Monidle::Idle
655 }
656}
657#[doc = "Field `MONIDLE` writer - Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit."]
658pub type MonidleW<'a, REG> = crate::BitWriter<'a, REG, Monidle>;
659impl<'a, REG> MonidleW<'a, REG>
660where
661 REG: crate::Writable + crate::RegisterSpec,
662{
663 #[doc = "Not idle. The I2C bus is not idle, or this flag has been cleared by software."]
664 #[inline(always)]
665 pub fn not_idle(self) -> &'a mut crate::W<REG> {
666 self.variant(Monidle::NotIdle)
667 }
668 #[doc = "Idle. The I2C bus has gone idle at least once since the last time this flag was cleared by software."]
669 #[inline(always)]
670 pub fn idle(self) -> &'a mut crate::W<REG> {
671 self.variant(Monidle::Idle)
672 }
673}
674#[doc = "Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle.\n\nValue on reset: 0"]
675#[cfg_attr(feature = "defmt", derive(defmt::Format))]
676#[derive(Clone, Copy, Debug, PartialEq, Eq)]
677pub enum Eventtimeout {
678 #[doc = "0: No time-out. I2C bus events have not caused a time-out."]
679 NoTimeout = 0,
680 #[doc = "1: Event time-out. The time between I2C bus events has been longer than the time specified by the TIMEOUT register."]
681 EvenTimeout = 1,
682}
683impl From<Eventtimeout> for bool {
684 #[inline(always)]
685 fn from(variant: Eventtimeout) -> Self {
686 variant as u8 != 0
687 }
688}
689#[doc = "Field `EVENTTIMEOUT` reader - Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle."]
690pub type EventtimeoutR = crate::BitReader<Eventtimeout>;
691impl EventtimeoutR {
692 #[doc = "Get enumerated values variant"]
693 #[inline(always)]
694 pub const fn variant(&self) -> Eventtimeout {
695 match self.bits {
696 false => Eventtimeout::NoTimeout,
697 true => Eventtimeout::EvenTimeout,
698 }
699 }
700 #[doc = "No time-out. I2C bus events have not caused a time-out."]
701 #[inline(always)]
702 pub fn is_no_timeout(&self) -> bool {
703 *self == Eventtimeout::NoTimeout
704 }
705 #[doc = "Event time-out. The time between I2C bus events has been longer than the time specified by the TIMEOUT register."]
706 #[inline(always)]
707 pub fn is_even_timeout(&self) -> bool {
708 *self == Eventtimeout::EvenTimeout
709 }
710}
711#[doc = "Field `EVENTTIMEOUT` writer - Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle."]
712pub type EventtimeoutW<'a, REG> = crate::BitWriter<'a, REG, Eventtimeout>;
713impl<'a, REG> EventtimeoutW<'a, REG>
714where
715 REG: crate::Writable + crate::RegisterSpec,
716{
717 #[doc = "No time-out. I2C bus events have not caused a time-out."]
718 #[inline(always)]
719 pub fn no_timeout(self) -> &'a mut crate::W<REG> {
720 self.variant(Eventtimeout::NoTimeout)
721 }
722 #[doc = "Event time-out. The time between I2C bus events has been longer than the time specified by the TIMEOUT register."]
723 #[inline(always)]
724 pub fn even_timeout(self) -> &'a mut crate::W<REG> {
725 self.variant(Eventtimeout::EvenTimeout)
726 }
727}
728#[doc = "SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit.\n\nValue on reset: 0"]
729#[cfg_attr(feature = "defmt", derive(defmt::Format))]
730#[derive(Clone, Copy, Debug, PartialEq, Eq)]
731pub enum Scltimeout {
732 #[doc = "0: No time-out. SCL low time has not caused a time-out."]
733 NoTimeout = 0,
734 #[doc = "1: Time-out. SCL low time has caused a time-out."]
735 Timeout = 1,
736}
737impl From<Scltimeout> for bool {
738 #[inline(always)]
739 fn from(variant: Scltimeout) -> Self {
740 variant as u8 != 0
741 }
742}
743#[doc = "Field `SCLTIMEOUT` reader - SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit."]
744pub type ScltimeoutR = crate::BitReader<Scltimeout>;
745impl ScltimeoutR {
746 #[doc = "Get enumerated values variant"]
747 #[inline(always)]
748 pub const fn variant(&self) -> Scltimeout {
749 match self.bits {
750 false => Scltimeout::NoTimeout,
751 true => Scltimeout::Timeout,
752 }
753 }
754 #[doc = "No time-out. SCL low time has not caused a time-out."]
755 #[inline(always)]
756 pub fn is_no_timeout(&self) -> bool {
757 *self == Scltimeout::NoTimeout
758 }
759 #[doc = "Time-out. SCL low time has caused a time-out."]
760 #[inline(always)]
761 pub fn is_timeout(&self) -> bool {
762 *self == Scltimeout::Timeout
763 }
764}
765#[doc = "Field `SCLTIMEOUT` writer - SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit."]
766pub type ScltimeoutW<'a, REG> = crate::BitWriter<'a, REG, Scltimeout>;
767impl<'a, REG> ScltimeoutW<'a, REG>
768where
769 REG: crate::Writable + crate::RegisterSpec,
770{
771 #[doc = "No time-out. SCL low time has not caused a time-out."]
772 #[inline(always)]
773 pub fn no_timeout(self) -> &'a mut crate::W<REG> {
774 self.variant(Scltimeout::NoTimeout)
775 }
776 #[doc = "Time-out. SCL low time has caused a time-out."]
777 #[inline(always)]
778 pub fn timeout(self) -> &'a mut crate::W<REG> {
779 self.variant(Scltimeout::Timeout)
780 }
781}
782impl R {
783 #[doc = "Bit 0 - Master Pending. Indicates that the Master is waiting to continue communication on the I2C-bus (pending) or is idle. When the master is pending, the MSTSTATE bits indicate what type of software service if any the master expects. This flag will cause an interrupt when set if, enabled via the INTENSET register. The MSTPENDING flag is not set when the DMA is handling an event (if the MSTDMA bit in the MSTCTL register is set). If the master is in the idle state, and no communication is needed, mask this interrupt."]
784 #[inline(always)]
785 pub fn mstpending(&self) -> MstpendingR {
786 MstpendingR::new((self.bits & 1) != 0)
787 }
788 #[doc = "Bits 1:3 - Master State code. The master state code reflects the master state when the MSTPENDING bit is set, that is the master is pending or in the idle state. Each value of this field indicates a specific required service for the Master function. All other values are reserved. See Table 400 for details of state values and appropriate responses."]
789 #[inline(always)]
790 pub fn mststate(&self) -> MststateR {
791 MststateR::new(((self.bits >> 1) & 7) as u8)
792 }
793 #[doc = "Bit 4 - Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
794 #[inline(always)]
795 pub fn mstarbloss(&self) -> MstarblossR {
796 MstarblossR::new(((self.bits >> 4) & 1) != 0)
797 }
798 #[doc = "Bit 6 - Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
799 #[inline(always)]
800 pub fn mstststperr(&self) -> MstststperrR {
801 MstststperrR::new(((self.bits >> 6) & 1) != 0)
802 }
803 #[doc = "Bit 8 - Slave Pending. Indicates that the Slave function is waiting to continue communication on the I2C-bus and needs software service. This flag will cause an interrupt when set if enabled via INTENSET. The SLVPENDING flag is not set when the DMA is handling an event (if the SLVDMA bit in the SLVCTL register is set). The SLVPENDING flag is read-only and is automatically cleared when a 1 is written to the SLVCONTINUE bit in the SLVCTL register. The point in time when SlvPending is set depends on whether the I2C interface is in HSCAPABLE mode. See Section 25.7.2.2.2. When the I2C interface is configured to be HSCAPABLE, HS master codes are detected automatically. Due to the requirements of the HS I2C specification, slave addresses must also be detected automatically, since the address must be acknowledged before the clock can be stretched."]
804 #[inline(always)]
805 pub fn slvpending(&self) -> SlvpendingR {
806 SlvpendingR::new(((self.bits >> 8) & 1) != 0)
807 }
808 #[doc = "Bits 9:10 - Slave State code. Each value of this field indicates a specific required service for the Slave function. All other values are reserved. See Table 401 for state values and actions. note that the occurrence of some states and how they are handled are affected by DMA mode and Automatic Operation modes."]
809 #[inline(always)]
810 pub fn slvstate(&self) -> SlvstateR {
811 SlvstateR::new(((self.bits >> 9) & 3) as u8)
812 }
813 #[doc = "Bit 11 - Slave Not Stretching. Indicates when the slave function is stretching the I2C clock. This is needed in order to gracefully invoke Deep Sleep or Power-down modes during slave operation. This read-only flag reflects the slave function status in real time."]
814 #[inline(always)]
815 pub fn slvnotstr(&self) -> SlvnotstrR {
816 SlvnotstrR::new(((self.bits >> 11) & 1) != 0)
817 }
818 #[doc = "Bits 12:13 - Slave address match Index. This field is valid when the I2C slave function has been selected by receiving an address that matches one of the slave addresses defined by any enabled slave address registers, and provides an identification of the address that was matched. It is possible that more than one address could be matched, but only one match can be reported here."]
819 #[inline(always)]
820 pub fn slvidx(&self) -> SlvidxR {
821 SlvidxR::new(((self.bits >> 12) & 3) as u8)
822 }
823 #[doc = "Bit 14 - Slave selected flag. SLVSEL is set after an address match when software tells the Slave function to acknowledge the address, or when the address has been automatically acknowledged. It is cleared when another address cycle presents an address that does not match an enabled address on the Slave function, when slave software decides to NACK a matched address, when there is a Stop detected on the bus, when the master NACKs slave data, and in some combinations of Automatic Operation. SLVSEL is not cleared if software NACKs data."]
824 #[inline(always)]
825 pub fn slvsel(&self) -> SlvselR {
826 SlvselR::new(((self.bits >> 14) & 1) != 0)
827 }
828 #[doc = "Bit 15 - Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit."]
829 #[inline(always)]
830 pub fn slvdesel(&self) -> SlvdeselR {
831 SlvdeselR::new(((self.bits >> 15) & 1) != 0)
832 }
833 #[doc = "Bit 16 - Monitor Ready. This flag is cleared when the MONRXDAT register is read."]
834 #[inline(always)]
835 pub fn monrdy(&self) -> MonrdyR {
836 MonrdyR::new(((self.bits >> 16) & 1) != 0)
837 }
838 #[doc = "Bit 17 - Monitor Overflow flag."]
839 #[inline(always)]
840 pub fn monov(&self) -> MonovR {
841 MonovR::new(((self.bits >> 17) & 1) != 0)
842 }
843 #[doc = "Bit 18 - Monitor Active flag. Indicates when the Monitor function considers the I 2C bus to be active. Active is defined here as when some Master is on the bus: a bus Start has occurred more recently than a bus Stop."]
844 #[inline(always)]
845 pub fn monactive(&self) -> MonactiveR {
846 MonactiveR::new(((self.bits >> 18) & 1) != 0)
847 }
848 #[doc = "Bit 19 - Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit."]
849 #[inline(always)]
850 pub fn monidle(&self) -> MonidleR {
851 MonidleR::new(((self.bits >> 19) & 1) != 0)
852 }
853 #[doc = "Bit 24 - Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle."]
854 #[inline(always)]
855 pub fn eventtimeout(&self) -> EventtimeoutR {
856 EventtimeoutR::new(((self.bits >> 24) & 1) != 0)
857 }
858 #[doc = "Bit 25 - SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit."]
859 #[inline(always)]
860 pub fn scltimeout(&self) -> ScltimeoutR {
861 ScltimeoutR::new(((self.bits >> 25) & 1) != 0)
862 }
863}
864#[cfg(feature = "debug")]
865impl core::fmt::Debug for R {
866 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
867 f.debug_struct("STAT")
868 .field("mstpending", &self.mstpending())
869 .field("mststate", &self.mststate())
870 .field("mstarbloss", &self.mstarbloss())
871 .field("mstststperr", &self.mstststperr())
872 .field("slvpending", &self.slvpending())
873 .field("slvstate", &self.slvstate())
874 .field("slvnotstr", &self.slvnotstr())
875 .field("slvidx", &self.slvidx())
876 .field("slvsel", &self.slvsel())
877 .field("slvdesel", &self.slvdesel())
878 .field("monrdy", &self.monrdy())
879 .field("monov", &self.monov())
880 .field("monactive", &self.monactive())
881 .field("monidle", &self.monidle())
882 .field("eventtimeout", &self.eventtimeout())
883 .field("scltimeout", &self.scltimeout())
884 .finish()
885 }
886}
887impl W {
888 #[doc = "Bit 4 - Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
889 #[inline(always)]
890 pub fn mstarbloss(&mut self) -> MstarblossW<StatSpec> {
891 MstarblossW::new(self, 4)
892 }
893 #[doc = "Bit 6 - Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE."]
894 #[inline(always)]
895 pub fn mstststperr(&mut self) -> MstststperrW<StatSpec> {
896 MstststperrW::new(self, 6)
897 }
898 #[doc = "Bit 15 - Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit."]
899 #[inline(always)]
900 pub fn slvdesel(&mut self) -> SlvdeselW<StatSpec> {
901 SlvdeselW::new(self, 15)
902 }
903 #[doc = "Bit 17 - Monitor Overflow flag."]
904 #[inline(always)]
905 pub fn monov(&mut self) -> MonovW<StatSpec> {
906 MonovW::new(self, 17)
907 }
908 #[doc = "Bit 19 - Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit."]
909 #[inline(always)]
910 pub fn monidle(&mut self) -> MonidleW<StatSpec> {
911 MonidleW::new(self, 19)
912 }
913 #[doc = "Bit 24 - Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle."]
914 #[inline(always)]
915 pub fn eventtimeout(&mut self) -> EventtimeoutW<StatSpec> {
916 EventtimeoutW::new(self, 24)
917 }
918 #[doc = "Bit 25 - SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit."]
919 #[inline(always)]
920 pub fn scltimeout(&mut self) -> ScltimeoutW<StatSpec> {
921 ScltimeoutW::new(self, 25)
922 }
923}
924#[doc = "Status register for Master, Slave, and Monitor functions.\n\nYou can [`read`](crate::Reg::read) this register and get [`stat::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stat::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
925pub struct StatSpec;
926impl crate::RegisterSpec for StatSpec {
927 type Ux = u32;
928}
929#[doc = "`read()` method returns [`stat::R`](R) reader structure"]
930impl crate::Readable for StatSpec {}
931#[doc = "`write(|w| ..)` method takes [`stat::W`](W) writer structure"]
932impl crate::Writable for StatSpec {
933 type Safety = crate::Unsafe;
934 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
935 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
936}
937#[doc = "`reset()` method sets STAT to value 0x0801"]
938impl crate::Resettable for StatSpec {
939 const RESET_VALUE: u32 = 0x0801;
940}