mimxrt685s_pac/dma0/
active1.rs1#[doc = "Register `ACTIVE1` reader"]
2pub type R = crate::R<Active1Spec>;
3#[doc = "Active flag for DMA channel 32.\n\nValue on reset: 0"]
4#[cfg_attr(feature = "defmt", derive(defmt::Format))]
5#[derive(Clone, Copy, Debug, PartialEq, Eq)]
6pub enum Active32 {
7 #[doc = "0: DMAchannel 32 is not active."]
8 NotActive = 0,
9 #[doc = "1: DMAchannel 32 is active."]
10 Active = 1,
11}
12impl From<Active32> for bool {
13 #[inline(always)]
14 fn from(variant: Active32) -> Self {
15 variant as u8 != 0
16 }
17}
18#[doc = "Field `ACTIVE32` reader - Active flag for DMA channel 32."]
19pub type Active32R = crate::BitReader<Active32>;
20impl Active32R {
21 #[doc = "Get enumerated values variant"]
22 #[inline(always)]
23 pub const fn variant(&self) -> Active32 {
24 match self.bits {
25 false => Active32::NotActive,
26 true => Active32::Active,
27 }
28 }
29 #[doc = "DMAchannel 32 is not active."]
30 #[inline(always)]
31 pub fn is_not_active(&self) -> bool {
32 *self == Active32::NotActive
33 }
34 #[doc = "DMAchannel 32 is active."]
35 #[inline(always)]
36 pub fn is_active(&self) -> bool {
37 *self == Active32::Active
38 }
39}
40#[doc = "Additional Active flags for remaining DMA channels in the range 63 to 33. Any bits above the actually implemented channels are reserved.\n\nValue on reset: 0"]
41#[cfg_attr(feature = "defmt", derive(defmt::Format))]
42#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43#[repr(u32)]
44pub enum Active63_33 {
45 #[doc = "0: The relevant DMA channel is not active."]
46 NotActive = 0,
47 #[doc = "1: The relevant DMA channel is active."]
48 Active = 1,
49}
50impl From<Active63_33> for u32 {
51 #[inline(always)]
52 fn from(variant: Active63_33) -> Self {
53 variant as _
54 }
55}
56impl crate::FieldSpec for Active63_33 {
57 type Ux = u32;
58}
59impl crate::IsEnum for Active63_33 {}
60#[doc = "Field `ACTIVE63_33` reader - Additional Active flags for remaining DMA channels in the range 63 to 33. Any bits above the actually implemented channels are reserved."]
61pub type Active63_33R = crate::FieldReader<Active63_33>;
62impl Active63_33R {
63 #[doc = "Get enumerated values variant"]
64 #[inline(always)]
65 pub const fn variant(&self) -> Option<Active63_33> {
66 match self.bits {
67 0 => Some(Active63_33::NotActive),
68 1 => Some(Active63_33::Active),
69 _ => None,
70 }
71 }
72 #[doc = "The relevant DMA channel is not active."]
73 #[inline(always)]
74 pub fn is_not_active(&self) -> bool {
75 *self == Active63_33::NotActive
76 }
77 #[doc = "The relevant DMA channel is active."]
78 #[inline(always)]
79 pub fn is_active(&self) -> bool {
80 *self == Active63_33::Active
81 }
82}
83impl R {
84 #[doc = "Bit 0 - Active flag for DMA channel 32."]
85 #[inline(always)]
86 pub fn active32(&self) -> Active32R {
87 Active32R::new((self.bits & 1) != 0)
88 }
89 #[doc = "Bits 1:31 - Additional Active flags for remaining DMA channels in the range 63 to 33. Any bits above the actually implemented channels are reserved."]
90 #[inline(always)]
91 pub fn active63_33(&self) -> Active63_33R {
92 Active63_33R::new((self.bits >> 1) & 0x7fff_ffff)
93 }
94}
95#[cfg(feature = "debug")]
96impl core::fmt::Debug for R {
97 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
98 f.debug_struct("ACTIVE1")
99 .field("active32", &self.active32())
100 .field("active63_33", &self.active63_33())
101 .finish()
102 }
103}
104#[doc = "Channel Active status for all DMA channels.\n\nYou can [`read`](crate::Reg::read) this register and get [`active1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
105pub struct Active1Spec;
106impl crate::RegisterSpec for Active1Spec {
107 type Ux = u32;
108}
109#[doc = "`read()` method returns [`active1::R`](R) reader structure"]
110impl crate::Readable for Active1Spec {}
111#[doc = "`reset()` method sets ACTIVE1 to value 0"]
112impl crate::Resettable for Active1Spec {
113 const RESET_VALUE: u32 = 0;
114}