1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 ctrl0: Ctrl0,
6 ctrl1: Ctrl1,
7 _reserved2: [u8; 0x04],
8 status: Status,
9 intenset: Intenset,
10 intenclr: Intenclr,
11 intstat: Intstat,
12 _reserved6: [u8; 0x04],
13 areg: Areg,
14 breg: Breg,
15 creg: Creg,
16 dreg: Dreg,
17 res0: Res0,
18 res1: Res1,
19 res2: Res2,
20 res3: Res3,
21 _reserved14: [u8; 0x20],
22 mask: Mask,
23 remask: Remask,
24 _reserved16: [u8; 0x18],
25 lock: Lock,
26}
27impl RegisterBlock {
28 #[doc = "0x00 - Contains the offsets of AB and CD in the RAM."]
29 #[inline(always)]
30 pub const fn ctrl0(&self) -> &Ctrl0 {
31 &self.ctrl0
32 }
33 #[doc = "0x04 - Contains the opcode mode, iteration count, and result offset (in RAM) and also launches the accelerator. Note: with CP version: CTRL0 and CRTL1 can be written in one go with MCRR."]
34 #[inline(always)]
35 pub const fn ctrl1(&self) -> &Ctrl1 {
36 &self.ctrl1
37 }
38 #[doc = "0x0c - Indicates operational status and would contain the carry bit if used."]
39 #[inline(always)]
40 pub const fn status(&self) -> &Status {
41 &self.status
42 }
43 #[doc = "0x10 - Sets interrupts"]
44 #[inline(always)]
45 pub const fn intenset(&self) -> &Intenset {
46 &self.intenset
47 }
48 #[doc = "0x14 - Clears interrupts"]
49 #[inline(always)]
50 pub const fn intenclr(&self) -> &Intenclr {
51 &self.intenclr
52 }
53 #[doc = "0x18 - Interrupt status bits (mask of INTENSET and STATUS)"]
54 #[inline(always)]
55 pub const fn intstat(&self) -> &Intstat {
56 &self.intstat
57 }
58 #[doc = "0x20 - A register"]
59 #[inline(always)]
60 pub const fn areg(&self) -> &Areg {
61 &self.areg
62 }
63 #[doc = "0x24 - B register"]
64 #[inline(always)]
65 pub const fn breg(&self) -> &Breg {
66 &self.breg
67 }
68 #[doc = "0x28 - C register"]
69 #[inline(always)]
70 pub const fn creg(&self) -> &Creg {
71 &self.creg
72 }
73 #[doc = "0x2c - D register"]
74 #[inline(always)]
75 pub const fn dreg(&self) -> &Dreg {
76 &self.dreg
77 }
78 #[doc = "0x30 - Result register 0"]
79 #[inline(always)]
80 pub const fn res0(&self) -> &Res0 {
81 &self.res0
82 }
83 #[doc = "0x34 - Result register 1"]
84 #[inline(always)]
85 pub const fn res1(&self) -> &Res1 {
86 &self.res1
87 }
88 #[doc = "0x38 - Result register 2"]
89 #[inline(always)]
90 pub const fn res2(&self) -> &Res2 {
91 &self.res2
92 }
93 #[doc = "0x3c - Result register 3"]
94 #[inline(always)]
95 pub const fn res3(&self) -> &Res3 {
96 &self.res3
97 }
98 #[doc = "0x60 - Optional mask register"]
99 #[inline(always)]
100 pub const fn mask(&self) -> &Mask {
101 &self.mask
102 }
103 #[doc = "0x64 - Optional re-mask register"]
104 #[inline(always)]
105 pub const fn remask(&self) -> &Remask {
106 &self.remask
107 }
108 #[doc = "0x80 - Security lock register"]
109 #[inline(always)]
110 pub const fn lock(&self) -> &Lock {
111 &self.lock
112 }
113}
114#[doc = "CTRL0 (rw) register accessor: Contains the offsets of AB and CD in the RAM.\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl0`]
115module"]
116#[doc(alias = "CTRL0")]
117pub type Ctrl0 = crate::Reg<ctrl0::Ctrl0Spec>;
118#[doc = "Contains the offsets of AB and CD in the RAM."]
119pub mod ctrl0;
120#[doc = "CTRL1 (rw) register accessor: Contains the opcode mode, iteration count, and result offset (in RAM) and also launches the accelerator. Note: with CP version: CTRL0 and CRTL1 can be written in one go with MCRR.\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`]
121module"]
122#[doc(alias = "CTRL1")]
123pub type Ctrl1 = crate::Reg<ctrl1::Ctrl1Spec>;
124#[doc = "Contains the opcode mode, iteration count, and result offset (in RAM) and also launches the accelerator. Note: with CP version: CTRL0 and CRTL1 can be written in one go with MCRR."]
125pub mod ctrl1;
126#[doc = "STATUS (rw) register accessor: Indicates operational status and would contain the carry bit if used.\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
127module"]
128#[doc(alias = "STATUS")]
129pub type Status = crate::Reg<status::StatusSpec>;
130#[doc = "Indicates operational status and would contain the carry bit if used."]
131pub mod status;
132#[doc = "INTENSET (rw) register accessor: Sets interrupts\n\nYou can [`read`](crate::Reg::read) this register and get [`intenset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intenset`]
133module"]
134#[doc(alias = "INTENSET")]
135pub type Intenset = crate::Reg<intenset::IntensetSpec>;
136#[doc = "Sets interrupts"]
137pub mod intenset;
138#[doc = "INTENCLR (rw) register accessor: Clears interrupts\n\nYou can [`read`](crate::Reg::read) this register and get [`intenclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intenclr`]
139module"]
140#[doc(alias = "INTENCLR")]
141pub type Intenclr = crate::Reg<intenclr::IntenclrSpec>;
142#[doc = "Clears interrupts"]
143pub mod intenclr;
144#[doc = "INTSTAT (rw) register accessor: Interrupt status bits (mask of INTENSET and STATUS)\n\nYou can [`read`](crate::Reg::read) this register and get [`intstat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intstat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intstat`]
145module"]
146#[doc(alias = "INTSTAT")]
147pub type Intstat = crate::Reg<intstat::IntstatSpec>;
148#[doc = "Interrupt status bits (mask of INTENSET and STATUS)"]
149pub mod intstat;
150#[doc = "AREG (rw) register accessor: A register\n\nYou can [`read`](crate::Reg::read) this register and get [`areg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`areg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@areg`]
151module"]
152#[doc(alias = "AREG")]
153pub type Areg = crate::Reg<areg::AregSpec>;
154#[doc = "A register"]
155pub mod areg;
156#[doc = "BREG (rw) register accessor: B register\n\nYou can [`read`](crate::Reg::read) this register and get [`breg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`breg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@breg`]
157module"]
158#[doc(alias = "BREG")]
159pub type Breg = crate::Reg<breg::BregSpec>;
160#[doc = "B register"]
161pub mod breg;
162#[doc = "CREG (rw) register accessor: C register\n\nYou can [`read`](crate::Reg::read) this register and get [`creg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`creg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@creg`]
163module"]
164#[doc(alias = "CREG")]
165pub type Creg = crate::Reg<creg::CregSpec>;
166#[doc = "C register"]
167pub mod creg;
168#[doc = "DREG (rw) register accessor: D register\n\nYou can [`read`](crate::Reg::read) this register and get [`dreg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dreg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dreg`]
169module"]
170#[doc(alias = "DREG")]
171pub type Dreg = crate::Reg<dreg::DregSpec>;
172#[doc = "D register"]
173pub mod dreg;
174#[doc = "RES0 (rw) register accessor: Result register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`res0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`res0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@res0`]
175module"]
176#[doc(alias = "RES0")]
177pub type Res0 = crate::Reg<res0::Res0Spec>;
178#[doc = "Result register 0"]
179pub mod res0;
180#[doc = "RES1 (rw) register accessor: Result register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`res1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`res1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@res1`]
181module"]
182#[doc(alias = "RES1")]
183pub type Res1 = crate::Reg<res1::Res1Spec>;
184#[doc = "Result register 1"]
185pub mod res1;
186#[doc = "RES2 (rw) register accessor: Result register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`res2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`res2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@res2`]
187module"]
188#[doc(alias = "RES2")]
189pub type Res2 = crate::Reg<res2::Res2Spec>;
190#[doc = "Result register 2"]
191pub mod res2;
192#[doc = "RES3 (rw) register accessor: Result register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`res3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`res3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@res3`]
193module"]
194#[doc(alias = "RES3")]
195pub type Res3 = crate::Reg<res3::Res3Spec>;
196#[doc = "Result register 3"]
197pub mod res3;
198#[doc = "MASK (rw) register accessor: Optional mask register\n\nYou can [`read`](crate::Reg::read) this register and get [`mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mask`]
199module"]
200#[doc(alias = "MASK")]
201pub type Mask = crate::Reg<mask::MaskSpec>;
202#[doc = "Optional mask register"]
203pub mod mask;
204#[doc = "REMASK (rw) register accessor: Optional re-mask register\n\nYou can [`read`](crate::Reg::read) this register and get [`remask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`remask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@remask`]
205module"]
206#[doc(alias = "REMASK")]
207pub type Remask = crate::Reg<remask::RemaskSpec>;
208#[doc = "Optional re-mask register"]
209pub mod remask;
210#[doc = "LOCK (rw) register accessor: Security lock register\n\nYou can [`read`](crate::Reg::read) this register and get [`lock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`]
211module"]
212#[doc(alias = "LOCK")]
213pub type Lock = crate::Reg<lock::LockSpec>;
214#[doc = "Security lock register"]
215pub mod lock;