mimxrt685s_pac/cache64/
ccr.rs

1#[doc = "Register `CCR` reader"]
2pub type R = crate::R<CcrSpec>;
3#[doc = "Register `CCR` writer"]
4pub type W = crate::W<CcrSpec>;
5#[doc = "Cache enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Encache {
9    #[doc = "0: Cache disabled"]
10    Disabled = 0,
11    #[doc = "1: Cache enabled"]
12    Enabled = 1,
13}
14impl From<Encache> for bool {
15    #[inline(always)]
16    fn from(variant: Encache) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `ENCACHE` reader - Cache enable"]
21pub type EncacheR = crate::BitReader<Encache>;
22impl EncacheR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Encache {
26        match self.bits {
27            false => Encache::Disabled,
28            true => Encache::Enabled,
29        }
30    }
31    #[doc = "Cache disabled"]
32    #[inline(always)]
33    pub fn is_disabled(&self) -> bool {
34        *self == Encache::Disabled
35    }
36    #[doc = "Cache enabled"]
37    #[inline(always)]
38    pub fn is_enabled(&self) -> bool {
39        *self == Encache::Enabled
40    }
41}
42#[doc = "Field `ENCACHE` writer - Cache enable"]
43pub type EncacheW<'a, REG> = crate::BitWriter<'a, REG, Encache>;
44impl<'a, REG> EncacheW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Cache disabled"]
49    #[inline(always)]
50    pub fn disabled(self) -> &'a mut crate::W<REG> {
51        self.variant(Encache::Disabled)
52    }
53    #[doc = "Cache enabled"]
54    #[inline(always)]
55    pub fn enabled(self) -> &'a mut crate::W<REG> {
56        self.variant(Encache::Enabled)
57    }
58}
59#[doc = "Enable Write Buffer\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Enwrbuf {
63    #[doc = "0: Write buffer disabled"]
64    Disabled = 0,
65    #[doc = "1: Write buffer enabled"]
66    Enabled = 1,
67}
68impl From<Enwrbuf> for bool {
69    #[inline(always)]
70    fn from(variant: Enwrbuf) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `ENWRBUF` reader - Enable Write Buffer"]
75pub type EnwrbufR = crate::BitReader<Enwrbuf>;
76impl EnwrbufR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Enwrbuf {
80        match self.bits {
81            false => Enwrbuf::Disabled,
82            true => Enwrbuf::Enabled,
83        }
84    }
85    #[doc = "Write buffer disabled"]
86    #[inline(always)]
87    pub fn is_disabled(&self) -> bool {
88        *self == Enwrbuf::Disabled
89    }
90    #[doc = "Write buffer enabled"]
91    #[inline(always)]
92    pub fn is_enabled(&self) -> bool {
93        *self == Enwrbuf::Enabled
94    }
95}
96#[doc = "Field `ENWRBUF` writer - Enable Write Buffer"]
97pub type EnwrbufW<'a, REG> = crate::BitWriter<'a, REG, Enwrbuf>;
98impl<'a, REG> EnwrbufW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Write buffer disabled"]
103    #[inline(always)]
104    pub fn disabled(self) -> &'a mut crate::W<REG> {
105        self.variant(Enwrbuf::Disabled)
106    }
107    #[doc = "Write buffer enabled"]
108    #[inline(always)]
109    pub fn enabled(self) -> &'a mut crate::W<REG> {
110        self.variant(Enwrbuf::Enabled)
111    }
112}
113#[doc = "Invalidate Way 0\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Invw0 {
117    #[doc = "0: No operation"]
118    NoOperation = 0,
119    #[doc = "1: When setting the GO bit, invalidate all lines in way 0."]
120    Invw0 = 1,
121}
122impl From<Invw0> for bool {
123    #[inline(always)]
124    fn from(variant: Invw0) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `INVW0` reader - Invalidate Way 0"]
129pub type Invw0R = crate::BitReader<Invw0>;
130impl Invw0R {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Invw0 {
134        match self.bits {
135            false => Invw0::NoOperation,
136            true => Invw0::Invw0,
137        }
138    }
139    #[doc = "No operation"]
140    #[inline(always)]
141    pub fn is_no_operation(&self) -> bool {
142        *self == Invw0::NoOperation
143    }
144    #[doc = "When setting the GO bit, invalidate all lines in way 0."]
145    #[inline(always)]
146    pub fn is_invw0(&self) -> bool {
147        *self == Invw0::Invw0
148    }
149}
150#[doc = "Field `INVW0` writer - Invalidate Way 0"]
151pub type Invw0W<'a, REG> = crate::BitWriter<'a, REG, Invw0>;
152impl<'a, REG> Invw0W<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "No operation"]
157    #[inline(always)]
158    pub fn no_operation(self) -> &'a mut crate::W<REG> {
159        self.variant(Invw0::NoOperation)
160    }
161    #[doc = "When setting the GO bit, invalidate all lines in way 0."]
162    #[inline(always)]
163    pub fn invw0(self) -> &'a mut crate::W<REG> {
164        self.variant(Invw0::Invw0)
165    }
166}
167#[doc = "Push Way 0\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Pushw0 {
171    #[doc = "0: No operation"]
172    NoOperation = 0,
173    #[doc = "1: When setting the GO bit, push all modified lines in way 0"]
174    Pushw0 = 1,
175}
176impl From<Pushw0> for bool {
177    #[inline(always)]
178    fn from(variant: Pushw0) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `PUSHW0` reader - Push Way 0"]
183pub type Pushw0R = crate::BitReader<Pushw0>;
184impl Pushw0R {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Pushw0 {
188        match self.bits {
189            false => Pushw0::NoOperation,
190            true => Pushw0::Pushw0,
191        }
192    }
193    #[doc = "No operation"]
194    #[inline(always)]
195    pub fn is_no_operation(&self) -> bool {
196        *self == Pushw0::NoOperation
197    }
198    #[doc = "When setting the GO bit, push all modified lines in way 0"]
199    #[inline(always)]
200    pub fn is_pushw0(&self) -> bool {
201        *self == Pushw0::Pushw0
202    }
203}
204#[doc = "Field `PUSHW0` writer - Push Way 0"]
205pub type Pushw0W<'a, REG> = crate::BitWriter<'a, REG, Pushw0>;
206impl<'a, REG> Pushw0W<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "No operation"]
211    #[inline(always)]
212    pub fn no_operation(self) -> &'a mut crate::W<REG> {
213        self.variant(Pushw0::NoOperation)
214    }
215    #[doc = "When setting the GO bit, push all modified lines in way 0"]
216    #[inline(always)]
217    pub fn pushw0(self) -> &'a mut crate::W<REG> {
218        self.variant(Pushw0::Pushw0)
219    }
220}
221#[doc = "Invalidate Way 1\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Invw1 {
225    #[doc = "0: No operation"]
226    NoOperation = 0,
227    #[doc = "1: When setting the GO bit, invalidate all lines in way 1"]
228    Invw1 = 1,
229}
230impl From<Invw1> for bool {
231    #[inline(always)]
232    fn from(variant: Invw1) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `INVW1` reader - Invalidate Way 1"]
237pub type Invw1R = crate::BitReader<Invw1>;
238impl Invw1R {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Invw1 {
242        match self.bits {
243            false => Invw1::NoOperation,
244            true => Invw1::Invw1,
245        }
246    }
247    #[doc = "No operation"]
248    #[inline(always)]
249    pub fn is_no_operation(&self) -> bool {
250        *self == Invw1::NoOperation
251    }
252    #[doc = "When setting the GO bit, invalidate all lines in way 1"]
253    #[inline(always)]
254    pub fn is_invw1(&self) -> bool {
255        *self == Invw1::Invw1
256    }
257}
258#[doc = "Field `INVW1` writer - Invalidate Way 1"]
259pub type Invw1W<'a, REG> = crate::BitWriter<'a, REG, Invw1>;
260impl<'a, REG> Invw1W<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "No operation"]
265    #[inline(always)]
266    pub fn no_operation(self) -> &'a mut crate::W<REG> {
267        self.variant(Invw1::NoOperation)
268    }
269    #[doc = "When setting the GO bit, invalidate all lines in way 1"]
270    #[inline(always)]
271    pub fn invw1(self) -> &'a mut crate::W<REG> {
272        self.variant(Invw1::Invw1)
273    }
274}
275#[doc = "Push Way 1\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Pushw1 {
279    #[doc = "0: No operation"]
280    NoOperation = 0,
281    #[doc = "1: When setting the GO bit, push all modified lines in way 1"]
282    Pushw1 = 1,
283}
284impl From<Pushw1> for bool {
285    #[inline(always)]
286    fn from(variant: Pushw1) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `PUSHW1` reader - Push Way 1"]
291pub type Pushw1R = crate::BitReader<Pushw1>;
292impl Pushw1R {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> Pushw1 {
296        match self.bits {
297            false => Pushw1::NoOperation,
298            true => Pushw1::Pushw1,
299        }
300    }
301    #[doc = "No operation"]
302    #[inline(always)]
303    pub fn is_no_operation(&self) -> bool {
304        *self == Pushw1::NoOperation
305    }
306    #[doc = "When setting the GO bit, push all modified lines in way 1"]
307    #[inline(always)]
308    pub fn is_pushw1(&self) -> bool {
309        *self == Pushw1::Pushw1
310    }
311}
312#[doc = "Field `PUSHW1` writer - Push Way 1"]
313pub type Pushw1W<'a, REG> = crate::BitWriter<'a, REG, Pushw1>;
314impl<'a, REG> Pushw1W<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "No operation"]
319    #[inline(always)]
320    pub fn no_operation(self) -> &'a mut crate::W<REG> {
321        self.variant(Pushw1::NoOperation)
322    }
323    #[doc = "When setting the GO bit, push all modified lines in way 1"]
324    #[inline(always)]
325    pub fn pushw1(self) -> &'a mut crate::W<REG> {
326        self.variant(Pushw1::Pushw1)
327    }
328}
329#[doc = "Initiate Cache Command\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum Go {
333    #[doc = "0: Write: no effect. Read: no cache command active."]
334    NoEffect = 0,
335    #[doc = "1: Write: initiate command indicated by bits 27-24. Read: cache command active."]
336    InitCmd = 1,
337}
338impl From<Go> for bool {
339    #[inline(always)]
340    fn from(variant: Go) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `GO` reader - Initiate Cache Command"]
345pub type GoR = crate::BitReader<Go>;
346impl GoR {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub const fn variant(&self) -> Go {
350        match self.bits {
351            false => Go::NoEffect,
352            true => Go::InitCmd,
353        }
354    }
355    #[doc = "Write: no effect. Read: no cache command active."]
356    #[inline(always)]
357    pub fn is_no_effect(&self) -> bool {
358        *self == Go::NoEffect
359    }
360    #[doc = "Write: initiate command indicated by bits 27-24. Read: cache command active."]
361    #[inline(always)]
362    pub fn is_init_cmd(&self) -> bool {
363        *self == Go::InitCmd
364    }
365}
366#[doc = "Field `GO` writer - Initiate Cache Command"]
367pub type GoW<'a, REG> = crate::BitWriter<'a, REG, Go>;
368impl<'a, REG> GoW<'a, REG>
369where
370    REG: crate::Writable + crate::RegisterSpec,
371{
372    #[doc = "Write: no effect. Read: no cache command active."]
373    #[inline(always)]
374    pub fn no_effect(self) -> &'a mut crate::W<REG> {
375        self.variant(Go::NoEffect)
376    }
377    #[doc = "Write: initiate command indicated by bits 27-24. Read: cache command active."]
378    #[inline(always)]
379    pub fn init_cmd(self) -> &'a mut crate::W<REG> {
380        self.variant(Go::InitCmd)
381    }
382}
383impl R {
384    #[doc = "Bit 0 - Cache enable"]
385    #[inline(always)]
386    pub fn encache(&self) -> EncacheR {
387        EncacheR::new((self.bits & 1) != 0)
388    }
389    #[doc = "Bit 1 - Enable Write Buffer"]
390    #[inline(always)]
391    pub fn enwrbuf(&self) -> EnwrbufR {
392        EnwrbufR::new(((self.bits >> 1) & 1) != 0)
393    }
394    #[doc = "Bit 24 - Invalidate Way 0"]
395    #[inline(always)]
396    pub fn invw0(&self) -> Invw0R {
397        Invw0R::new(((self.bits >> 24) & 1) != 0)
398    }
399    #[doc = "Bit 25 - Push Way 0"]
400    #[inline(always)]
401    pub fn pushw0(&self) -> Pushw0R {
402        Pushw0R::new(((self.bits >> 25) & 1) != 0)
403    }
404    #[doc = "Bit 26 - Invalidate Way 1"]
405    #[inline(always)]
406    pub fn invw1(&self) -> Invw1R {
407        Invw1R::new(((self.bits >> 26) & 1) != 0)
408    }
409    #[doc = "Bit 27 - Push Way 1"]
410    #[inline(always)]
411    pub fn pushw1(&self) -> Pushw1R {
412        Pushw1R::new(((self.bits >> 27) & 1) != 0)
413    }
414    #[doc = "Bit 31 - Initiate Cache Command"]
415    #[inline(always)]
416    pub fn go(&self) -> GoR {
417        GoR::new(((self.bits >> 31) & 1) != 0)
418    }
419}
420#[cfg(feature = "debug")]
421impl core::fmt::Debug for R {
422    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
423        f.debug_struct("CCR")
424            .field("encache", &self.encache())
425            .field("enwrbuf", &self.enwrbuf())
426            .field("invw0", &self.invw0())
427            .field("pushw0", &self.pushw0())
428            .field("invw1", &self.invw1())
429            .field("pushw1", &self.pushw1())
430            .field("go", &self.go())
431            .finish()
432    }
433}
434impl W {
435    #[doc = "Bit 0 - Cache enable"]
436    #[inline(always)]
437    pub fn encache(&mut self) -> EncacheW<CcrSpec> {
438        EncacheW::new(self, 0)
439    }
440    #[doc = "Bit 1 - Enable Write Buffer"]
441    #[inline(always)]
442    pub fn enwrbuf(&mut self) -> EnwrbufW<CcrSpec> {
443        EnwrbufW::new(self, 1)
444    }
445    #[doc = "Bit 24 - Invalidate Way 0"]
446    #[inline(always)]
447    pub fn invw0(&mut self) -> Invw0W<CcrSpec> {
448        Invw0W::new(self, 24)
449    }
450    #[doc = "Bit 25 - Push Way 0"]
451    #[inline(always)]
452    pub fn pushw0(&mut self) -> Pushw0W<CcrSpec> {
453        Pushw0W::new(self, 25)
454    }
455    #[doc = "Bit 26 - Invalidate Way 1"]
456    #[inline(always)]
457    pub fn invw1(&mut self) -> Invw1W<CcrSpec> {
458        Invw1W::new(self, 26)
459    }
460    #[doc = "Bit 27 - Push Way 1"]
461    #[inline(always)]
462    pub fn pushw1(&mut self) -> Pushw1W<CcrSpec> {
463        Pushw1W::new(self, 27)
464    }
465    #[doc = "Bit 31 - Initiate Cache Command"]
466    #[inline(always)]
467    pub fn go(&mut self) -> GoW<CcrSpec> {
468        GoW::new(self, 31)
469    }
470}
471#[doc = "Cache control register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
472pub struct CcrSpec;
473impl crate::RegisterSpec for CcrSpec {
474    type Ux = u32;
475}
476#[doc = "`read()` method returns [`ccr::R`](R) reader structure"]
477impl crate::Readable for CcrSpec {}
478#[doc = "`write(|w| ..)` method takes [`ccr::W`](W) writer structure"]
479impl crate::Writable for CcrSpec {
480    type Safety = crate::Unsafe;
481    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
482    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
483}
484#[doc = "`reset()` method sets CCR to value 0"]
485impl crate::Resettable for CcrSpec {
486    const RESET_VALUE: u32 = 0;
487}