mimxrt685s_pac/pint/
ienf.rs

1#[doc = "Register `IENF` reader"]
2pub type R = crate::R<IenfSpec>;
3#[doc = "Register `IENF` writer"]
4pub type W = crate::W<IenfSpec>;
5#[doc = "Field `ENAF` reader - Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH."]
6pub type EnafR = crate::FieldReader;
7#[doc = "Field `ENAF` writer - Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH."]
8pub type EnafW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9impl R {
10    #[doc = "Bits 0:7 - Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH."]
11    #[inline(always)]
12    pub fn enaf(&self) -> EnafR {
13        EnafR::new((self.bits & 0xff) as u8)
14    }
15}
16#[cfg(feature = "debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("IENF").field("enaf", &self.enaf()).finish()
20    }
21}
22impl W {
23    #[doc = "Bits 0:7 - Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH."]
24    #[inline(always)]
25    pub fn enaf(&mut self) -> EnafW<IenfSpec> {
26        EnafW::new(self, 0)
27    }
28}
29#[doc = "Pin interrupt active level or falling edge interrupt enable register\n\nYou can [`read`](crate::Reg::read) this register and get [`ienf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ienf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
30pub struct IenfSpec;
31impl crate::RegisterSpec for IenfSpec {
32    type Ux = u32;
33}
34#[doc = "`read()` method returns [`ienf::R`](R) reader structure"]
35impl crate::Readable for IenfSpec {}
36#[doc = "`write(|w| ..)` method takes [`ienf::W`](W) writer structure"]
37impl crate::Writable for IenfSpec {
38    type Safety = crate::Unsafe;
39    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
40    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
41}
42#[doc = "`reset()` method sets IENF to value 0"]
43impl crate::Resettable for IenfSpec {
44    const RESET_VALUE: u32 = 0;
45}
mimxrt685s_pac/pint/ienf.rs

mimxrt685s_pac/pint/
ienf.rs
