mimxrt685s_pac/ahb_secure_ctrl/
ahb_periph1_slave_rule0.rs

1#[doc = "Register `AHB_PERIPH1_SLAVE_RULE0` reader"]
2pub type R = crate::R<AhbPeriph1SlaveRule0Spec>;
3#[doc = "Register `AHB_PERIPH1_SLAVE_RULE0` writer"]
4pub type W = crate::W<AhbPeriph1SlaveRule0Spec>;
5#[doc = "Field `CRC_RULE` reader - Security access rules for AHB peripheral slaves area 0x40120000--0x40120FFF"]
6pub type CrcRuleR = crate::FieldReader;
7#[doc = "Field `CRC_RULE` writer - Security access rules for AHB peripheral slaves area 0x40120000--0x40120FFF"]
8pub type CrcRuleW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `DMIC_RULE` reader - 0x40121000--0x40121FFF"]
10pub type DmicRuleR = crate::FieldReader;
11#[doc = "Field `DMIC_RULE` writer - 0x40121000--0x40121FFF"]
12pub type DmicRuleW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `FLEXCOMM4_RULE` reader - 0x40122000--0x40122FFF"]
14pub type Flexcomm4RuleR = crate::FieldReader;
15#[doc = "Field `FLEXCOMM4_RULE` writer - 0x40122000--0x40122FFF"]
16pub type Flexcomm4RuleW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
17#[doc = "Field `FLEXCOMM5_RULE` reader - 0x40123000--0x40123FFF"]
18pub type Flexcomm5RuleR = crate::FieldReader;
19#[doc = "Field `FLEXCOMM5_RULE` writer - 0x40123000--0x40123FFF"]
20pub type Flexcomm5RuleW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
21#[doc = "Field `FLEXCOMM6_RULE` reader - 0x40124000--0x40124FFF"]
22pub type Flexcomm6RuleR = crate::FieldReader;
23#[doc = "Field `FLEXCOMM6_RULE` writer - 0x40124000--0x40124FFF"]
24pub type Flexcomm6RuleW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
25#[doc = "Field `FLEXCOMM7_RULE` reader - 0x40125000--0x40125FFF"]
26pub type Flexcomm7RuleR = crate::FieldReader;
27#[doc = "Field `FLEXCOMM7_RULE` writer - 0x40125000--0x40125FFF"]
28pub type Flexcomm7RuleW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
29#[doc = "Field `FLEXCOMM14_RULE` reader - 0x40126000--0x40126FFF"]
30pub type Flexcomm14RuleR = crate::FieldReader;
31#[doc = "Field `FLEXCOMM14_RULE` writer - 0x40126000--0x40126FFF"]
32pub type Flexcomm14RuleW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
33#[doc = "Field `FLEXCOMM15_RULE` reader - 0x40127000--0x40127FFF"]
34pub type Flexcomm15RuleR = crate::FieldReader;
35#[doc = "Field `FLEXCOMM15_RULE` writer - 0x40127000--0x40127FFF"]
36pub type Flexcomm15RuleW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
37impl R {
38    #[doc = "Bits 0:1 - Security access rules for AHB peripheral slaves area 0x40120000--0x40120FFF"]
39    #[inline(always)]
40    pub fn crc_rule(&self) -> CrcRuleR {
41        CrcRuleR::new((self.bits & 3) as u8)
42    }
43    #[doc = "Bits 4:5 - 0x40121000--0x40121FFF"]
44    #[inline(always)]
45    pub fn dmic_rule(&self) -> DmicRuleR {
46        DmicRuleR::new(((self.bits >> 4) & 3) as u8)
47    }
48    #[doc = "Bits 8:9 - 0x40122000--0x40122FFF"]
49    #[inline(always)]
50    pub fn flexcomm4_rule(&self) -> Flexcomm4RuleR {
51        Flexcomm4RuleR::new(((self.bits >> 8) & 3) as u8)
52    }
53    #[doc = "Bits 12:13 - 0x40123000--0x40123FFF"]
54    #[inline(always)]
55    pub fn flexcomm5_rule(&self) -> Flexcomm5RuleR {
56        Flexcomm5RuleR::new(((self.bits >> 12) & 3) as u8)
57    }
58    #[doc = "Bits 16:17 - 0x40124000--0x40124FFF"]
59    #[inline(always)]
60    pub fn flexcomm6_rule(&self) -> Flexcomm6RuleR {
61        Flexcomm6RuleR::new(((self.bits >> 16) & 3) as u8)
62    }
63    #[doc = "Bits 20:21 - 0x40125000--0x40125FFF"]
64    #[inline(always)]
65    pub fn flexcomm7_rule(&self) -> Flexcomm7RuleR {
66        Flexcomm7RuleR::new(((self.bits >> 20) & 3) as u8)
67    }
68    #[doc = "Bits 24:25 - 0x40126000--0x40126FFF"]
69    #[inline(always)]
70    pub fn flexcomm14_rule(&self) -> Flexcomm14RuleR {
71        Flexcomm14RuleR::new(((self.bits >> 24) & 3) as u8)
72    }
73    #[doc = "Bits 28:29 - 0x40127000--0x40127FFF"]
74    #[inline(always)]
75    pub fn flexcomm15_rule(&self) -> Flexcomm15RuleR {
76        Flexcomm15RuleR::new(((self.bits >> 28) & 3) as u8)
77    }
78}
79#[cfg(feature = "debug")]
80impl core::fmt::Debug for R {
81    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
82        f.debug_struct("AHB_PERIPH1_SLAVE_RULE0")
83            .field("crc_rule", &self.crc_rule())
84            .field("dmic_rule", &self.dmic_rule())
85            .field("flexcomm4_rule", &self.flexcomm4_rule())
86            .field("flexcomm5_rule", &self.flexcomm5_rule())
87            .field("flexcomm6_rule", &self.flexcomm6_rule())
88            .field("flexcomm7_rule", &self.flexcomm7_rule())
89            .field("flexcomm14_rule", &self.flexcomm14_rule())
90            .field("flexcomm15_rule", &self.flexcomm15_rule())
91            .finish()
92    }
93}
94impl W {
95    #[doc = "Bits 0:1 - Security access rules for AHB peripheral slaves area 0x40120000--0x40120FFF"]
96    #[inline(always)]
97    pub fn crc_rule(&mut self) -> CrcRuleW<AhbPeriph1SlaveRule0Spec> {
98        CrcRuleW::new(self, 0)
99    }
100    #[doc = "Bits 4:5 - 0x40121000--0x40121FFF"]
101    #[inline(always)]
102    pub fn dmic_rule(&mut self) -> DmicRuleW<AhbPeriph1SlaveRule0Spec> {
103        DmicRuleW::new(self, 4)
104    }
105    #[doc = "Bits 8:9 - 0x40122000--0x40122FFF"]
106    #[inline(always)]
107    pub fn flexcomm4_rule(&mut self) -> Flexcomm4RuleW<AhbPeriph1SlaveRule0Spec> {
108        Flexcomm4RuleW::new(self, 8)
109    }
110    #[doc = "Bits 12:13 - 0x40123000--0x40123FFF"]
111    #[inline(always)]
112    pub fn flexcomm5_rule(&mut self) -> Flexcomm5RuleW<AhbPeriph1SlaveRule0Spec> {
113        Flexcomm5RuleW::new(self, 12)
114    }
115    #[doc = "Bits 16:17 - 0x40124000--0x40124FFF"]
116    #[inline(always)]
117    pub fn flexcomm6_rule(&mut self) -> Flexcomm6RuleW<AhbPeriph1SlaveRule0Spec> {
118        Flexcomm6RuleW::new(self, 16)
119    }
120    #[doc = "Bits 20:21 - 0x40125000--0x40125FFF"]
121    #[inline(always)]
122    pub fn flexcomm7_rule(&mut self) -> Flexcomm7RuleW<AhbPeriph1SlaveRule0Spec> {
123        Flexcomm7RuleW::new(self, 20)
124    }
125    #[doc = "Bits 24:25 - 0x40126000--0x40126FFF"]
126    #[inline(always)]
127    pub fn flexcomm14_rule(&mut self) -> Flexcomm14RuleW<AhbPeriph1SlaveRule0Spec> {
128        Flexcomm14RuleW::new(self, 24)
129    }
130    #[doc = "Bits 28:29 - 0x40127000--0x40127FFF"]
131    #[inline(always)]
132    pub fn flexcomm15_rule(&mut self) -> Flexcomm15RuleW<AhbPeriph1SlaveRule0Spec> {
133        Flexcomm15RuleW::new(self, 28)
134    }
135}
136#[doc = "the memory map is 0x40120000--0x40127FFF\n\nYou can [`read`](crate::Reg::read) this register and get [`ahb_periph1_slave_rule0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ahb_periph1_slave_rule0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
137pub struct AhbPeriph1SlaveRule0Spec;
138impl crate::RegisterSpec for AhbPeriph1SlaveRule0Spec {
139    type Ux = u32;
140}
141#[doc = "`read()` method returns [`ahb_periph1_slave_rule0::R`](R) reader structure"]
142impl crate::Readable for AhbPeriph1SlaveRule0Spec {}
143#[doc = "`write(|w| ..)` method takes [`ahb_periph1_slave_rule0::W`](W) writer structure"]
144impl crate::Writable for AhbPeriph1SlaveRule0Spec {
145    type Safety = crate::Unsafe;
146    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
147    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
148}
149#[doc = "`reset()` method sets AHB_PERIPH1_SLAVE_RULE0 to value 0"]
150impl crate::Resettable for AhbPeriph1SlaveRule0Spec {
151    const RESET_VALUE: u32 = 0;
152}
mimxrt685s_pac/ahb_secure_ctrl/ahb_periph1_slave_rule0.rs

mimxrt685s_pac/ahb_secure_ctrl/
ahb_periph1_slave_rule0.rs
