mimxrt633s_pac/pmc/
memseqctrl.rs1#[doc = "Register `MEMSEQCTRL` reader"]
2pub type R = crate::R<MemseqctrlSpec>;
3#[doc = "Register `MEMSEQCTRL` writer"]
4pub type W = crate::W<MemseqctrlSpec>;
5#[doc = "Field `MEMSEQNUM` reader - Number of memories to turn on/off at a time."]
6pub type MemseqnumR = crate::FieldReader;
7#[doc = "Field `MEMSEQNUM` writer - Number of memories to turn on/off at a time."]
8pub type MemseqnumW<'a, REG> = crate::FieldWriter<'a, REG, 6>;
9impl R {
10 #[doc = "Bits 0:5 - Number of memories to turn on/off at a time."]
11 #[inline(always)]
12 pub fn memseqnum(&self) -> MemseqnumR {
13 MemseqnumR::new((self.bits & 0x3f) as u8)
14 }
15}
16#[cfg(feature = "debug")]
17impl core::fmt::Debug for R {
18 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19 f.debug_struct("MEMSEQCTRL")
20 .field("memseqnum", &self.memseqnum())
21 .finish()
22 }
23}
24impl W {
25 #[doc = "Bits 0:5 - Number of memories to turn on/off at a time."]
26 #[inline(always)]
27 pub fn memseqnum(&mut self) -> MemseqnumW<MemseqctrlSpec> {
28 MemseqnumW::new(self, 0)
29 }
30}
31#[doc = "Memory Sequencer Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`memseqctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`memseqctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct MemseqctrlSpec;
33impl crate::RegisterSpec for MemseqctrlSpec {
34 type Ux = u32;
35}
36#[doc = "`read()` method returns [`memseqctrl::R`](R) reader structure"]
37impl crate::Readable for MemseqctrlSpec {}
38#[doc = "`write(|w| ..)` method takes [`memseqctrl::W`](W) writer structure"]
39impl crate::Writable for MemseqctrlSpec {
40 type Safety = crate::Unsafe;
41 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
42 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
43}
44#[doc = "`reset()` method sets MEMSEQCTRL to value 0x3f"]
45impl crate::Resettable for MemseqctrlSpec {
46 const RESET_VALUE: u32 = 0x3f;
47}