mimxrt595s/sysctl0/
pdruncfg3_clr.rs

1#[doc = "Register `PDRUNCFG3_CLR` reader"]
2pub struct R(crate::R<PDRUNCFG3_CLR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PDRUNCFG3_CLR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PDRUNCFG3_CLR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PDRUNCFG3_CLR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PDRUNCFG3_CLR` writer"]
17pub struct W(crate::W<PDRUNCFG3_CLR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PDRUNCFG3_CLR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PDRUNCFG3_CLR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PDRUNCFG3_CLR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SRAM_IF0_PPD` reader - Periphery power for RAM interface 0"]
38pub type SRAM_IF0_PPD_R = crate::BitReader<SRAM_IF0_PPD_A>;
39#[doc = "Periphery power for RAM interface 0\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum SRAM_IF0_PPD_A {
42    #[doc = "0: No effect"]
43    DISABLE = 0,
44    #[doc = "1: Clears the PDRUNCFG3 Bit"]
45    ENABLE = 1,
46}
47impl From<SRAM_IF0_PPD_A> for bool {
48    #[inline(always)]
49    fn from(variant: SRAM_IF0_PPD_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl SRAM_IF0_PPD_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> SRAM_IF0_PPD_A {
57        match self.bits {
58            false => SRAM_IF0_PPD_A::DISABLE,
59            true => SRAM_IF0_PPD_A::ENABLE,
60        }
61    }
62    #[doc = "Checks if the value of the field is `DISABLE`"]
63    #[inline(always)]
64    pub fn is_disable(&self) -> bool {
65        *self == SRAM_IF0_PPD_A::DISABLE
66    }
67    #[doc = "Checks if the value of the field is `ENABLE`"]
68    #[inline(always)]
69    pub fn is_enable(&self) -> bool {
70        *self == SRAM_IF0_PPD_A::ENABLE
71    }
72}
73#[doc = "Field `SRAM_IF0_PPD` writer - Periphery power for RAM interface 0"]
74pub type SRAM_IF0_PPD_W<'a, const O: u8> =
75    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF0_PPD_A, O>;
76impl<'a, const O: u8> SRAM_IF0_PPD_W<'a, O> {
77    #[doc = "No effect"]
78    #[inline(always)]
79    pub fn disable(self) -> &'a mut W {
80        self.variant(SRAM_IF0_PPD_A::DISABLE)
81    }
82    #[doc = "Clears the PDRUNCFG3 Bit"]
83    #[inline(always)]
84    pub fn enable(self) -> &'a mut W {
85        self.variant(SRAM_IF0_PPD_A::ENABLE)
86    }
87}
88#[doc = "Field `SRAM_IF1_PPD` reader - Periphery power for RAM interface 1"]
89pub type SRAM_IF1_PPD_R = crate::BitReader<SRAM_IF1_PPD_A>;
90#[doc = "Periphery power for RAM interface 1\n\nValue on reset: 0"]
91#[derive(Clone, Copy, Debug, PartialEq, Eq)]
92pub enum SRAM_IF1_PPD_A {
93    #[doc = "0: No effect"]
94    DISABLE = 0,
95    #[doc = "1: Clears the PDRUNCFG3 Bit"]
96    ENABLE = 1,
97}
98impl From<SRAM_IF1_PPD_A> for bool {
99    #[inline(always)]
100    fn from(variant: SRAM_IF1_PPD_A) -> Self {
101        variant as u8 != 0
102    }
103}
104impl SRAM_IF1_PPD_R {
105    #[doc = "Get enumerated values variant"]
106    #[inline(always)]
107    pub fn variant(&self) -> SRAM_IF1_PPD_A {
108        match self.bits {
109            false => SRAM_IF1_PPD_A::DISABLE,
110            true => SRAM_IF1_PPD_A::ENABLE,
111        }
112    }
113    #[doc = "Checks if the value of the field is `DISABLE`"]
114    #[inline(always)]
115    pub fn is_disable(&self) -> bool {
116        *self == SRAM_IF1_PPD_A::DISABLE
117    }
118    #[doc = "Checks if the value of the field is `ENABLE`"]
119    #[inline(always)]
120    pub fn is_enable(&self) -> bool {
121        *self == SRAM_IF1_PPD_A::ENABLE
122    }
123}
124#[doc = "Field `SRAM_IF1_PPD` writer - Periphery power for RAM interface 1"]
125pub type SRAM_IF1_PPD_W<'a, const O: u8> =
126    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF1_PPD_A, O>;
127impl<'a, const O: u8> SRAM_IF1_PPD_W<'a, O> {
128    #[doc = "No effect"]
129    #[inline(always)]
130    pub fn disable(self) -> &'a mut W {
131        self.variant(SRAM_IF1_PPD_A::DISABLE)
132    }
133    #[doc = "Clears the PDRUNCFG3 Bit"]
134    #[inline(always)]
135    pub fn enable(self) -> &'a mut W {
136        self.variant(SRAM_IF1_PPD_A::ENABLE)
137    }
138}
139#[doc = "Field `SRAM_IF2_PPD` reader - Periphery power for RAM interface 2"]
140pub type SRAM_IF2_PPD_R = crate::BitReader<SRAM_IF2_PPD_A>;
141#[doc = "Periphery power for RAM interface 2\n\nValue on reset: 0"]
142#[derive(Clone, Copy, Debug, PartialEq, Eq)]
143pub enum SRAM_IF2_PPD_A {
144    #[doc = "0: No effect"]
145    DISABLE = 0,
146    #[doc = "1: Clears the PDRUNCFG3 Bit"]
147    ENABLE = 1,
148}
149impl From<SRAM_IF2_PPD_A> for bool {
150    #[inline(always)]
151    fn from(variant: SRAM_IF2_PPD_A) -> Self {
152        variant as u8 != 0
153    }
154}
155impl SRAM_IF2_PPD_R {
156    #[doc = "Get enumerated values variant"]
157    #[inline(always)]
158    pub fn variant(&self) -> SRAM_IF2_PPD_A {
159        match self.bits {
160            false => SRAM_IF2_PPD_A::DISABLE,
161            true => SRAM_IF2_PPD_A::ENABLE,
162        }
163    }
164    #[doc = "Checks if the value of the field is `DISABLE`"]
165    #[inline(always)]
166    pub fn is_disable(&self) -> bool {
167        *self == SRAM_IF2_PPD_A::DISABLE
168    }
169    #[doc = "Checks if the value of the field is `ENABLE`"]
170    #[inline(always)]
171    pub fn is_enable(&self) -> bool {
172        *self == SRAM_IF2_PPD_A::ENABLE
173    }
174}
175#[doc = "Field `SRAM_IF2_PPD` writer - Periphery power for RAM interface 2"]
176pub type SRAM_IF2_PPD_W<'a, const O: u8> =
177    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF2_PPD_A, O>;
178impl<'a, const O: u8> SRAM_IF2_PPD_W<'a, O> {
179    #[doc = "No effect"]
180    #[inline(always)]
181    pub fn disable(self) -> &'a mut W {
182        self.variant(SRAM_IF2_PPD_A::DISABLE)
183    }
184    #[doc = "Clears the PDRUNCFG3 Bit"]
185    #[inline(always)]
186    pub fn enable(self) -> &'a mut W {
187        self.variant(SRAM_IF2_PPD_A::ENABLE)
188    }
189}
190#[doc = "Field `SRAM_IF3_PPD` reader - Periphery power for RAM interface 3"]
191pub type SRAM_IF3_PPD_R = crate::BitReader<SRAM_IF3_PPD_A>;
192#[doc = "Periphery power for RAM interface 3\n\nValue on reset: 0"]
193#[derive(Clone, Copy, Debug, PartialEq, Eq)]
194pub enum SRAM_IF3_PPD_A {
195    #[doc = "0: No effect"]
196    DISABLE = 0,
197    #[doc = "1: Clears the PDRUNCFG3 Bit"]
198    ENABLE = 1,
199}
200impl From<SRAM_IF3_PPD_A> for bool {
201    #[inline(always)]
202    fn from(variant: SRAM_IF3_PPD_A) -> Self {
203        variant as u8 != 0
204    }
205}
206impl SRAM_IF3_PPD_R {
207    #[doc = "Get enumerated values variant"]
208    #[inline(always)]
209    pub fn variant(&self) -> SRAM_IF3_PPD_A {
210        match self.bits {
211            false => SRAM_IF3_PPD_A::DISABLE,
212            true => SRAM_IF3_PPD_A::ENABLE,
213        }
214    }
215    #[doc = "Checks if the value of the field is `DISABLE`"]
216    #[inline(always)]
217    pub fn is_disable(&self) -> bool {
218        *self == SRAM_IF3_PPD_A::DISABLE
219    }
220    #[doc = "Checks if the value of the field is `ENABLE`"]
221    #[inline(always)]
222    pub fn is_enable(&self) -> bool {
223        *self == SRAM_IF3_PPD_A::ENABLE
224    }
225}
226#[doc = "Field `SRAM_IF3_PPD` writer - Periphery power for RAM interface 3"]
227pub type SRAM_IF3_PPD_W<'a, const O: u8> =
228    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF3_PPD_A, O>;
229impl<'a, const O: u8> SRAM_IF3_PPD_W<'a, O> {
230    #[doc = "No effect"]
231    #[inline(always)]
232    pub fn disable(self) -> &'a mut W {
233        self.variant(SRAM_IF3_PPD_A::DISABLE)
234    }
235    #[doc = "Clears the PDRUNCFG3 Bit"]
236    #[inline(always)]
237    pub fn enable(self) -> &'a mut W {
238        self.variant(SRAM_IF3_PPD_A::ENABLE)
239    }
240}
241#[doc = "Field `SRAM_IF4_PPD` reader - Periphery power for RAM interface 4"]
242pub type SRAM_IF4_PPD_R = crate::BitReader<SRAM_IF4_PPD_A>;
243#[doc = "Periphery power for RAM interface 4\n\nValue on reset: 0"]
244#[derive(Clone, Copy, Debug, PartialEq, Eq)]
245pub enum SRAM_IF4_PPD_A {
246    #[doc = "0: No effect"]
247    DISABLE = 0,
248    #[doc = "1: Clears the PDRUNCFG3 Bit"]
249    ENABLE = 1,
250}
251impl From<SRAM_IF4_PPD_A> for bool {
252    #[inline(always)]
253    fn from(variant: SRAM_IF4_PPD_A) -> Self {
254        variant as u8 != 0
255    }
256}
257impl SRAM_IF4_PPD_R {
258    #[doc = "Get enumerated values variant"]
259    #[inline(always)]
260    pub fn variant(&self) -> SRAM_IF4_PPD_A {
261        match self.bits {
262            false => SRAM_IF4_PPD_A::DISABLE,
263            true => SRAM_IF4_PPD_A::ENABLE,
264        }
265    }
266    #[doc = "Checks if the value of the field is `DISABLE`"]
267    #[inline(always)]
268    pub fn is_disable(&self) -> bool {
269        *self == SRAM_IF4_PPD_A::DISABLE
270    }
271    #[doc = "Checks if the value of the field is `ENABLE`"]
272    #[inline(always)]
273    pub fn is_enable(&self) -> bool {
274        *self == SRAM_IF4_PPD_A::ENABLE
275    }
276}
277#[doc = "Field `SRAM_IF4_PPD` writer - Periphery power for RAM interface 4"]
278pub type SRAM_IF4_PPD_W<'a, const O: u8> =
279    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF4_PPD_A, O>;
280impl<'a, const O: u8> SRAM_IF4_PPD_W<'a, O> {
281    #[doc = "No effect"]
282    #[inline(always)]
283    pub fn disable(self) -> &'a mut W {
284        self.variant(SRAM_IF4_PPD_A::DISABLE)
285    }
286    #[doc = "Clears the PDRUNCFG3 Bit"]
287    #[inline(always)]
288    pub fn enable(self) -> &'a mut W {
289        self.variant(SRAM_IF4_PPD_A::ENABLE)
290    }
291}
292#[doc = "Field `SRAM_IF5_PPD` reader - Periphery power for RAM interface 5"]
293pub type SRAM_IF5_PPD_R = crate::BitReader<SRAM_IF5_PPD_A>;
294#[doc = "Periphery power for RAM interface 5\n\nValue on reset: 0"]
295#[derive(Clone, Copy, Debug, PartialEq, Eq)]
296pub enum SRAM_IF5_PPD_A {
297    #[doc = "0: No effect"]
298    DISABLE = 0,
299    #[doc = "1: Clears the PDRUNCFG3 Bit"]
300    ENABLE = 1,
301}
302impl From<SRAM_IF5_PPD_A> for bool {
303    #[inline(always)]
304    fn from(variant: SRAM_IF5_PPD_A) -> Self {
305        variant as u8 != 0
306    }
307}
308impl SRAM_IF5_PPD_R {
309    #[doc = "Get enumerated values variant"]
310    #[inline(always)]
311    pub fn variant(&self) -> SRAM_IF5_PPD_A {
312        match self.bits {
313            false => SRAM_IF5_PPD_A::DISABLE,
314            true => SRAM_IF5_PPD_A::ENABLE,
315        }
316    }
317    #[doc = "Checks if the value of the field is `DISABLE`"]
318    #[inline(always)]
319    pub fn is_disable(&self) -> bool {
320        *self == SRAM_IF5_PPD_A::DISABLE
321    }
322    #[doc = "Checks if the value of the field is `ENABLE`"]
323    #[inline(always)]
324    pub fn is_enable(&self) -> bool {
325        *self == SRAM_IF5_PPD_A::ENABLE
326    }
327}
328#[doc = "Field `SRAM_IF5_PPD` writer - Periphery power for RAM interface 5"]
329pub type SRAM_IF5_PPD_W<'a, const O: u8> =
330    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF5_PPD_A, O>;
331impl<'a, const O: u8> SRAM_IF5_PPD_W<'a, O> {
332    #[doc = "No effect"]
333    #[inline(always)]
334    pub fn disable(self) -> &'a mut W {
335        self.variant(SRAM_IF5_PPD_A::DISABLE)
336    }
337    #[doc = "Clears the PDRUNCFG3 Bit"]
338    #[inline(always)]
339    pub fn enable(self) -> &'a mut W {
340        self.variant(SRAM_IF5_PPD_A::ENABLE)
341    }
342}
343#[doc = "Field `SRAM_IF6_PPD` reader - Periphery power for RAM interface 6"]
344pub type SRAM_IF6_PPD_R = crate::BitReader<SRAM_IF6_PPD_A>;
345#[doc = "Periphery power for RAM interface 6\n\nValue on reset: 0"]
346#[derive(Clone, Copy, Debug, PartialEq, Eq)]
347pub enum SRAM_IF6_PPD_A {
348    #[doc = "0: No effect"]
349    DISABLE = 0,
350    #[doc = "1: Clears the PDRUNCFG3 Bit"]
351    ENABLE = 1,
352}
353impl From<SRAM_IF6_PPD_A> for bool {
354    #[inline(always)]
355    fn from(variant: SRAM_IF6_PPD_A) -> Self {
356        variant as u8 != 0
357    }
358}
359impl SRAM_IF6_PPD_R {
360    #[doc = "Get enumerated values variant"]
361    #[inline(always)]
362    pub fn variant(&self) -> SRAM_IF6_PPD_A {
363        match self.bits {
364            false => SRAM_IF6_PPD_A::DISABLE,
365            true => SRAM_IF6_PPD_A::ENABLE,
366        }
367    }
368    #[doc = "Checks if the value of the field is `DISABLE`"]
369    #[inline(always)]
370    pub fn is_disable(&self) -> bool {
371        *self == SRAM_IF6_PPD_A::DISABLE
372    }
373    #[doc = "Checks if the value of the field is `ENABLE`"]
374    #[inline(always)]
375    pub fn is_enable(&self) -> bool {
376        *self == SRAM_IF6_PPD_A::ENABLE
377    }
378}
379#[doc = "Field `SRAM_IF6_PPD` writer - Periphery power for RAM interface 6"]
380pub type SRAM_IF6_PPD_W<'a, const O: u8> =
381    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF6_PPD_A, O>;
382impl<'a, const O: u8> SRAM_IF6_PPD_W<'a, O> {
383    #[doc = "No effect"]
384    #[inline(always)]
385    pub fn disable(self) -> &'a mut W {
386        self.variant(SRAM_IF6_PPD_A::DISABLE)
387    }
388    #[doc = "Clears the PDRUNCFG3 Bit"]
389    #[inline(always)]
390    pub fn enable(self) -> &'a mut W {
391        self.variant(SRAM_IF6_PPD_A::ENABLE)
392    }
393}
394#[doc = "Field `SRAM_IF7_PPD` reader - Periphery power for RAM interface 7"]
395pub type SRAM_IF7_PPD_R = crate::BitReader<SRAM_IF7_PPD_A>;
396#[doc = "Periphery power for RAM interface 7\n\nValue on reset: 0"]
397#[derive(Clone, Copy, Debug, PartialEq, Eq)]
398pub enum SRAM_IF7_PPD_A {
399    #[doc = "0: No effect"]
400    DISABLE = 0,
401    #[doc = "1: Clears the PDRUNCFG3 Bit"]
402    ENABLE = 1,
403}
404impl From<SRAM_IF7_PPD_A> for bool {
405    #[inline(always)]
406    fn from(variant: SRAM_IF7_PPD_A) -> Self {
407        variant as u8 != 0
408    }
409}
410impl SRAM_IF7_PPD_R {
411    #[doc = "Get enumerated values variant"]
412    #[inline(always)]
413    pub fn variant(&self) -> SRAM_IF7_PPD_A {
414        match self.bits {
415            false => SRAM_IF7_PPD_A::DISABLE,
416            true => SRAM_IF7_PPD_A::ENABLE,
417        }
418    }
419    #[doc = "Checks if the value of the field is `DISABLE`"]
420    #[inline(always)]
421    pub fn is_disable(&self) -> bool {
422        *self == SRAM_IF7_PPD_A::DISABLE
423    }
424    #[doc = "Checks if the value of the field is `ENABLE`"]
425    #[inline(always)]
426    pub fn is_enable(&self) -> bool {
427        *self == SRAM_IF7_PPD_A::ENABLE
428    }
429}
430#[doc = "Field `SRAM_IF7_PPD` writer - Periphery power for RAM interface 7"]
431pub type SRAM_IF7_PPD_W<'a, const O: u8> =
432    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF7_PPD_A, O>;
433impl<'a, const O: u8> SRAM_IF7_PPD_W<'a, O> {
434    #[doc = "No effect"]
435    #[inline(always)]
436    pub fn disable(self) -> &'a mut W {
437        self.variant(SRAM_IF7_PPD_A::DISABLE)
438    }
439    #[doc = "Clears the PDRUNCFG3 Bit"]
440    #[inline(always)]
441    pub fn enable(self) -> &'a mut W {
442        self.variant(SRAM_IF7_PPD_A::ENABLE)
443    }
444}
445#[doc = "Field `SRAM_IF8_PPD` reader - Periphery power for RAM interface 8"]
446pub type SRAM_IF8_PPD_R = crate::BitReader<SRAM_IF8_PPD_A>;
447#[doc = "Periphery power for RAM interface 8\n\nValue on reset: 0"]
448#[derive(Clone, Copy, Debug, PartialEq, Eq)]
449pub enum SRAM_IF8_PPD_A {
450    #[doc = "0: No effect"]
451    DISABLE = 0,
452    #[doc = "1: Clears the PDRUNCFG3 Bit"]
453    ENABLE = 1,
454}
455impl From<SRAM_IF8_PPD_A> for bool {
456    #[inline(always)]
457    fn from(variant: SRAM_IF8_PPD_A) -> Self {
458        variant as u8 != 0
459    }
460}
461impl SRAM_IF8_PPD_R {
462    #[doc = "Get enumerated values variant"]
463    #[inline(always)]
464    pub fn variant(&self) -> SRAM_IF8_PPD_A {
465        match self.bits {
466            false => SRAM_IF8_PPD_A::DISABLE,
467            true => SRAM_IF8_PPD_A::ENABLE,
468        }
469    }
470    #[doc = "Checks if the value of the field is `DISABLE`"]
471    #[inline(always)]
472    pub fn is_disable(&self) -> bool {
473        *self == SRAM_IF8_PPD_A::DISABLE
474    }
475    #[doc = "Checks if the value of the field is `ENABLE`"]
476    #[inline(always)]
477    pub fn is_enable(&self) -> bool {
478        *self == SRAM_IF8_PPD_A::ENABLE
479    }
480}
481#[doc = "Field `SRAM_IF8_PPD` writer - Periphery power for RAM interface 8"]
482pub type SRAM_IF8_PPD_W<'a, const O: u8> =
483    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF8_PPD_A, O>;
484impl<'a, const O: u8> SRAM_IF8_PPD_W<'a, O> {
485    #[doc = "No effect"]
486    #[inline(always)]
487    pub fn disable(self) -> &'a mut W {
488        self.variant(SRAM_IF8_PPD_A::DISABLE)
489    }
490    #[doc = "Clears the PDRUNCFG3 Bit"]
491    #[inline(always)]
492    pub fn enable(self) -> &'a mut W {
493        self.variant(SRAM_IF8_PPD_A::ENABLE)
494    }
495}
496#[doc = "Field `SRAM_IF9_PPD` reader - Periphery power for RAM interface 9"]
497pub type SRAM_IF9_PPD_R = crate::BitReader<SRAM_IF9_PPD_A>;
498#[doc = "Periphery power for RAM interface 9\n\nValue on reset: 0"]
499#[derive(Clone, Copy, Debug, PartialEq, Eq)]
500pub enum SRAM_IF9_PPD_A {
501    #[doc = "0: No effect"]
502    DISABLE = 0,
503    #[doc = "1: Clears the PDRUNCFG3 Bit"]
504    ENABLE = 1,
505}
506impl From<SRAM_IF9_PPD_A> for bool {
507    #[inline(always)]
508    fn from(variant: SRAM_IF9_PPD_A) -> Self {
509        variant as u8 != 0
510    }
511}
512impl SRAM_IF9_PPD_R {
513    #[doc = "Get enumerated values variant"]
514    #[inline(always)]
515    pub fn variant(&self) -> SRAM_IF9_PPD_A {
516        match self.bits {
517            false => SRAM_IF9_PPD_A::DISABLE,
518            true => SRAM_IF9_PPD_A::ENABLE,
519        }
520    }
521    #[doc = "Checks if the value of the field is `DISABLE`"]
522    #[inline(always)]
523    pub fn is_disable(&self) -> bool {
524        *self == SRAM_IF9_PPD_A::DISABLE
525    }
526    #[doc = "Checks if the value of the field is `ENABLE`"]
527    #[inline(always)]
528    pub fn is_enable(&self) -> bool {
529        *self == SRAM_IF9_PPD_A::ENABLE
530    }
531}
532#[doc = "Field `SRAM_IF9_PPD` writer - Periphery power for RAM interface 9"]
533pub type SRAM_IF9_PPD_W<'a, const O: u8> =
534    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF9_PPD_A, O>;
535impl<'a, const O: u8> SRAM_IF9_PPD_W<'a, O> {
536    #[doc = "No effect"]
537    #[inline(always)]
538    pub fn disable(self) -> &'a mut W {
539        self.variant(SRAM_IF9_PPD_A::DISABLE)
540    }
541    #[doc = "Clears the PDRUNCFG3 Bit"]
542    #[inline(always)]
543    pub fn enable(self) -> &'a mut W {
544        self.variant(SRAM_IF9_PPD_A::ENABLE)
545    }
546}
547#[doc = "Field `SRAM_IF10_PPD` reader - Periphery power for RAM interface 10"]
548pub type SRAM_IF10_PPD_R = crate::BitReader<SRAM_IF10_PPD_A>;
549#[doc = "Periphery power for RAM interface 10\n\nValue on reset: 0"]
550#[derive(Clone, Copy, Debug, PartialEq, Eq)]
551pub enum SRAM_IF10_PPD_A {
552    #[doc = "0: No effect"]
553    DISABLE = 0,
554    #[doc = "1: Clears the PDRUNCFG3 Bit"]
555    ENABLE = 1,
556}
557impl From<SRAM_IF10_PPD_A> for bool {
558    #[inline(always)]
559    fn from(variant: SRAM_IF10_PPD_A) -> Self {
560        variant as u8 != 0
561    }
562}
563impl SRAM_IF10_PPD_R {
564    #[doc = "Get enumerated values variant"]
565    #[inline(always)]
566    pub fn variant(&self) -> SRAM_IF10_PPD_A {
567        match self.bits {
568            false => SRAM_IF10_PPD_A::DISABLE,
569            true => SRAM_IF10_PPD_A::ENABLE,
570        }
571    }
572    #[doc = "Checks if the value of the field is `DISABLE`"]
573    #[inline(always)]
574    pub fn is_disable(&self) -> bool {
575        *self == SRAM_IF10_PPD_A::DISABLE
576    }
577    #[doc = "Checks if the value of the field is `ENABLE`"]
578    #[inline(always)]
579    pub fn is_enable(&self) -> bool {
580        *self == SRAM_IF10_PPD_A::ENABLE
581    }
582}
583#[doc = "Field `SRAM_IF10_PPD` writer - Periphery power for RAM interface 10"]
584pub type SRAM_IF10_PPD_W<'a, const O: u8> =
585    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF10_PPD_A, O>;
586impl<'a, const O: u8> SRAM_IF10_PPD_W<'a, O> {
587    #[doc = "No effect"]
588    #[inline(always)]
589    pub fn disable(self) -> &'a mut W {
590        self.variant(SRAM_IF10_PPD_A::DISABLE)
591    }
592    #[doc = "Clears the PDRUNCFG3 Bit"]
593    #[inline(always)]
594    pub fn enable(self) -> &'a mut W {
595        self.variant(SRAM_IF10_PPD_A::ENABLE)
596    }
597}
598#[doc = "Field `SRAM_IF11_PPD` reader - Periphery power for RAM interface 11"]
599pub type SRAM_IF11_PPD_R = crate::BitReader<SRAM_IF11_PPD_A>;
600#[doc = "Periphery power for RAM interface 11\n\nValue on reset: 0"]
601#[derive(Clone, Copy, Debug, PartialEq, Eq)]
602pub enum SRAM_IF11_PPD_A {
603    #[doc = "0: No effect"]
604    DISABLE = 0,
605    #[doc = "1: Clears the PDRUNCFG3 Bit"]
606    ENABLE = 1,
607}
608impl From<SRAM_IF11_PPD_A> for bool {
609    #[inline(always)]
610    fn from(variant: SRAM_IF11_PPD_A) -> Self {
611        variant as u8 != 0
612    }
613}
614impl SRAM_IF11_PPD_R {
615    #[doc = "Get enumerated values variant"]
616    #[inline(always)]
617    pub fn variant(&self) -> SRAM_IF11_PPD_A {
618        match self.bits {
619            false => SRAM_IF11_PPD_A::DISABLE,
620            true => SRAM_IF11_PPD_A::ENABLE,
621        }
622    }
623    #[doc = "Checks if the value of the field is `DISABLE`"]
624    #[inline(always)]
625    pub fn is_disable(&self) -> bool {
626        *self == SRAM_IF11_PPD_A::DISABLE
627    }
628    #[doc = "Checks if the value of the field is `ENABLE`"]
629    #[inline(always)]
630    pub fn is_enable(&self) -> bool {
631        *self == SRAM_IF11_PPD_A::ENABLE
632    }
633}
634#[doc = "Field `SRAM_IF11_PPD` writer - Periphery power for RAM interface 11"]
635pub type SRAM_IF11_PPD_W<'a, const O: u8> =
636    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF11_PPD_A, O>;
637impl<'a, const O: u8> SRAM_IF11_PPD_W<'a, O> {
638    #[doc = "No effect"]
639    #[inline(always)]
640    pub fn disable(self) -> &'a mut W {
641        self.variant(SRAM_IF11_PPD_A::DISABLE)
642    }
643    #[doc = "Clears the PDRUNCFG3 Bit"]
644    #[inline(always)]
645    pub fn enable(self) -> &'a mut W {
646        self.variant(SRAM_IF11_PPD_A::ENABLE)
647    }
648}
649#[doc = "Field `SRAM_IF12_PPD` reader - Periphery power for RAM interface 12"]
650pub type SRAM_IF12_PPD_R = crate::BitReader<SRAM_IF12_PPD_A>;
651#[doc = "Periphery power for RAM interface 12\n\nValue on reset: 0"]
652#[derive(Clone, Copy, Debug, PartialEq, Eq)]
653pub enum SRAM_IF12_PPD_A {
654    #[doc = "0: No effect"]
655    DISABLE = 0,
656    #[doc = "1: Clears the PDRUNCFG3 Bit"]
657    ENABLE = 1,
658}
659impl From<SRAM_IF12_PPD_A> for bool {
660    #[inline(always)]
661    fn from(variant: SRAM_IF12_PPD_A) -> Self {
662        variant as u8 != 0
663    }
664}
665impl SRAM_IF12_PPD_R {
666    #[doc = "Get enumerated values variant"]
667    #[inline(always)]
668    pub fn variant(&self) -> SRAM_IF12_PPD_A {
669        match self.bits {
670            false => SRAM_IF12_PPD_A::DISABLE,
671            true => SRAM_IF12_PPD_A::ENABLE,
672        }
673    }
674    #[doc = "Checks if the value of the field is `DISABLE`"]
675    #[inline(always)]
676    pub fn is_disable(&self) -> bool {
677        *self == SRAM_IF12_PPD_A::DISABLE
678    }
679    #[doc = "Checks if the value of the field is `ENABLE`"]
680    #[inline(always)]
681    pub fn is_enable(&self) -> bool {
682        *self == SRAM_IF12_PPD_A::ENABLE
683    }
684}
685#[doc = "Field `SRAM_IF12_PPD` writer - Periphery power for RAM interface 12"]
686pub type SRAM_IF12_PPD_W<'a, const O: u8> =
687    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF12_PPD_A, O>;
688impl<'a, const O: u8> SRAM_IF12_PPD_W<'a, O> {
689    #[doc = "No effect"]
690    #[inline(always)]
691    pub fn disable(self) -> &'a mut W {
692        self.variant(SRAM_IF12_PPD_A::DISABLE)
693    }
694    #[doc = "Clears the PDRUNCFG3 Bit"]
695    #[inline(always)]
696    pub fn enable(self) -> &'a mut W {
697        self.variant(SRAM_IF12_PPD_A::ENABLE)
698    }
699}
700#[doc = "Field `SRAM_IF13_PPD` reader - Periphery power for RAM interface 13"]
701pub type SRAM_IF13_PPD_R = crate::BitReader<SRAM_IF13_PPD_A>;
702#[doc = "Periphery power for RAM interface 13\n\nValue on reset: 0"]
703#[derive(Clone, Copy, Debug, PartialEq, Eq)]
704pub enum SRAM_IF13_PPD_A {
705    #[doc = "0: No effect"]
706    DISABLE = 0,
707    #[doc = "1: Clears the PDRUNCFG3 Bit"]
708    ENABLE = 1,
709}
710impl From<SRAM_IF13_PPD_A> for bool {
711    #[inline(always)]
712    fn from(variant: SRAM_IF13_PPD_A) -> Self {
713        variant as u8 != 0
714    }
715}
716impl SRAM_IF13_PPD_R {
717    #[doc = "Get enumerated values variant"]
718    #[inline(always)]
719    pub fn variant(&self) -> SRAM_IF13_PPD_A {
720        match self.bits {
721            false => SRAM_IF13_PPD_A::DISABLE,
722            true => SRAM_IF13_PPD_A::ENABLE,
723        }
724    }
725    #[doc = "Checks if the value of the field is `DISABLE`"]
726    #[inline(always)]
727    pub fn is_disable(&self) -> bool {
728        *self == SRAM_IF13_PPD_A::DISABLE
729    }
730    #[doc = "Checks if the value of the field is `ENABLE`"]
731    #[inline(always)]
732    pub fn is_enable(&self) -> bool {
733        *self == SRAM_IF13_PPD_A::ENABLE
734    }
735}
736#[doc = "Field `SRAM_IF13_PPD` writer - Periphery power for RAM interface 13"]
737pub type SRAM_IF13_PPD_W<'a, const O: u8> =
738    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF13_PPD_A, O>;
739impl<'a, const O: u8> SRAM_IF13_PPD_W<'a, O> {
740    #[doc = "No effect"]
741    #[inline(always)]
742    pub fn disable(self) -> &'a mut W {
743        self.variant(SRAM_IF13_PPD_A::DISABLE)
744    }
745    #[doc = "Clears the PDRUNCFG3 Bit"]
746    #[inline(always)]
747    pub fn enable(self) -> &'a mut W {
748        self.variant(SRAM_IF13_PPD_A::ENABLE)
749    }
750}
751#[doc = "Field `SRAM_IF14_PPD` reader - Periphery power for RAM interface 14"]
752pub type SRAM_IF14_PPD_R = crate::BitReader<SRAM_IF14_PPD_A>;
753#[doc = "Periphery power for RAM interface 14\n\nValue on reset: 0"]
754#[derive(Clone, Copy, Debug, PartialEq, Eq)]
755pub enum SRAM_IF14_PPD_A {
756    #[doc = "0: No effect"]
757    DISABLE = 0,
758    #[doc = "1: Clears the PDRUNCFG3 Bit"]
759    ENABLE = 1,
760}
761impl From<SRAM_IF14_PPD_A> for bool {
762    #[inline(always)]
763    fn from(variant: SRAM_IF14_PPD_A) -> Self {
764        variant as u8 != 0
765    }
766}
767impl SRAM_IF14_PPD_R {
768    #[doc = "Get enumerated values variant"]
769    #[inline(always)]
770    pub fn variant(&self) -> SRAM_IF14_PPD_A {
771        match self.bits {
772            false => SRAM_IF14_PPD_A::DISABLE,
773            true => SRAM_IF14_PPD_A::ENABLE,
774        }
775    }
776    #[doc = "Checks if the value of the field is `DISABLE`"]
777    #[inline(always)]
778    pub fn is_disable(&self) -> bool {
779        *self == SRAM_IF14_PPD_A::DISABLE
780    }
781    #[doc = "Checks if the value of the field is `ENABLE`"]
782    #[inline(always)]
783    pub fn is_enable(&self) -> bool {
784        *self == SRAM_IF14_PPD_A::ENABLE
785    }
786}
787#[doc = "Field `SRAM_IF14_PPD` writer - Periphery power for RAM interface 14"]
788pub type SRAM_IF14_PPD_W<'a, const O: u8> =
789    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF14_PPD_A, O>;
790impl<'a, const O: u8> SRAM_IF14_PPD_W<'a, O> {
791    #[doc = "No effect"]
792    #[inline(always)]
793    pub fn disable(self) -> &'a mut W {
794        self.variant(SRAM_IF14_PPD_A::DISABLE)
795    }
796    #[doc = "Clears the PDRUNCFG3 Bit"]
797    #[inline(always)]
798    pub fn enable(self) -> &'a mut W {
799        self.variant(SRAM_IF14_PPD_A::ENABLE)
800    }
801}
802#[doc = "Field `SRAM_IF15_PPD` reader - Periphery power for RAM interface 15"]
803pub type SRAM_IF15_PPD_R = crate::BitReader<SRAM_IF15_PPD_A>;
804#[doc = "Periphery power for RAM interface 15\n\nValue on reset: 0"]
805#[derive(Clone, Copy, Debug, PartialEq, Eq)]
806pub enum SRAM_IF15_PPD_A {
807    #[doc = "0: No effect"]
808    DISABLE = 0,
809    #[doc = "1: Clears the PDRUNCFG3 Bit"]
810    ENABLE = 1,
811}
812impl From<SRAM_IF15_PPD_A> for bool {
813    #[inline(always)]
814    fn from(variant: SRAM_IF15_PPD_A) -> Self {
815        variant as u8 != 0
816    }
817}
818impl SRAM_IF15_PPD_R {
819    #[doc = "Get enumerated values variant"]
820    #[inline(always)]
821    pub fn variant(&self) -> SRAM_IF15_PPD_A {
822        match self.bits {
823            false => SRAM_IF15_PPD_A::DISABLE,
824            true => SRAM_IF15_PPD_A::ENABLE,
825        }
826    }
827    #[doc = "Checks if the value of the field is `DISABLE`"]
828    #[inline(always)]
829    pub fn is_disable(&self) -> bool {
830        *self == SRAM_IF15_PPD_A::DISABLE
831    }
832    #[doc = "Checks if the value of the field is `ENABLE`"]
833    #[inline(always)]
834    pub fn is_enable(&self) -> bool {
835        *self == SRAM_IF15_PPD_A::ENABLE
836    }
837}
838#[doc = "Field `SRAM_IF15_PPD` writer - Periphery power for RAM interface 15"]
839pub type SRAM_IF15_PPD_W<'a, const O: u8> =
840    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF15_PPD_A, O>;
841impl<'a, const O: u8> SRAM_IF15_PPD_W<'a, O> {
842    #[doc = "No effect"]
843    #[inline(always)]
844    pub fn disable(self) -> &'a mut W {
845        self.variant(SRAM_IF15_PPD_A::DISABLE)
846    }
847    #[doc = "Clears the PDRUNCFG3 Bit"]
848    #[inline(always)]
849    pub fn enable(self) -> &'a mut W {
850        self.variant(SRAM_IF15_PPD_A::ENABLE)
851    }
852}
853#[doc = "Field `SRAM_IF16_PPD` reader - Periphery power for RAM interface 16"]
854pub type SRAM_IF16_PPD_R = crate::BitReader<SRAM_IF16_PPD_A>;
855#[doc = "Periphery power for RAM interface 16\n\nValue on reset: 0"]
856#[derive(Clone, Copy, Debug, PartialEq, Eq)]
857pub enum SRAM_IF16_PPD_A {
858    #[doc = "0: No effect"]
859    DISABLE = 0,
860    #[doc = "1: Clears the PDRUNCFG3 Bit"]
861    ENABLE = 1,
862}
863impl From<SRAM_IF16_PPD_A> for bool {
864    #[inline(always)]
865    fn from(variant: SRAM_IF16_PPD_A) -> Self {
866        variant as u8 != 0
867    }
868}
869impl SRAM_IF16_PPD_R {
870    #[doc = "Get enumerated values variant"]
871    #[inline(always)]
872    pub fn variant(&self) -> SRAM_IF16_PPD_A {
873        match self.bits {
874            false => SRAM_IF16_PPD_A::DISABLE,
875            true => SRAM_IF16_PPD_A::ENABLE,
876        }
877    }
878    #[doc = "Checks if the value of the field is `DISABLE`"]
879    #[inline(always)]
880    pub fn is_disable(&self) -> bool {
881        *self == SRAM_IF16_PPD_A::DISABLE
882    }
883    #[doc = "Checks if the value of the field is `ENABLE`"]
884    #[inline(always)]
885    pub fn is_enable(&self) -> bool {
886        *self == SRAM_IF16_PPD_A::ENABLE
887    }
888}
889#[doc = "Field `SRAM_IF16_PPD` writer - Periphery power for RAM interface 16"]
890pub type SRAM_IF16_PPD_W<'a, const O: u8> =
891    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF16_PPD_A, O>;
892impl<'a, const O: u8> SRAM_IF16_PPD_W<'a, O> {
893    #[doc = "No effect"]
894    #[inline(always)]
895    pub fn disable(self) -> &'a mut W {
896        self.variant(SRAM_IF16_PPD_A::DISABLE)
897    }
898    #[doc = "Clears the PDRUNCFG3 Bit"]
899    #[inline(always)]
900    pub fn enable(self) -> &'a mut W {
901        self.variant(SRAM_IF16_PPD_A::ENABLE)
902    }
903}
904#[doc = "Field `SRAM_IF17_PPD` reader - Periphery power for RAM interface 17"]
905pub type SRAM_IF17_PPD_R = crate::BitReader<SRAM_IF17_PPD_A>;
906#[doc = "Periphery power for RAM interface 17\n\nValue on reset: 0"]
907#[derive(Clone, Copy, Debug, PartialEq, Eq)]
908pub enum SRAM_IF17_PPD_A {
909    #[doc = "0: No effect"]
910    DISABLE = 0,
911    #[doc = "1: Clears the PDRUNCFG3 Bit"]
912    ENABLE = 1,
913}
914impl From<SRAM_IF17_PPD_A> for bool {
915    #[inline(always)]
916    fn from(variant: SRAM_IF17_PPD_A) -> Self {
917        variant as u8 != 0
918    }
919}
920impl SRAM_IF17_PPD_R {
921    #[doc = "Get enumerated values variant"]
922    #[inline(always)]
923    pub fn variant(&self) -> SRAM_IF17_PPD_A {
924        match self.bits {
925            false => SRAM_IF17_PPD_A::DISABLE,
926            true => SRAM_IF17_PPD_A::ENABLE,
927        }
928    }
929    #[doc = "Checks if the value of the field is `DISABLE`"]
930    #[inline(always)]
931    pub fn is_disable(&self) -> bool {
932        *self == SRAM_IF17_PPD_A::DISABLE
933    }
934    #[doc = "Checks if the value of the field is `ENABLE`"]
935    #[inline(always)]
936    pub fn is_enable(&self) -> bool {
937        *self == SRAM_IF17_PPD_A::ENABLE
938    }
939}
940#[doc = "Field `SRAM_IF17_PPD` writer - Periphery power for RAM interface 17"]
941pub type SRAM_IF17_PPD_W<'a, const O: u8> =
942    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF17_PPD_A, O>;
943impl<'a, const O: u8> SRAM_IF17_PPD_W<'a, O> {
944    #[doc = "No effect"]
945    #[inline(always)]
946    pub fn disable(self) -> &'a mut W {
947        self.variant(SRAM_IF17_PPD_A::DISABLE)
948    }
949    #[doc = "Clears the PDRUNCFG3 Bit"]
950    #[inline(always)]
951    pub fn enable(self) -> &'a mut W {
952        self.variant(SRAM_IF17_PPD_A::ENABLE)
953    }
954}
955#[doc = "Field `SRAM_IF18_PPD` reader - Periphery power for RAM interface 18"]
956pub type SRAM_IF18_PPD_R = crate::BitReader<SRAM_IF18_PPD_A>;
957#[doc = "Periphery power for RAM interface 18\n\nValue on reset: 0"]
958#[derive(Clone, Copy, Debug, PartialEq, Eq)]
959pub enum SRAM_IF18_PPD_A {
960    #[doc = "0: No effect"]
961    DISABLE = 0,
962    #[doc = "1: Clears the PDRUNCFG3 Bit"]
963    ENABLE = 1,
964}
965impl From<SRAM_IF18_PPD_A> for bool {
966    #[inline(always)]
967    fn from(variant: SRAM_IF18_PPD_A) -> Self {
968        variant as u8 != 0
969    }
970}
971impl SRAM_IF18_PPD_R {
972    #[doc = "Get enumerated values variant"]
973    #[inline(always)]
974    pub fn variant(&self) -> SRAM_IF18_PPD_A {
975        match self.bits {
976            false => SRAM_IF18_PPD_A::DISABLE,
977            true => SRAM_IF18_PPD_A::ENABLE,
978        }
979    }
980    #[doc = "Checks if the value of the field is `DISABLE`"]
981    #[inline(always)]
982    pub fn is_disable(&self) -> bool {
983        *self == SRAM_IF18_PPD_A::DISABLE
984    }
985    #[doc = "Checks if the value of the field is `ENABLE`"]
986    #[inline(always)]
987    pub fn is_enable(&self) -> bool {
988        *self == SRAM_IF18_PPD_A::ENABLE
989    }
990}
991#[doc = "Field `SRAM_IF18_PPD` writer - Periphery power for RAM interface 18"]
992pub type SRAM_IF18_PPD_W<'a, const O: u8> =
993    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF18_PPD_A, O>;
994impl<'a, const O: u8> SRAM_IF18_PPD_W<'a, O> {
995    #[doc = "No effect"]
996    #[inline(always)]
997    pub fn disable(self) -> &'a mut W {
998        self.variant(SRAM_IF18_PPD_A::DISABLE)
999    }
1000    #[doc = "Clears the PDRUNCFG3 Bit"]
1001    #[inline(always)]
1002    pub fn enable(self) -> &'a mut W {
1003        self.variant(SRAM_IF18_PPD_A::ENABLE)
1004    }
1005}
1006#[doc = "Field `SRAM_IF19_PPD` reader - Periphery power for RAM interface 19"]
1007pub type SRAM_IF19_PPD_R = crate::BitReader<SRAM_IF19_PPD_A>;
1008#[doc = "Periphery power for RAM interface 19\n\nValue on reset: 0"]
1009#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1010pub enum SRAM_IF19_PPD_A {
1011    #[doc = "0: No effect"]
1012    DISABLE = 0,
1013    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1014    ENABLE = 1,
1015}
1016impl From<SRAM_IF19_PPD_A> for bool {
1017    #[inline(always)]
1018    fn from(variant: SRAM_IF19_PPD_A) -> Self {
1019        variant as u8 != 0
1020    }
1021}
1022impl SRAM_IF19_PPD_R {
1023    #[doc = "Get enumerated values variant"]
1024    #[inline(always)]
1025    pub fn variant(&self) -> SRAM_IF19_PPD_A {
1026        match self.bits {
1027            false => SRAM_IF19_PPD_A::DISABLE,
1028            true => SRAM_IF19_PPD_A::ENABLE,
1029        }
1030    }
1031    #[doc = "Checks if the value of the field is `DISABLE`"]
1032    #[inline(always)]
1033    pub fn is_disable(&self) -> bool {
1034        *self == SRAM_IF19_PPD_A::DISABLE
1035    }
1036    #[doc = "Checks if the value of the field is `ENABLE`"]
1037    #[inline(always)]
1038    pub fn is_enable(&self) -> bool {
1039        *self == SRAM_IF19_PPD_A::ENABLE
1040    }
1041}
1042#[doc = "Field `SRAM_IF19_PPD` writer - Periphery power for RAM interface 19"]
1043pub type SRAM_IF19_PPD_W<'a, const O: u8> =
1044    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF19_PPD_A, O>;
1045impl<'a, const O: u8> SRAM_IF19_PPD_W<'a, O> {
1046    #[doc = "No effect"]
1047    #[inline(always)]
1048    pub fn disable(self) -> &'a mut W {
1049        self.variant(SRAM_IF19_PPD_A::DISABLE)
1050    }
1051    #[doc = "Clears the PDRUNCFG3 Bit"]
1052    #[inline(always)]
1053    pub fn enable(self) -> &'a mut W {
1054        self.variant(SRAM_IF19_PPD_A::ENABLE)
1055    }
1056}
1057#[doc = "Field `SRAM_IF20_PPD` reader - Periphery power for RAM interface 20"]
1058pub type SRAM_IF20_PPD_R = crate::BitReader<SRAM_IF20_PPD_A>;
1059#[doc = "Periphery power for RAM interface 20\n\nValue on reset: 0"]
1060#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1061pub enum SRAM_IF20_PPD_A {
1062    #[doc = "0: No effect"]
1063    DISABLE = 0,
1064    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1065    ENABLE = 1,
1066}
1067impl From<SRAM_IF20_PPD_A> for bool {
1068    #[inline(always)]
1069    fn from(variant: SRAM_IF20_PPD_A) -> Self {
1070        variant as u8 != 0
1071    }
1072}
1073impl SRAM_IF20_PPD_R {
1074    #[doc = "Get enumerated values variant"]
1075    #[inline(always)]
1076    pub fn variant(&self) -> SRAM_IF20_PPD_A {
1077        match self.bits {
1078            false => SRAM_IF20_PPD_A::DISABLE,
1079            true => SRAM_IF20_PPD_A::ENABLE,
1080        }
1081    }
1082    #[doc = "Checks if the value of the field is `DISABLE`"]
1083    #[inline(always)]
1084    pub fn is_disable(&self) -> bool {
1085        *self == SRAM_IF20_PPD_A::DISABLE
1086    }
1087    #[doc = "Checks if the value of the field is `ENABLE`"]
1088    #[inline(always)]
1089    pub fn is_enable(&self) -> bool {
1090        *self == SRAM_IF20_PPD_A::ENABLE
1091    }
1092}
1093#[doc = "Field `SRAM_IF20_PPD` writer - Periphery power for RAM interface 20"]
1094pub type SRAM_IF20_PPD_W<'a, const O: u8> =
1095    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF20_PPD_A, O>;
1096impl<'a, const O: u8> SRAM_IF20_PPD_W<'a, O> {
1097    #[doc = "No effect"]
1098    #[inline(always)]
1099    pub fn disable(self) -> &'a mut W {
1100        self.variant(SRAM_IF20_PPD_A::DISABLE)
1101    }
1102    #[doc = "Clears the PDRUNCFG3 Bit"]
1103    #[inline(always)]
1104    pub fn enable(self) -> &'a mut W {
1105        self.variant(SRAM_IF20_PPD_A::ENABLE)
1106    }
1107}
1108#[doc = "Field `SRAM_IF21_PPD` reader - Periphery power for RAM interface 21"]
1109pub type SRAM_IF21_PPD_R = crate::BitReader<SRAM_IF21_PPD_A>;
1110#[doc = "Periphery power for RAM interface 21\n\nValue on reset: 0"]
1111#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1112pub enum SRAM_IF21_PPD_A {
1113    #[doc = "0: No effect"]
1114    DISABLE = 0,
1115    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1116    ENABLE = 1,
1117}
1118impl From<SRAM_IF21_PPD_A> for bool {
1119    #[inline(always)]
1120    fn from(variant: SRAM_IF21_PPD_A) -> Self {
1121        variant as u8 != 0
1122    }
1123}
1124impl SRAM_IF21_PPD_R {
1125    #[doc = "Get enumerated values variant"]
1126    #[inline(always)]
1127    pub fn variant(&self) -> SRAM_IF21_PPD_A {
1128        match self.bits {
1129            false => SRAM_IF21_PPD_A::DISABLE,
1130            true => SRAM_IF21_PPD_A::ENABLE,
1131        }
1132    }
1133    #[doc = "Checks if the value of the field is `DISABLE`"]
1134    #[inline(always)]
1135    pub fn is_disable(&self) -> bool {
1136        *self == SRAM_IF21_PPD_A::DISABLE
1137    }
1138    #[doc = "Checks if the value of the field is `ENABLE`"]
1139    #[inline(always)]
1140    pub fn is_enable(&self) -> bool {
1141        *self == SRAM_IF21_PPD_A::ENABLE
1142    }
1143}
1144#[doc = "Field `SRAM_IF21_PPD` writer - Periphery power for RAM interface 21"]
1145pub type SRAM_IF21_PPD_W<'a, const O: u8> =
1146    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF21_PPD_A, O>;
1147impl<'a, const O: u8> SRAM_IF21_PPD_W<'a, O> {
1148    #[doc = "No effect"]
1149    #[inline(always)]
1150    pub fn disable(self) -> &'a mut W {
1151        self.variant(SRAM_IF21_PPD_A::DISABLE)
1152    }
1153    #[doc = "Clears the PDRUNCFG3 Bit"]
1154    #[inline(always)]
1155    pub fn enable(self) -> &'a mut W {
1156        self.variant(SRAM_IF21_PPD_A::ENABLE)
1157    }
1158}
1159#[doc = "Field `SRAM_IF22_PPD` reader - Periphery power for RAM interface 22"]
1160pub type SRAM_IF22_PPD_R = crate::BitReader<SRAM_IF22_PPD_A>;
1161#[doc = "Periphery power for RAM interface 22\n\nValue on reset: 0"]
1162#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1163pub enum SRAM_IF22_PPD_A {
1164    #[doc = "0: No effect"]
1165    DISABLE = 0,
1166    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1167    ENABLE = 1,
1168}
1169impl From<SRAM_IF22_PPD_A> for bool {
1170    #[inline(always)]
1171    fn from(variant: SRAM_IF22_PPD_A) -> Self {
1172        variant as u8 != 0
1173    }
1174}
1175impl SRAM_IF22_PPD_R {
1176    #[doc = "Get enumerated values variant"]
1177    #[inline(always)]
1178    pub fn variant(&self) -> SRAM_IF22_PPD_A {
1179        match self.bits {
1180            false => SRAM_IF22_PPD_A::DISABLE,
1181            true => SRAM_IF22_PPD_A::ENABLE,
1182        }
1183    }
1184    #[doc = "Checks if the value of the field is `DISABLE`"]
1185    #[inline(always)]
1186    pub fn is_disable(&self) -> bool {
1187        *self == SRAM_IF22_PPD_A::DISABLE
1188    }
1189    #[doc = "Checks if the value of the field is `ENABLE`"]
1190    #[inline(always)]
1191    pub fn is_enable(&self) -> bool {
1192        *self == SRAM_IF22_PPD_A::ENABLE
1193    }
1194}
1195#[doc = "Field `SRAM_IF22_PPD` writer - Periphery power for RAM interface 22"]
1196pub type SRAM_IF22_PPD_W<'a, const O: u8> =
1197    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF22_PPD_A, O>;
1198impl<'a, const O: u8> SRAM_IF22_PPD_W<'a, O> {
1199    #[doc = "No effect"]
1200    #[inline(always)]
1201    pub fn disable(self) -> &'a mut W {
1202        self.variant(SRAM_IF22_PPD_A::DISABLE)
1203    }
1204    #[doc = "Clears the PDRUNCFG3 Bit"]
1205    #[inline(always)]
1206    pub fn enable(self) -> &'a mut W {
1207        self.variant(SRAM_IF22_PPD_A::ENABLE)
1208    }
1209}
1210#[doc = "Field `SRAM_IF23_PPD` reader - Periphery power for RAM interface 23"]
1211pub type SRAM_IF23_PPD_R = crate::BitReader<SRAM_IF23_PPD_A>;
1212#[doc = "Periphery power for RAM interface 23\n\nValue on reset: 0"]
1213#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1214pub enum SRAM_IF23_PPD_A {
1215    #[doc = "0: No effect"]
1216    DISABLE = 0,
1217    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1218    ENABLE = 1,
1219}
1220impl From<SRAM_IF23_PPD_A> for bool {
1221    #[inline(always)]
1222    fn from(variant: SRAM_IF23_PPD_A) -> Self {
1223        variant as u8 != 0
1224    }
1225}
1226impl SRAM_IF23_PPD_R {
1227    #[doc = "Get enumerated values variant"]
1228    #[inline(always)]
1229    pub fn variant(&self) -> SRAM_IF23_PPD_A {
1230        match self.bits {
1231            false => SRAM_IF23_PPD_A::DISABLE,
1232            true => SRAM_IF23_PPD_A::ENABLE,
1233        }
1234    }
1235    #[doc = "Checks if the value of the field is `DISABLE`"]
1236    #[inline(always)]
1237    pub fn is_disable(&self) -> bool {
1238        *self == SRAM_IF23_PPD_A::DISABLE
1239    }
1240    #[doc = "Checks if the value of the field is `ENABLE`"]
1241    #[inline(always)]
1242    pub fn is_enable(&self) -> bool {
1243        *self == SRAM_IF23_PPD_A::ENABLE
1244    }
1245}
1246#[doc = "Field `SRAM_IF23_PPD` writer - Periphery power for RAM interface 23"]
1247pub type SRAM_IF23_PPD_W<'a, const O: u8> =
1248    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF23_PPD_A, O>;
1249impl<'a, const O: u8> SRAM_IF23_PPD_W<'a, O> {
1250    #[doc = "No effect"]
1251    #[inline(always)]
1252    pub fn disable(self) -> &'a mut W {
1253        self.variant(SRAM_IF23_PPD_A::DISABLE)
1254    }
1255    #[doc = "Clears the PDRUNCFG3 Bit"]
1256    #[inline(always)]
1257    pub fn enable(self) -> &'a mut W {
1258        self.variant(SRAM_IF23_PPD_A::ENABLE)
1259    }
1260}
1261#[doc = "Field `SRAM_IF24_PPD` reader - Periphery power for RAM interface 24"]
1262pub type SRAM_IF24_PPD_R = crate::BitReader<SRAM_IF24_PPD_A>;
1263#[doc = "Periphery power for RAM interface 24\n\nValue on reset: 0"]
1264#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1265pub enum SRAM_IF24_PPD_A {
1266    #[doc = "0: No effect"]
1267    DISABLE = 0,
1268    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1269    ENABLE = 1,
1270}
1271impl From<SRAM_IF24_PPD_A> for bool {
1272    #[inline(always)]
1273    fn from(variant: SRAM_IF24_PPD_A) -> Self {
1274        variant as u8 != 0
1275    }
1276}
1277impl SRAM_IF24_PPD_R {
1278    #[doc = "Get enumerated values variant"]
1279    #[inline(always)]
1280    pub fn variant(&self) -> SRAM_IF24_PPD_A {
1281        match self.bits {
1282            false => SRAM_IF24_PPD_A::DISABLE,
1283            true => SRAM_IF24_PPD_A::ENABLE,
1284        }
1285    }
1286    #[doc = "Checks if the value of the field is `DISABLE`"]
1287    #[inline(always)]
1288    pub fn is_disable(&self) -> bool {
1289        *self == SRAM_IF24_PPD_A::DISABLE
1290    }
1291    #[doc = "Checks if the value of the field is `ENABLE`"]
1292    #[inline(always)]
1293    pub fn is_enable(&self) -> bool {
1294        *self == SRAM_IF24_PPD_A::ENABLE
1295    }
1296}
1297#[doc = "Field `SRAM_IF24_PPD` writer - Periphery power for RAM interface 24"]
1298pub type SRAM_IF24_PPD_W<'a, const O: u8> =
1299    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF24_PPD_A, O>;
1300impl<'a, const O: u8> SRAM_IF24_PPD_W<'a, O> {
1301    #[doc = "No effect"]
1302    #[inline(always)]
1303    pub fn disable(self) -> &'a mut W {
1304        self.variant(SRAM_IF24_PPD_A::DISABLE)
1305    }
1306    #[doc = "Clears the PDRUNCFG3 Bit"]
1307    #[inline(always)]
1308    pub fn enable(self) -> &'a mut W {
1309        self.variant(SRAM_IF24_PPD_A::ENABLE)
1310    }
1311}
1312#[doc = "Field `SRAM_IF25_PPD` reader - Periphery power for RAM interface 25"]
1313pub type SRAM_IF25_PPD_R = crate::BitReader<SRAM_IF25_PPD_A>;
1314#[doc = "Periphery power for RAM interface 25\n\nValue on reset: 0"]
1315#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1316pub enum SRAM_IF25_PPD_A {
1317    #[doc = "0: No effect"]
1318    DISABLE = 0,
1319    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1320    ENABLE = 1,
1321}
1322impl From<SRAM_IF25_PPD_A> for bool {
1323    #[inline(always)]
1324    fn from(variant: SRAM_IF25_PPD_A) -> Self {
1325        variant as u8 != 0
1326    }
1327}
1328impl SRAM_IF25_PPD_R {
1329    #[doc = "Get enumerated values variant"]
1330    #[inline(always)]
1331    pub fn variant(&self) -> SRAM_IF25_PPD_A {
1332        match self.bits {
1333            false => SRAM_IF25_PPD_A::DISABLE,
1334            true => SRAM_IF25_PPD_A::ENABLE,
1335        }
1336    }
1337    #[doc = "Checks if the value of the field is `DISABLE`"]
1338    #[inline(always)]
1339    pub fn is_disable(&self) -> bool {
1340        *self == SRAM_IF25_PPD_A::DISABLE
1341    }
1342    #[doc = "Checks if the value of the field is `ENABLE`"]
1343    #[inline(always)]
1344    pub fn is_enable(&self) -> bool {
1345        *self == SRAM_IF25_PPD_A::ENABLE
1346    }
1347}
1348#[doc = "Field `SRAM_IF25_PPD` writer - Periphery power for RAM interface 25"]
1349pub type SRAM_IF25_PPD_W<'a, const O: u8> =
1350    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF25_PPD_A, O>;
1351impl<'a, const O: u8> SRAM_IF25_PPD_W<'a, O> {
1352    #[doc = "No effect"]
1353    #[inline(always)]
1354    pub fn disable(self) -> &'a mut W {
1355        self.variant(SRAM_IF25_PPD_A::DISABLE)
1356    }
1357    #[doc = "Clears the PDRUNCFG3 Bit"]
1358    #[inline(always)]
1359    pub fn enable(self) -> &'a mut W {
1360        self.variant(SRAM_IF25_PPD_A::ENABLE)
1361    }
1362}
1363#[doc = "Field `SRAM_IF26_PPD` reader - Periphery power for RAM interface 26"]
1364pub type SRAM_IF26_PPD_R = crate::BitReader<SRAM_IF26_PPD_A>;
1365#[doc = "Periphery power for RAM interface 26\n\nValue on reset: 0"]
1366#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1367pub enum SRAM_IF26_PPD_A {
1368    #[doc = "0: No effect"]
1369    DISABLE = 0,
1370    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1371    ENABLE = 1,
1372}
1373impl From<SRAM_IF26_PPD_A> for bool {
1374    #[inline(always)]
1375    fn from(variant: SRAM_IF26_PPD_A) -> Self {
1376        variant as u8 != 0
1377    }
1378}
1379impl SRAM_IF26_PPD_R {
1380    #[doc = "Get enumerated values variant"]
1381    #[inline(always)]
1382    pub fn variant(&self) -> SRAM_IF26_PPD_A {
1383        match self.bits {
1384            false => SRAM_IF26_PPD_A::DISABLE,
1385            true => SRAM_IF26_PPD_A::ENABLE,
1386        }
1387    }
1388    #[doc = "Checks if the value of the field is `DISABLE`"]
1389    #[inline(always)]
1390    pub fn is_disable(&self) -> bool {
1391        *self == SRAM_IF26_PPD_A::DISABLE
1392    }
1393    #[doc = "Checks if the value of the field is `ENABLE`"]
1394    #[inline(always)]
1395    pub fn is_enable(&self) -> bool {
1396        *self == SRAM_IF26_PPD_A::ENABLE
1397    }
1398}
1399#[doc = "Field `SRAM_IF26_PPD` writer - Periphery power for RAM interface 26"]
1400pub type SRAM_IF26_PPD_W<'a, const O: u8> =
1401    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF26_PPD_A, O>;
1402impl<'a, const O: u8> SRAM_IF26_PPD_W<'a, O> {
1403    #[doc = "No effect"]
1404    #[inline(always)]
1405    pub fn disable(self) -> &'a mut W {
1406        self.variant(SRAM_IF26_PPD_A::DISABLE)
1407    }
1408    #[doc = "Clears the PDRUNCFG3 Bit"]
1409    #[inline(always)]
1410    pub fn enable(self) -> &'a mut W {
1411        self.variant(SRAM_IF26_PPD_A::ENABLE)
1412    }
1413}
1414#[doc = "Field `SRAM_IF27_PPD` reader - Periphery power for RAM interface 27"]
1415pub type SRAM_IF27_PPD_R = crate::BitReader<SRAM_IF27_PPD_A>;
1416#[doc = "Periphery power for RAM interface 27\n\nValue on reset: 0"]
1417#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1418pub enum SRAM_IF27_PPD_A {
1419    #[doc = "0: No effect"]
1420    DISABLE = 0,
1421    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1422    ENABLE = 1,
1423}
1424impl From<SRAM_IF27_PPD_A> for bool {
1425    #[inline(always)]
1426    fn from(variant: SRAM_IF27_PPD_A) -> Self {
1427        variant as u8 != 0
1428    }
1429}
1430impl SRAM_IF27_PPD_R {
1431    #[doc = "Get enumerated values variant"]
1432    #[inline(always)]
1433    pub fn variant(&self) -> SRAM_IF27_PPD_A {
1434        match self.bits {
1435            false => SRAM_IF27_PPD_A::DISABLE,
1436            true => SRAM_IF27_PPD_A::ENABLE,
1437        }
1438    }
1439    #[doc = "Checks if the value of the field is `DISABLE`"]
1440    #[inline(always)]
1441    pub fn is_disable(&self) -> bool {
1442        *self == SRAM_IF27_PPD_A::DISABLE
1443    }
1444    #[doc = "Checks if the value of the field is `ENABLE`"]
1445    #[inline(always)]
1446    pub fn is_enable(&self) -> bool {
1447        *self == SRAM_IF27_PPD_A::ENABLE
1448    }
1449}
1450#[doc = "Field `SRAM_IF27_PPD` writer - Periphery power for RAM interface 27"]
1451pub type SRAM_IF27_PPD_W<'a, const O: u8> =
1452    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF27_PPD_A, O>;
1453impl<'a, const O: u8> SRAM_IF27_PPD_W<'a, O> {
1454    #[doc = "No effect"]
1455    #[inline(always)]
1456    pub fn disable(self) -> &'a mut W {
1457        self.variant(SRAM_IF27_PPD_A::DISABLE)
1458    }
1459    #[doc = "Clears the PDRUNCFG3 Bit"]
1460    #[inline(always)]
1461    pub fn enable(self) -> &'a mut W {
1462        self.variant(SRAM_IF27_PPD_A::ENABLE)
1463    }
1464}
1465#[doc = "Field `SRAM_IF28_PPD` reader - Periphery power for RAM interface 28"]
1466pub type SRAM_IF28_PPD_R = crate::BitReader<SRAM_IF28_PPD_A>;
1467#[doc = "Periphery power for RAM interface 28\n\nValue on reset: 0"]
1468#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1469pub enum SRAM_IF28_PPD_A {
1470    #[doc = "0: No effect"]
1471    DISABLE = 0,
1472    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1473    ENABLE = 1,
1474}
1475impl From<SRAM_IF28_PPD_A> for bool {
1476    #[inline(always)]
1477    fn from(variant: SRAM_IF28_PPD_A) -> Self {
1478        variant as u8 != 0
1479    }
1480}
1481impl SRAM_IF28_PPD_R {
1482    #[doc = "Get enumerated values variant"]
1483    #[inline(always)]
1484    pub fn variant(&self) -> SRAM_IF28_PPD_A {
1485        match self.bits {
1486            false => SRAM_IF28_PPD_A::DISABLE,
1487            true => SRAM_IF28_PPD_A::ENABLE,
1488        }
1489    }
1490    #[doc = "Checks if the value of the field is `DISABLE`"]
1491    #[inline(always)]
1492    pub fn is_disable(&self) -> bool {
1493        *self == SRAM_IF28_PPD_A::DISABLE
1494    }
1495    #[doc = "Checks if the value of the field is `ENABLE`"]
1496    #[inline(always)]
1497    pub fn is_enable(&self) -> bool {
1498        *self == SRAM_IF28_PPD_A::ENABLE
1499    }
1500}
1501#[doc = "Field `SRAM_IF28_PPD` writer - Periphery power for RAM interface 28"]
1502pub type SRAM_IF28_PPD_W<'a, const O: u8> =
1503    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF28_PPD_A, O>;
1504impl<'a, const O: u8> SRAM_IF28_PPD_W<'a, O> {
1505    #[doc = "No effect"]
1506    #[inline(always)]
1507    pub fn disable(self) -> &'a mut W {
1508        self.variant(SRAM_IF28_PPD_A::DISABLE)
1509    }
1510    #[doc = "Clears the PDRUNCFG3 Bit"]
1511    #[inline(always)]
1512    pub fn enable(self) -> &'a mut W {
1513        self.variant(SRAM_IF28_PPD_A::ENABLE)
1514    }
1515}
1516#[doc = "Field `SRAM_IF29_PPD` reader - Periphery power for RAM interface 29"]
1517pub type SRAM_IF29_PPD_R = crate::BitReader<SRAM_IF29_PPD_A>;
1518#[doc = "Periphery power for RAM interface 29\n\nValue on reset: 0"]
1519#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1520pub enum SRAM_IF29_PPD_A {
1521    #[doc = "0: No effect"]
1522    DISABLE = 0,
1523    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1524    ENABLE = 1,
1525}
1526impl From<SRAM_IF29_PPD_A> for bool {
1527    #[inline(always)]
1528    fn from(variant: SRAM_IF29_PPD_A) -> Self {
1529        variant as u8 != 0
1530    }
1531}
1532impl SRAM_IF29_PPD_R {
1533    #[doc = "Get enumerated values variant"]
1534    #[inline(always)]
1535    pub fn variant(&self) -> SRAM_IF29_PPD_A {
1536        match self.bits {
1537            false => SRAM_IF29_PPD_A::DISABLE,
1538            true => SRAM_IF29_PPD_A::ENABLE,
1539        }
1540    }
1541    #[doc = "Checks if the value of the field is `DISABLE`"]
1542    #[inline(always)]
1543    pub fn is_disable(&self) -> bool {
1544        *self == SRAM_IF29_PPD_A::DISABLE
1545    }
1546    #[doc = "Checks if the value of the field is `ENABLE`"]
1547    #[inline(always)]
1548    pub fn is_enable(&self) -> bool {
1549        *self == SRAM_IF29_PPD_A::ENABLE
1550    }
1551}
1552#[doc = "Field `SRAM_IF29_PPD` writer - Periphery power for RAM interface 29"]
1553pub type SRAM_IF29_PPD_W<'a, const O: u8> =
1554    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF29_PPD_A, O>;
1555impl<'a, const O: u8> SRAM_IF29_PPD_W<'a, O> {
1556    #[doc = "No effect"]
1557    #[inline(always)]
1558    pub fn disable(self) -> &'a mut W {
1559        self.variant(SRAM_IF29_PPD_A::DISABLE)
1560    }
1561    #[doc = "Clears the PDRUNCFG3 Bit"]
1562    #[inline(always)]
1563    pub fn enable(self) -> &'a mut W {
1564        self.variant(SRAM_IF29_PPD_A::ENABLE)
1565    }
1566}
1567#[doc = "Field `SRAM_IF30_PPD` reader - Periphery power for RAM interface 30"]
1568pub type SRAM_IF30_PPD_R = crate::BitReader<SRAM_IF30_PPD_A>;
1569#[doc = "Periphery power for RAM interface 30\n\nValue on reset: 0"]
1570#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1571pub enum SRAM_IF30_PPD_A {
1572    #[doc = "0: No effect"]
1573    DISABLE = 0,
1574    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1575    ENABLE = 1,
1576}
1577impl From<SRAM_IF30_PPD_A> for bool {
1578    #[inline(always)]
1579    fn from(variant: SRAM_IF30_PPD_A) -> Self {
1580        variant as u8 != 0
1581    }
1582}
1583impl SRAM_IF30_PPD_R {
1584    #[doc = "Get enumerated values variant"]
1585    #[inline(always)]
1586    pub fn variant(&self) -> SRAM_IF30_PPD_A {
1587        match self.bits {
1588            false => SRAM_IF30_PPD_A::DISABLE,
1589            true => SRAM_IF30_PPD_A::ENABLE,
1590        }
1591    }
1592    #[doc = "Checks if the value of the field is `DISABLE`"]
1593    #[inline(always)]
1594    pub fn is_disable(&self) -> bool {
1595        *self == SRAM_IF30_PPD_A::DISABLE
1596    }
1597    #[doc = "Checks if the value of the field is `ENABLE`"]
1598    #[inline(always)]
1599    pub fn is_enable(&self) -> bool {
1600        *self == SRAM_IF30_PPD_A::ENABLE
1601    }
1602}
1603#[doc = "Field `SRAM_IF30_PPD` writer - Periphery power for RAM interface 30"]
1604pub type SRAM_IF30_PPD_W<'a, const O: u8> =
1605    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF30_PPD_A, O>;
1606impl<'a, const O: u8> SRAM_IF30_PPD_W<'a, O> {
1607    #[doc = "No effect"]
1608    #[inline(always)]
1609    pub fn disable(self) -> &'a mut W {
1610        self.variant(SRAM_IF30_PPD_A::DISABLE)
1611    }
1612    #[doc = "Clears the PDRUNCFG3 Bit"]
1613    #[inline(always)]
1614    pub fn enable(self) -> &'a mut W {
1615        self.variant(SRAM_IF30_PPD_A::ENABLE)
1616    }
1617}
1618#[doc = "Field `SRAM_IF31_PPD` reader - Periphery power for RAM interface 31"]
1619pub type SRAM_IF31_PPD_R = crate::BitReader<SRAM_IF31_PPD_A>;
1620#[doc = "Periphery power for RAM interface 31\n\nValue on reset: 0"]
1621#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1622pub enum SRAM_IF31_PPD_A {
1623    #[doc = "0: No effect"]
1624    DISABLE = 0,
1625    #[doc = "1: Clears the PDRUNCFG3 Bit"]
1626    ENABLE = 1,
1627}
1628impl From<SRAM_IF31_PPD_A> for bool {
1629    #[inline(always)]
1630    fn from(variant: SRAM_IF31_PPD_A) -> Self {
1631        variant as u8 != 0
1632    }
1633}
1634impl SRAM_IF31_PPD_R {
1635    #[doc = "Get enumerated values variant"]
1636    #[inline(always)]
1637    pub fn variant(&self) -> SRAM_IF31_PPD_A {
1638        match self.bits {
1639            false => SRAM_IF31_PPD_A::DISABLE,
1640            true => SRAM_IF31_PPD_A::ENABLE,
1641        }
1642    }
1643    #[doc = "Checks if the value of the field is `DISABLE`"]
1644    #[inline(always)]
1645    pub fn is_disable(&self) -> bool {
1646        *self == SRAM_IF31_PPD_A::DISABLE
1647    }
1648    #[doc = "Checks if the value of the field is `ENABLE`"]
1649    #[inline(always)]
1650    pub fn is_enable(&self) -> bool {
1651        *self == SRAM_IF31_PPD_A::ENABLE
1652    }
1653}
1654#[doc = "Field `SRAM_IF31_PPD` writer - Periphery power for RAM interface 31"]
1655pub type SRAM_IF31_PPD_W<'a, const O: u8> =
1656    crate::BitWriter1C<'a, u32, PDRUNCFG3_CLR_SPEC, SRAM_IF31_PPD_A, O>;
1657impl<'a, const O: u8> SRAM_IF31_PPD_W<'a, O> {
1658    #[doc = "No effect"]
1659    #[inline(always)]
1660    pub fn disable(self) -> &'a mut W {
1661        self.variant(SRAM_IF31_PPD_A::DISABLE)
1662    }
1663    #[doc = "Clears the PDRUNCFG3 Bit"]
1664    #[inline(always)]
1665    pub fn enable(self) -> &'a mut W {
1666        self.variant(SRAM_IF31_PPD_A::ENABLE)
1667    }
1668}
1669impl R {
1670    #[doc = "Bit 0 - Periphery power for RAM interface 0"]
1671    #[inline(always)]
1672    pub fn sram_if0_ppd(&self) -> SRAM_IF0_PPD_R {
1673        SRAM_IF0_PPD_R::new((self.bits & 1) != 0)
1674    }
1675    #[doc = "Bit 1 - Periphery power for RAM interface 1"]
1676    #[inline(always)]
1677    pub fn sram_if1_ppd(&self) -> SRAM_IF1_PPD_R {
1678        SRAM_IF1_PPD_R::new(((self.bits >> 1) & 1) != 0)
1679    }
1680    #[doc = "Bit 2 - Periphery power for RAM interface 2"]
1681    #[inline(always)]
1682    pub fn sram_if2_ppd(&self) -> SRAM_IF2_PPD_R {
1683        SRAM_IF2_PPD_R::new(((self.bits >> 2) & 1) != 0)
1684    }
1685    #[doc = "Bit 3 - Periphery power for RAM interface 3"]
1686    #[inline(always)]
1687    pub fn sram_if3_ppd(&self) -> SRAM_IF3_PPD_R {
1688        SRAM_IF3_PPD_R::new(((self.bits >> 3) & 1) != 0)
1689    }
1690    #[doc = "Bit 4 - Periphery power for RAM interface 4"]
1691    #[inline(always)]
1692    pub fn sram_if4_ppd(&self) -> SRAM_IF4_PPD_R {
1693        SRAM_IF4_PPD_R::new(((self.bits >> 4) & 1) != 0)
1694    }
1695    #[doc = "Bit 5 - Periphery power for RAM interface 5"]
1696    #[inline(always)]
1697    pub fn sram_if5_ppd(&self) -> SRAM_IF5_PPD_R {
1698        SRAM_IF5_PPD_R::new(((self.bits >> 5) & 1) != 0)
1699    }
1700    #[doc = "Bit 6 - Periphery power for RAM interface 6"]
1701    #[inline(always)]
1702    pub fn sram_if6_ppd(&self) -> SRAM_IF6_PPD_R {
1703        SRAM_IF6_PPD_R::new(((self.bits >> 6) & 1) != 0)
1704    }
1705    #[doc = "Bit 7 - Periphery power for RAM interface 7"]
1706    #[inline(always)]
1707    pub fn sram_if7_ppd(&self) -> SRAM_IF7_PPD_R {
1708        SRAM_IF7_PPD_R::new(((self.bits >> 7) & 1) != 0)
1709    }
1710    #[doc = "Bit 8 - Periphery power for RAM interface 8"]
1711    #[inline(always)]
1712    pub fn sram_if8_ppd(&self) -> SRAM_IF8_PPD_R {
1713        SRAM_IF8_PPD_R::new(((self.bits >> 8) & 1) != 0)
1714    }
1715    #[doc = "Bit 9 - Periphery power for RAM interface 9"]
1716    #[inline(always)]
1717    pub fn sram_if9_ppd(&self) -> SRAM_IF9_PPD_R {
1718        SRAM_IF9_PPD_R::new(((self.bits >> 9) & 1) != 0)
1719    }
1720    #[doc = "Bit 10 - Periphery power for RAM interface 10"]
1721    #[inline(always)]
1722    pub fn sram_if10_ppd(&self) -> SRAM_IF10_PPD_R {
1723        SRAM_IF10_PPD_R::new(((self.bits >> 10) & 1) != 0)
1724    }
1725    #[doc = "Bit 11 - Periphery power for RAM interface 11"]
1726    #[inline(always)]
1727    pub fn sram_if11_ppd(&self) -> SRAM_IF11_PPD_R {
1728        SRAM_IF11_PPD_R::new(((self.bits >> 11) & 1) != 0)
1729    }
1730    #[doc = "Bit 12 - Periphery power for RAM interface 12"]
1731    #[inline(always)]
1732    pub fn sram_if12_ppd(&self) -> SRAM_IF12_PPD_R {
1733        SRAM_IF12_PPD_R::new(((self.bits >> 12) & 1) != 0)
1734    }
1735    #[doc = "Bit 13 - Periphery power for RAM interface 13"]
1736    #[inline(always)]
1737    pub fn sram_if13_ppd(&self) -> SRAM_IF13_PPD_R {
1738        SRAM_IF13_PPD_R::new(((self.bits >> 13) & 1) != 0)
1739    }
1740    #[doc = "Bit 14 - Periphery power for RAM interface 14"]
1741    #[inline(always)]
1742    pub fn sram_if14_ppd(&self) -> SRAM_IF14_PPD_R {
1743        SRAM_IF14_PPD_R::new(((self.bits >> 14) & 1) != 0)
1744    }
1745    #[doc = "Bit 15 - Periphery power for RAM interface 15"]
1746    #[inline(always)]
1747    pub fn sram_if15_ppd(&self) -> SRAM_IF15_PPD_R {
1748        SRAM_IF15_PPD_R::new(((self.bits >> 15) & 1) != 0)
1749    }
1750    #[doc = "Bit 16 - Periphery power for RAM interface 16"]
1751    #[inline(always)]
1752    pub fn sram_if16_ppd(&self) -> SRAM_IF16_PPD_R {
1753        SRAM_IF16_PPD_R::new(((self.bits >> 16) & 1) != 0)
1754    }
1755    #[doc = "Bit 17 - Periphery power for RAM interface 17"]
1756    #[inline(always)]
1757    pub fn sram_if17_ppd(&self) -> SRAM_IF17_PPD_R {
1758        SRAM_IF17_PPD_R::new(((self.bits >> 17) & 1) != 0)
1759    }
1760    #[doc = "Bit 18 - Periphery power for RAM interface 18"]
1761    #[inline(always)]
1762    pub fn sram_if18_ppd(&self) -> SRAM_IF18_PPD_R {
1763        SRAM_IF18_PPD_R::new(((self.bits >> 18) & 1) != 0)
1764    }
1765    #[doc = "Bit 19 - Periphery power for RAM interface 19"]
1766    #[inline(always)]
1767    pub fn sram_if19_ppd(&self) -> SRAM_IF19_PPD_R {
1768        SRAM_IF19_PPD_R::new(((self.bits >> 19) & 1) != 0)
1769    }
1770    #[doc = "Bit 20 - Periphery power for RAM interface 20"]
1771    #[inline(always)]
1772    pub fn sram_if20_ppd(&self) -> SRAM_IF20_PPD_R {
1773        SRAM_IF20_PPD_R::new(((self.bits >> 20) & 1) != 0)
1774    }
1775    #[doc = "Bit 21 - Periphery power for RAM interface 21"]
1776    #[inline(always)]
1777    pub fn sram_if21_ppd(&self) -> SRAM_IF21_PPD_R {
1778        SRAM_IF21_PPD_R::new(((self.bits >> 21) & 1) != 0)
1779    }
1780    #[doc = "Bit 22 - Periphery power for RAM interface 22"]
1781    #[inline(always)]
1782    pub fn sram_if22_ppd(&self) -> SRAM_IF22_PPD_R {
1783        SRAM_IF22_PPD_R::new(((self.bits >> 22) & 1) != 0)
1784    }
1785    #[doc = "Bit 23 - Periphery power for RAM interface 23"]
1786    #[inline(always)]
1787    pub fn sram_if23_ppd(&self) -> SRAM_IF23_PPD_R {
1788        SRAM_IF23_PPD_R::new(((self.bits >> 23) & 1) != 0)
1789    }
1790    #[doc = "Bit 24 - Periphery power for RAM interface 24"]
1791    #[inline(always)]
1792    pub fn sram_if24_ppd(&self) -> SRAM_IF24_PPD_R {
1793        SRAM_IF24_PPD_R::new(((self.bits >> 24) & 1) != 0)
1794    }
1795    #[doc = "Bit 25 - Periphery power for RAM interface 25"]
1796    #[inline(always)]
1797    pub fn sram_if25_ppd(&self) -> SRAM_IF25_PPD_R {
1798        SRAM_IF25_PPD_R::new(((self.bits >> 25) & 1) != 0)
1799    }
1800    #[doc = "Bit 26 - Periphery power for RAM interface 26"]
1801    #[inline(always)]
1802    pub fn sram_if26_ppd(&self) -> SRAM_IF26_PPD_R {
1803        SRAM_IF26_PPD_R::new(((self.bits >> 26) & 1) != 0)
1804    }
1805    #[doc = "Bit 27 - Periphery power for RAM interface 27"]
1806    #[inline(always)]
1807    pub fn sram_if27_ppd(&self) -> SRAM_IF27_PPD_R {
1808        SRAM_IF27_PPD_R::new(((self.bits >> 27) & 1) != 0)
1809    }
1810    #[doc = "Bit 28 - Periphery power for RAM interface 28"]
1811    #[inline(always)]
1812    pub fn sram_if28_ppd(&self) -> SRAM_IF28_PPD_R {
1813        SRAM_IF28_PPD_R::new(((self.bits >> 28) & 1) != 0)
1814    }
1815    #[doc = "Bit 29 - Periphery power for RAM interface 29"]
1816    #[inline(always)]
1817    pub fn sram_if29_ppd(&self) -> SRAM_IF29_PPD_R {
1818        SRAM_IF29_PPD_R::new(((self.bits >> 29) & 1) != 0)
1819    }
1820    #[doc = "Bit 30 - Periphery power for RAM interface 30"]
1821    #[inline(always)]
1822    pub fn sram_if30_ppd(&self) -> SRAM_IF30_PPD_R {
1823        SRAM_IF30_PPD_R::new(((self.bits >> 30) & 1) != 0)
1824    }
1825    #[doc = "Bit 31 - Periphery power for RAM interface 31"]
1826    #[inline(always)]
1827    pub fn sram_if31_ppd(&self) -> SRAM_IF31_PPD_R {
1828        SRAM_IF31_PPD_R::new(((self.bits >> 31) & 1) != 0)
1829    }
1830}
1831impl W {
1832    #[doc = "Bit 0 - Periphery power for RAM interface 0"]
1833    #[inline(always)]
1834    #[must_use]
1835    pub fn sram_if0_ppd(&mut self) -> SRAM_IF0_PPD_W<0> {
1836        SRAM_IF0_PPD_W::new(self)
1837    }
1838    #[doc = "Bit 1 - Periphery power for RAM interface 1"]
1839    #[inline(always)]
1840    #[must_use]
1841    pub fn sram_if1_ppd(&mut self) -> SRAM_IF1_PPD_W<1> {
1842        SRAM_IF1_PPD_W::new(self)
1843    }
1844    #[doc = "Bit 2 - Periphery power for RAM interface 2"]
1845    #[inline(always)]
1846    #[must_use]
1847    pub fn sram_if2_ppd(&mut self) -> SRAM_IF2_PPD_W<2> {
1848        SRAM_IF2_PPD_W::new(self)
1849    }
1850    #[doc = "Bit 3 - Periphery power for RAM interface 3"]
1851    #[inline(always)]
1852    #[must_use]
1853    pub fn sram_if3_ppd(&mut self) -> SRAM_IF3_PPD_W<3> {
1854        SRAM_IF3_PPD_W::new(self)
1855    }
1856    #[doc = "Bit 4 - Periphery power for RAM interface 4"]
1857    #[inline(always)]
1858    #[must_use]
1859    pub fn sram_if4_ppd(&mut self) -> SRAM_IF4_PPD_W<4> {
1860        SRAM_IF4_PPD_W::new(self)
1861    }
1862    #[doc = "Bit 5 - Periphery power for RAM interface 5"]
1863    #[inline(always)]
1864    #[must_use]
1865    pub fn sram_if5_ppd(&mut self) -> SRAM_IF5_PPD_W<5> {
1866        SRAM_IF5_PPD_W::new(self)
1867    }
1868    #[doc = "Bit 6 - Periphery power for RAM interface 6"]
1869    #[inline(always)]
1870    #[must_use]
1871    pub fn sram_if6_ppd(&mut self) -> SRAM_IF6_PPD_W<6> {
1872        SRAM_IF6_PPD_W::new(self)
1873    }
1874    #[doc = "Bit 7 - Periphery power for RAM interface 7"]
1875    #[inline(always)]
1876    #[must_use]
1877    pub fn sram_if7_ppd(&mut self) -> SRAM_IF7_PPD_W<7> {
1878        SRAM_IF7_PPD_W::new(self)
1879    }
1880    #[doc = "Bit 8 - Periphery power for RAM interface 8"]
1881    #[inline(always)]
1882    #[must_use]
1883    pub fn sram_if8_ppd(&mut self) -> SRAM_IF8_PPD_W<8> {
1884        SRAM_IF8_PPD_W::new(self)
1885    }
1886    #[doc = "Bit 9 - Periphery power for RAM interface 9"]
1887    #[inline(always)]
1888    #[must_use]
1889    pub fn sram_if9_ppd(&mut self) -> SRAM_IF9_PPD_W<9> {
1890        SRAM_IF9_PPD_W::new(self)
1891    }
1892    #[doc = "Bit 10 - Periphery power for RAM interface 10"]
1893    #[inline(always)]
1894    #[must_use]
1895    pub fn sram_if10_ppd(&mut self) -> SRAM_IF10_PPD_W<10> {
1896        SRAM_IF10_PPD_W::new(self)
1897    }
1898    #[doc = "Bit 11 - Periphery power for RAM interface 11"]
1899    #[inline(always)]
1900    #[must_use]
1901    pub fn sram_if11_ppd(&mut self) -> SRAM_IF11_PPD_W<11> {
1902        SRAM_IF11_PPD_W::new(self)
1903    }
1904    #[doc = "Bit 12 - Periphery power for RAM interface 12"]
1905    #[inline(always)]
1906    #[must_use]
1907    pub fn sram_if12_ppd(&mut self) -> SRAM_IF12_PPD_W<12> {
1908        SRAM_IF12_PPD_W::new(self)
1909    }
1910    #[doc = "Bit 13 - Periphery power for RAM interface 13"]
1911    #[inline(always)]
1912    #[must_use]
1913    pub fn sram_if13_ppd(&mut self) -> SRAM_IF13_PPD_W<13> {
1914        SRAM_IF13_PPD_W::new(self)
1915    }
1916    #[doc = "Bit 14 - Periphery power for RAM interface 14"]
1917    #[inline(always)]
1918    #[must_use]
1919    pub fn sram_if14_ppd(&mut self) -> SRAM_IF14_PPD_W<14> {
1920        SRAM_IF14_PPD_W::new(self)
1921    }
1922    #[doc = "Bit 15 - Periphery power for RAM interface 15"]
1923    #[inline(always)]
1924    #[must_use]
1925    pub fn sram_if15_ppd(&mut self) -> SRAM_IF15_PPD_W<15> {
1926        SRAM_IF15_PPD_W::new(self)
1927    }
1928    #[doc = "Bit 16 - Periphery power for RAM interface 16"]
1929    #[inline(always)]
1930    #[must_use]
1931    pub fn sram_if16_ppd(&mut self) -> SRAM_IF16_PPD_W<16> {
1932        SRAM_IF16_PPD_W::new(self)
1933    }
1934    #[doc = "Bit 17 - Periphery power for RAM interface 17"]
1935    #[inline(always)]
1936    #[must_use]
1937    pub fn sram_if17_ppd(&mut self) -> SRAM_IF17_PPD_W<17> {
1938        SRAM_IF17_PPD_W::new(self)
1939    }
1940    #[doc = "Bit 18 - Periphery power for RAM interface 18"]
1941    #[inline(always)]
1942    #[must_use]
1943    pub fn sram_if18_ppd(&mut self) -> SRAM_IF18_PPD_W<18> {
1944        SRAM_IF18_PPD_W::new(self)
1945    }
1946    #[doc = "Bit 19 - Periphery power for RAM interface 19"]
1947    #[inline(always)]
1948    #[must_use]
1949    pub fn sram_if19_ppd(&mut self) -> SRAM_IF19_PPD_W<19> {
1950        SRAM_IF19_PPD_W::new(self)
1951    }
1952    #[doc = "Bit 20 - Periphery power for RAM interface 20"]
1953    #[inline(always)]
1954    #[must_use]
1955    pub fn sram_if20_ppd(&mut self) -> SRAM_IF20_PPD_W<20> {
1956        SRAM_IF20_PPD_W::new(self)
1957    }
1958    #[doc = "Bit 21 - Periphery power for RAM interface 21"]
1959    #[inline(always)]
1960    #[must_use]
1961    pub fn sram_if21_ppd(&mut self) -> SRAM_IF21_PPD_W<21> {
1962        SRAM_IF21_PPD_W::new(self)
1963    }
1964    #[doc = "Bit 22 - Periphery power for RAM interface 22"]
1965    #[inline(always)]
1966    #[must_use]
1967    pub fn sram_if22_ppd(&mut self) -> SRAM_IF22_PPD_W<22> {
1968        SRAM_IF22_PPD_W::new(self)
1969    }
1970    #[doc = "Bit 23 - Periphery power for RAM interface 23"]
1971    #[inline(always)]
1972    #[must_use]
1973    pub fn sram_if23_ppd(&mut self) -> SRAM_IF23_PPD_W<23> {
1974        SRAM_IF23_PPD_W::new(self)
1975    }
1976    #[doc = "Bit 24 - Periphery power for RAM interface 24"]
1977    #[inline(always)]
1978    #[must_use]
1979    pub fn sram_if24_ppd(&mut self) -> SRAM_IF24_PPD_W<24> {
1980        SRAM_IF24_PPD_W::new(self)
1981    }
1982    #[doc = "Bit 25 - Periphery power for RAM interface 25"]
1983    #[inline(always)]
1984    #[must_use]
1985    pub fn sram_if25_ppd(&mut self) -> SRAM_IF25_PPD_W<25> {
1986        SRAM_IF25_PPD_W::new(self)
1987    }
1988    #[doc = "Bit 26 - Periphery power for RAM interface 26"]
1989    #[inline(always)]
1990    #[must_use]
1991    pub fn sram_if26_ppd(&mut self) -> SRAM_IF26_PPD_W<26> {
1992        SRAM_IF26_PPD_W::new(self)
1993    }
1994    #[doc = "Bit 27 - Periphery power for RAM interface 27"]
1995    #[inline(always)]
1996    #[must_use]
1997    pub fn sram_if27_ppd(&mut self) -> SRAM_IF27_PPD_W<27> {
1998        SRAM_IF27_PPD_W::new(self)
1999    }
2000    #[doc = "Bit 28 - Periphery power for RAM interface 28"]
2001    #[inline(always)]
2002    #[must_use]
2003    pub fn sram_if28_ppd(&mut self) -> SRAM_IF28_PPD_W<28> {
2004        SRAM_IF28_PPD_W::new(self)
2005    }
2006    #[doc = "Bit 29 - Periphery power for RAM interface 29"]
2007    #[inline(always)]
2008    #[must_use]
2009    pub fn sram_if29_ppd(&mut self) -> SRAM_IF29_PPD_W<29> {
2010        SRAM_IF29_PPD_W::new(self)
2011    }
2012    #[doc = "Bit 30 - Periphery power for RAM interface 30"]
2013    #[inline(always)]
2014    #[must_use]
2015    pub fn sram_if30_ppd(&mut self) -> SRAM_IF30_PPD_W<30> {
2016        SRAM_IF30_PPD_W::new(self)
2017    }
2018    #[doc = "Bit 31 - Periphery power for RAM interface 31"]
2019    #[inline(always)]
2020    #[must_use]
2021    pub fn sram_if31_ppd(&mut self) -> SRAM_IF31_PPD_W<31> {
2022        SRAM_IF31_PPD_W::new(self)
2023    }
2024    #[doc = "Writes raw bits to the register."]
2025    #[inline(always)]
2026    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
2027        self.0.bits(bits);
2028        self
2029    }
2030}
2031#[doc = "Run configuration 3 clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pdruncfg3_clr](index.html) module"]
2032pub struct PDRUNCFG3_CLR_SPEC;
2033impl crate::RegisterSpec for PDRUNCFG3_CLR_SPEC {
2034    type Ux = u32;
2035}
2036#[doc = "`read()` method returns [pdruncfg3_clr::R](R) reader structure"]
2037impl crate::Readable for PDRUNCFG3_CLR_SPEC {
2038    type Reader = R;
2039}
2040#[doc = "`write(|w| ..)` method takes [pdruncfg3_clr::W](W) writer structure"]
2041impl crate::Writable for PDRUNCFG3_CLR_SPEC {
2042    type Writer = W;
2043    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
2044    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0xffff_ffff;
2045}
2046#[doc = "`reset()` method sets PDRUNCFG3_CLR to value 0"]
2047impl crate::Resettable for PDRUNCFG3_CLR_SPEC {
2048    const RESET_VALUE: Self::Ux = 0;
2049}
mimxrt595s/sysctl0/pdruncfg3_clr.rs

mimxrt595s/sysctl0/
pdruncfg3_clr.rs
