mimxrt595s/flexspi1/
ahbrxbuf3cr0.rs

1#[doc = "Register `AHBRXBUF3CR0` reader"]
2pub struct R(crate::R<AHBRXBUF3CR0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<AHBRXBUF3CR0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<AHBRXBUF3CR0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<AHBRXBUF3CR0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `AHBRXBUF3CR0` writer"]
17pub struct W(crate::W<AHBRXBUF3CR0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<AHBRXBUF3CR0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<AHBRXBUF3CR0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<AHBRXBUF3CR0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `BUFSZ` reader - AHB RX Buffer Size in 64 bits."]
38pub type BUFSZ_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `BUFSZ` writer - AHB RX Buffer Size in 64 bits."]
40pub type BUFSZ_W<'a, const O: u8> = crate::FieldWriter<'a, u32, AHBRXBUF3CR0_SPEC, u16, u16, 9, O>;
41#[doc = "Field `MSTRID` reader - This AHB RX Buffer is assigned according to AHB Master with ID (MSTR_ID)."]
42pub type MSTRID_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `MSTRID` writer - This AHB RX Buffer is assigned according to AHB Master with ID (MSTR_ID)."]
44pub type MSTRID_W<'a, const O: u8> = crate::FieldWriter<'a, u32, AHBRXBUF3CR0_SPEC, u8, u8, 4, O>;
45#[doc = "Field `PRIORITY` reader - This priority for AHB Master Read which this AHB RX Buffer is assigned. 7 is the highest priority, 0 the lowest."]
46pub type PRIORITY_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `PRIORITY` writer - This priority for AHB Master Read which this AHB RX Buffer is assigned. 7 is the highest priority, 0 the lowest."]
48pub type PRIORITY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, AHBRXBUF3CR0_SPEC, u8, u8, 3, O>;
49#[doc = "Field `PREFETCHEN` reader - AHB Read Prefetch Enable for current AHB RX Buffer corresponding Master."]
50pub type PREFETCHEN_R = crate::BitReader<PREFETCHEN_A>;
51#[doc = "AHB Read Prefetch Enable for current AHB RX Buffer corresponding Master.\n\nValue on reset: 1"]
52#[derive(Clone, Copy, Debug, PartialEq, Eq)]
53pub enum PREFETCHEN_A {
54    #[doc = "0: No prefetch"]
55    VALUE0 = 0,
56    #[doc = "1: Prefetch enable"]
57    VALUE1 = 1,
58}
59impl From<PREFETCHEN_A> for bool {
60    #[inline(always)]
61    fn from(variant: PREFETCHEN_A) -> Self {
62        variant as u8 != 0
63    }
64}
65impl PREFETCHEN_R {
66    #[doc = "Get enumerated values variant"]
67    #[inline(always)]
68    pub fn variant(&self) -> PREFETCHEN_A {
69        match self.bits {
70            false => PREFETCHEN_A::VALUE0,
71            true => PREFETCHEN_A::VALUE1,
72        }
73    }
74    #[doc = "Checks if the value of the field is `VALUE0`"]
75    #[inline(always)]
76    pub fn is_value0(&self) -> bool {
77        *self == PREFETCHEN_A::VALUE0
78    }
79    #[doc = "Checks if the value of the field is `VALUE1`"]
80    #[inline(always)]
81    pub fn is_value1(&self) -> bool {
82        *self == PREFETCHEN_A::VALUE1
83    }
84}
85#[doc = "Field `PREFETCHEN` writer - AHB Read Prefetch Enable for current AHB RX Buffer corresponding Master."]
86pub type PREFETCHEN_W<'a, const O: u8> =
87    crate::BitWriter<'a, u32, AHBRXBUF3CR0_SPEC, PREFETCHEN_A, O>;
88impl<'a, const O: u8> PREFETCHEN_W<'a, O> {
89    #[doc = "No prefetch"]
90    #[inline(always)]
91    pub fn value0(self) -> &'a mut W {
92        self.variant(PREFETCHEN_A::VALUE0)
93    }
94    #[doc = "Prefetch enable"]
95    #[inline(always)]
96    pub fn value1(self) -> &'a mut W {
97        self.variant(PREFETCHEN_A::VALUE1)
98    }
99}
100impl R {
101    #[doc = "Bits 0:8 - AHB RX Buffer Size in 64 bits."]
102    #[inline(always)]
103    pub fn bufsz(&self) -> BUFSZ_R {
104        BUFSZ_R::new((self.bits & 0x01ff) as u16)
105    }
106    #[doc = "Bits 16:19 - This AHB RX Buffer is assigned according to AHB Master with ID (MSTR_ID)."]
107    #[inline(always)]
108    pub fn mstrid(&self) -> MSTRID_R {
109        MSTRID_R::new(((self.bits >> 16) & 0x0f) as u8)
110    }
111    #[doc = "Bits 24:26 - This priority for AHB Master Read which this AHB RX Buffer is assigned. 7 is the highest priority, 0 the lowest."]
112    #[inline(always)]
113    pub fn priority(&self) -> PRIORITY_R {
114        PRIORITY_R::new(((self.bits >> 24) & 7) as u8)
115    }
116    #[doc = "Bit 31 - AHB Read Prefetch Enable for current AHB RX Buffer corresponding Master."]
117    #[inline(always)]
118    pub fn prefetchen(&self) -> PREFETCHEN_R {
119        PREFETCHEN_R::new(((self.bits >> 31) & 1) != 0)
120    }
121}
122impl W {
123    #[doc = "Bits 0:8 - AHB RX Buffer Size in 64 bits."]
124    #[inline(always)]
125    #[must_use]
126    pub fn bufsz(&mut self) -> BUFSZ_W<0> {
127        BUFSZ_W::new(self)
128    }
129    #[doc = "Bits 16:19 - This AHB RX Buffer is assigned according to AHB Master with ID (MSTR_ID)."]
130    #[inline(always)]
131    #[must_use]
132    pub fn mstrid(&mut self) -> MSTRID_W<16> {
133        MSTRID_W::new(self)
134    }
135    #[doc = "Bits 24:26 - This priority for AHB Master Read which this AHB RX Buffer is assigned. 7 is the highest priority, 0 the lowest."]
136    #[inline(always)]
137    #[must_use]
138    pub fn priority(&mut self) -> PRIORITY_W<24> {
139        PRIORITY_W::new(self)
140    }
141    #[doc = "Bit 31 - AHB Read Prefetch Enable for current AHB RX Buffer corresponding Master."]
142    #[inline(always)]
143    #[must_use]
144    pub fn prefetchen(&mut self) -> PREFETCHEN_W<31> {
145        PREFETCHEN_W::new(self)
146    }
147    #[doc = "Writes raw bits to the register."]
148    #[inline(always)]
149    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
150        self.0.bits(bits);
151        self
152    }
153}
154#[doc = "AHB RX Buffer 3 Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahbrxbuf3cr0](index.html) module"]
155pub struct AHBRXBUF3CR0_SPEC;
156impl crate::RegisterSpec for AHBRXBUF3CR0_SPEC {
157    type Ux = u32;
158}
159#[doc = "`read()` method returns [ahbrxbuf3cr0::R](R) reader structure"]
160impl crate::Readable for AHBRXBUF3CR0_SPEC {
161    type Reader = R;
162}
163#[doc = "`write(|w| ..)` method takes [ahbrxbuf3cr0::W](W) writer structure"]
164impl crate::Writable for AHBRXBUF3CR0_SPEC {
165    type Writer = W;
166    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
167    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
168}
169#[doc = "`reset()` method sets AHBRXBUF3CR0 to value 0x8003_0020"]
170impl crate::Resettable for AHBRXBUF3CR0_SPEC {
171    const RESET_VALUE: Self::Ux = 0x8003_0020;
172}
mimxrt595s/flexspi1/ahbrxbuf3cr0.rs

mimxrt595s/flexspi1/
ahbrxbuf3cr0.rs
