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Module intenset

microbit::hal::pac::timer0

Module intenset

Expand description

Interrupt enable set register.

Structs§

INTENSET_SPEC: Interrupt enable set register.
R: Register INTENSET reader
W: Register INTENSET writer

Enums§

COMPARE0_A: Enable interrupt on COMPARE[0]
COMPARE0_AW: Enable interrupt on COMPARE[0]
COMPARE1_A: Enable interrupt on COMPARE[1]
COMPARE1_AW: Enable interrupt on COMPARE[1]
COMPARE2_A: Enable interrupt on COMPARE[2]
COMPARE2_AW: Enable interrupt on COMPARE[2]
COMPARE3_A: Enable interrupt on COMPARE[3]
COMPARE3_AW: Enable interrupt on COMPARE[3]

Type Aliases§

COMPARE0_R: Field COMPARE0 reader - Enable interrupt on COMPARE[0]
COMPARE0_W: Field COMPARE0 writer - Enable interrupt on COMPARE[0]
COMPARE1_R: Field COMPARE1 reader - Enable interrupt on COMPARE[1]
COMPARE1_W: Field COMPARE1 writer - Enable interrupt on COMPARE[1]
COMPARE2_R: Field COMPARE2 reader - Enable interrupt on COMPARE[2]
COMPARE2_W: Field COMPARE2 writer - Enable interrupt on COMPARE[2]
COMPARE3_R: Field COMPARE3 reader - Enable interrupt on COMPARE[3]
COMPARE3_W: Field COMPARE3 writer - Enable interrupt on COMPARE[3]