Function pp2_overlap 

pub fn pp2_overlap() -> bool

MEMRA_PP_OVERLAP: alternate the double-buffered boundary slots per step (the pipelining seed). Scheduling structure only, never math. Read per step so gates can A/B in-process.

Unset follows the dual-PP mode (owner flip 2026-08-11): Auto resolves ON — the naked serve path is the box1 re-gate’s dual arm (MEMRA_DUAL_PP=1 MEMRA_PP_OVERLAP=1, 929/929 golden, 0/9123 slot collisions). Off resolves OFF so MEMRA_DUAL_PP=0 alone restores the exact pre-flip serial naked path. Forced resolves OFF so the binding single-slot refusal of the explicit pre-flip request stays reachable — the decode-batch-gate negative cell pins and asserts precisely that combination.