Expand description
Tensor-parallel correctness runtime.
This module is deliberately narrower than the serving runtime. It executes real rank-local E4M3 projections on distinct CUDA devices. Deterministic host-staged collectives remain the default exactness reference; an opt-in native-P2P path must reproduce the same canonical checkpoint-block program before it can advance. Neither path is product-throughput evidence.
Structs§
- Bf16
Matrix - Column
Parallel Result - E4m3
Block Matrix - E4m3
Expert Bank - Nvfp4
Block Matrix - One expert’s modelopt NVFP4 projection: packed codes + per-16 UE4M3 scale bytes + macro.
- Nvfp4
Device Routes Workspace - Nvfp4
Expert Bank - Stacked modelopt NVFP4 expert bank (host view over the checkpoint bytes).
- Nvfp4
T2Workspace - Persistent buffers for the two-column (spec verify) NVFP4 device-routed program: every slab is the t=1 workspace shape doubled along the pair axis, plus per-column accumulators. One per expert bank, reused every (round, layer) call.
- Prepared
Peer Weighted Route Combine - Persistent root-side weighted combine for peer-owned canonical route rows.
- Prepared
Step Grouped Expert Parallel Gate - Prepared official Step expert-owner grouped-FP8 projection gate.
- Prepared
Step Grouped Fp8Gate - Prepared official Step grouped-FP8 projection gate.
- Resident
Bf16 Column Parallel - Resident
Bf16 RowParallel - Resident
Column Parallel - Resident
Expert Parallel - Persistent expert-parallel reference.
- Resident
Nvfp4 Column Bank Rank - One rank’s resident NVFP4 expert bank shard: one repacked block buffer PER expert (per-expert device allocations keep this increment off any new strided-kernel API; the strided twin is a later perf rung, mirroring the FP8 bank’s history).
- Resident
Nvfp4 Column Parallel - Resident
Nvfp4 Expert Parallel - Resident
Nvfp4 Rank - One rank’s resident repacked NVFP4 shard: memra block_nvfp4 rows on device.
- Resident
Nvfp4 RowBank Rank - Resident
Nvfp4 RowParallel - Resident
Nvfp4 Tensor Parallel - Resident
Replicated Bf16 SwiGlu - Full BF16 SwiGLU weights replicated independently on every runtime rank.
- Resident
Replicated Device Rows - One token-major F32 batch replicated across a native-P2P rank group.
- Resident
RowParallel - Resident
Sigmoid TopK Router - Root-owned BF16 sigmoid router with persistent F32 weight, bias, and active mask.
- Resident
Step Bf16 RowParallel - Resident
Tensor Parallel - Persistent tensor-parallel expert bank.
- Resident
TpExpert - Persistent TP2/TP4/TP8 routed-expert reference.
- Resident
TpKv Cache - Resident
TpKv Cache Rank - Resident
TpNvfp4 Expert - RowParallel
Result - Sigmoid
TopK Host Output - Step
EpLayer Spec - Step
Grouped Fp8Projection Output - Projection-level output from the opt-in official Step grouped-FP8 gate.
- Step
TpDecode V2Ws - Token
Graph - Token
Graph Builder - TpE4m3
Host Bounce - Multi-context TP correctness runtime. Each rank owns an independent
Engineand CUDA context. - TpKv
Append Plan - TpKv
Transaction
Enums§
- KvRing
Append - Step
TpGate Shards - Persistent workspace of the v2 rank-local decode-attention driver.
Constants§
- NVFP4_
CANONICAL_ ROW_ SHARDS - Canonical row-shard count for the NVFP4 down projection. The down reduction ALWAYS executes as exactly this many input-column windows summed in shard order, at every world size: a single full-width dot and a two-half-dots-plus-add differ in f32 parenthesization, so pinning the shard grid (not the world size) is what makes the TP1-oracle-vs-TP2 bit gate meaningful. This is the NVFP4 twin of the FP8 bank’s canonical checkpoint-block reduction.
Functions§
- graph_
section - The section annotation: eager mode runs the closure verbatim; build mode wraps it in a
stream capture on
engine’s stream and records the child. Sections sharing aparallel_groupid fork from the same predecessor set and merge together. The closure must be capture-safe (raw copies at cross-context seams, no host syncs, no events). - graph_
section_ absorbing - Serial section that ALSO joins every pending detached section (the SH1 consumer shape).
- graph_
section_ detached graph_sectionwith the DETACHED shape: forks from the current frontier (or the open group base) and is joined only by the next serial section — never gates a group merge.- graph_
section_ opts - moe_
residual_ host - Canonical MoE output order: routed plus shared, then add the layer residual.
- parse_
step_ ep_ layer_ specs - parse_
step_ tp_ layer_ specs - step_
ep_ device_ arithmetic_ enabled - step_
ep_ layer_ specs - step_
expert_ activation_ host - step_
nvfp4_ dev_ routes_ enabled - Opt-in door for the device-resident NVFP4 TP routed-expert decode program. Default OFF; the host-canonical program remains the oracle until the device path carries its own gates.
- step_
tp_ bulk_ p2p_ enabled - step_
tp_ dcw_ enabled - Device-counter attention path (graph increment A run EAGERLY): append at len_d - base_d, inc_i32, fa over the counter-derived window — with bucket = the effective t_kv this is bit-identical to the host-row + kvmod path (the one-partition law), and it is the exact child content the capture wraps. Rebase tokens and sub-vec-floor contexts fall back.
- step_
tp_ decode_ v2_ enabled - The v2 rank-local Step decode-attention driver: persistent workspaces, evented cross-stream ordering, and a root-device O reduction — same kernels, values, and canonical reduction order as the v1 driver (it requires the F32 mirror so no per-call weight expansion exists on either side of the comparison).
- step_
tp_ dev_ router_ enabled - Device-side sigmoid top-k routing for the TP device-IO expert program: the per-layer host logits readback (the last per-layer host sync) disappears. Selection tie-breaking may differ from the host router — NUMERIC-CLASS door, run-gen argmax gate + boot battery.
- step_
tp_ f32_ mirror_ enabled - step_
tp_ graph_ enabled - CUDA-graph door for the shape-stable TP segments (first increment: the device-routed expert program — per-layer multi-device parents built from per-rank children, launched on the model engine’s stream; zero per-token node updates). Mechanism proven by tp_graph_probe. VALUE-IDENTICAL: the graphs replay exactly the eager kernel/copy sequence.
- step_
tp_ layer_ specs - step_
tp_ native_ p2p_ enabled - step_
tp_ qkv_ fused_ enabled - Fused single-launch QKV projection inside the v2 decode driver — a NUMERIC-CLASS door (per-row deterministic tree reduce instead of the chunked cuBLASLt program), default OFF, gated by the run-gen argmax gate + boot battery like MEMRA_STEP_NVFP4_DEV_ROUTES.
- token_
graph_ build_ begin - Arm the thread-local builder (build mode) — the next
graph_sectioncalls capture. - token_
graph_ build_ finish - Take the finished parent (ends build mode).
- token_
graph_ building - True while the thread-local builder is armed.