Crate mem_barrier 

Cross-architecture, no-std memory barriers.

When compiling with optimizations, the compiler may try to improve performance by reordering independent memory accesses and instructions. Modern CPUs use similar techniques for improving performance, such as out-of-order execution. Memory barriers affect both the compiler and the CPU by restricting reordering of certain memory operations across these barriers respective to other CPUs or devices, allowing proper communication with them.

To insert a memory barrier, use the mem_barrier function.

The memory barriers provided by this crate are similar to the Linux kernel memory barriers. For more details on that API, also see the Linux Kernel Memory Consistency Model (LKMM).

Examples

use mem_barrier::{BarrierKind, BarrierType, mem_barrier};

mem_barrier(BarrierKind::Mmio, BarrierType::General);

Supported architectures

Architecture	target_arch	Supported
AArch64	aarch64	✅
RISC-V RV32	riscv32	✅
RISC-V RV64	riscv64	✅
x86	x86	✅
x86-64	x86_64	✅

Cargo features

This crate has the following Cargo features:

• nightly—Disabled by default, this feature enables memory barrier implementations based on unstable, nightly-only Rust features.
• stdarch—Enabled by default, this feature enables memory barrier implementations based on core::arch intrinsics. If available, these intrinsics replace the fallback implementations based on inline assembly.

Related crates

Several crates provide alternative approaches to memory barriers:

• membarrier provides OS-based process-wide memory barriers.
• mbarrier closely resembles Linux kernel memory barriers by providing mb, rmb, and wmb. It also provides smp_mb, smp_rmb, and smp_wmb, which either are the same as the non-SMP functions or fall back to compiler fences, depending on a crate feature. It does not, however, distinguish between MMIO-suitable, SMP-suitable, and DMA-suitable memory barriers.

Enums

BarrierKind

The kind of a memory barrier.

BarrierType

The type of a memory barrier.

Functions

mem_barrier

A memory barrier.