Module mcxn947_pac::tsi0
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TSI
Modules§
- TSI Baseline
- TSI Channel Merge
- TSI CONFIG (TSI_CONFIG) for Self-Capacitor
- TSI CONFIG (TSI_CONFIG) for Mutual-Capacitor
- TSI Data and Status
- TSI General Control and Status
- TSI Miscellaneous
- TSI Mutual-Capacitance
- TSI Shield
- TSI SINC Filter
- TSI SSC 0
- TSI SSC 1
- TSI SSC 2
- TSI AUTO TRIG
- TSI Threshold
Structs§
- Register block
Type Aliases§
- BASELINE (rw) register accessor: TSI Baseline
- CHMERGE (rw) register accessor: TSI Channel Merge
- CONFIG_CONFIG (rw) register accessor: TSI CONFIG (TSI_CONFIG) for Self-Capacitor
- CONFIG_CONFIG_MUTUAL (rw) register accessor: TSI CONFIG (TSI_CONFIG) for Mutual-Capacitor
- DATA (rw) register accessor: TSI Data and Status
- GENCS (rw) register accessor: TSI General Control and Status
- MISC (rw) register accessor: TSI Miscellaneous
- MUL (rw) register accessor: TSI Mutual-Capacitance
- SHIELD (rw) register accessor: TSI Shield
- SINC (rw) register accessor: TSI SINC Filter
- SSC0 (rw) register accessor: TSI SSC 0
- SSC1 (rw) register accessor: TSI SSC 1
- SSC2 (rw) register accessor: TSI SSC 2
- TRIG (rw) register accessor: TSI AUTO TRIG
- TSHD (rw) register accessor: TSI Threshold