Struct mcxn947_pac::LPI2C0

pub struct LPI2C0 { /* private fields */ }

LPI2C

Implementations

impl LPI2C0

pub const PTR: *const RegisterBlock = {0x40092800 as *const lpi2c0::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn verid(&self) -> &VERID

0x00 - Version ID

pub fn param(&self) -> &PARAM

0x04 - Parameter

pub fn mcr(&self) -> &MCR

0x10 - Controller Control

pub fn msr(&self) -> &MSR

0x14 - Controller Status

pub fn mier(&self) -> &MIER

0x18 - Controller Interrupt Enable

pub fn mder(&self) -> &MDER

0x1c - Controller DMA Enable

pub fn mcfgr0(&self) -> &MCFGR0

0x20 - Controller Configuration 0

pub fn mcfgr1(&self) -> &MCFGR1

0x24 - Controller Configuration 1

pub fn mcfgr2(&self) -> &MCFGR2

0x28 - Controller Configuration 2

pub fn mcfgr3(&self) -> &MCFGR3

0x2c - Controller Configuration 3

pub fn mdmr(&self) -> &MDMR

0x40 - Controller Data Match

pub fn mccr0(&self) -> &MCCR0

0x48 - Controller Clock Configuration 0

pub fn mccr1(&self) -> &MCCR1

0x50 - Controller Clock Configuration 1

pub fn mfcr(&self) -> &MFCR

0x58 - Controller FIFO Control

pub fn mfsr(&self) -> &MFSR

0x5c - Controller FIFO Status

pub fn mtdr(&self) -> &MTDR

0x60 - Controller Transmit Data

pub fn mrdr(&self) -> &MRDR

0x70 - Controller Receive Data

pub fn mrdror(&self) -> &MRDROR

0x78 - Controller Receive Data Read Only

pub fn scr(&self) -> &SCR

0x110 - Target Control

pub fn ssr(&self) -> &SSR

0x114 - Target Status

pub fn sier(&self) -> &SIER

0x118 - Target interrupt enable

pub fn sder(&self) -> &SDER

0x11c - Target DMA Enable

pub fn scfgr0(&self) -> &SCFGR0

0x120 - Target Configuration 0

pub fn scfgr1(&self) -> &SCFGR1

0x124 - Target Configuration 1

pub fn scfgr2(&self) -> &SCFGR2

0x128 - Target Configuration 2

pub fn samr(&self) -> &SAMR

0x140 - Target Address Match

pub fn sasr(&self) -> &SASR

0x150 - Target Address Status

pub fn star(&self) -> &STAR

0x154 - Target Transmit ACK

pub fn stdr(&self) -> &STDR

0x160 - Target Transmit Data

pub fn srdr(&self) -> &SRDR

0x170 - Target Receive Data

pub fn srdror(&self) -> &SRDROR

0x178 - Target Receive Data Read Only

pub fn mtcbr(&self, n: usize) -> &MTCBR

0x200..0x400 - Controller Transmit Command Burst

pub fn mtcbr_iter(&self) -> impl Iterator<Item = &MTCBR>

Iterator for array of: 0x200..0x400 - Controller Transmit Command Burst

pub fn mtdbr(&self, n: usize) -> &MTDBR

0x400..0x7f4 - Transmit Data Burst

pub fn mtdbr_iter(&self) -> impl Iterator<Item = &MTDBR>

Iterator for array of: 0x400..0x7f4 - Transmit Data Burst

Trait Implementations

impl Debug for LPI2C0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for LPI2C0

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for LPI2C0