Struct mcxn947_pac::AHBSC

pub struct AHBSC { /* private fields */ }

AHBSC

Implementations

impl AHBSC

pub const PTR: *const RegisterBlock = {0x40120000 as *const ahbsc::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn flash00_mem_rule(&self, n: usize) -> &FLASH00_MEM_RULE

0x10..0x20 - Flash Memory Rule

pub fn flash00_mem_rule_iter(&self) -> impl Iterator<Item = &FLASH00_MEM_RULE>

Iterator for array of: 0x10..0x20 - Flash Memory Rule

pub fn flash01_mem_rule(&self, n: usize) -> &FLASH01_MEM_RULE

0x20..0x30 - Flash Memory Rule

pub fn flash01_mem_rule_iter(&self) -> impl Iterator<Item = &FLASH01_MEM_RULE>

Iterator for array of: 0x20..0x30 - Flash Memory Rule

pub fn flash02_mem_rule(&self) -> &FLASH02_MEM_RULE

0x30 - Flash Memory Rule

pub fn flash03_mem_rule(&self) -> &FLASH03_MEM_RULE

0x40 - Flash Memory Rule

pub fn rom_mem_rule(&self, n: usize) -> &ROM_MEM_RULE

0x60..0x70 - ROM Memory Rule

pub fn rom_mem_rule_iter(&self) -> impl Iterator<Item = &ROM_MEM_RULE>

Iterator for array of: 0x60..0x70 - ROM Memory Rule

pub fn ramx_mem_rule(&self, n: usize) -> &RAMX_MEM_RULE

0x80..0x8c - RAMX Memory Rule

pub fn ramx_mem_rule_iter(&self) -> impl Iterator<Item = &RAMX_MEM_RULE>

Iterator for array of: 0x80..0x8c - RAMX Memory Rule

pub fn rama_mem_rule(&self) -> &RAMA_MEM_RULE

0xa0 - RAMA Memory Rule 0

pub fn ramb_mem_rule(&self) -> &RAMB_MEM_RULE

0xc0 - RAMB Memory Rule

pub fn ramc_mem_rule(&self, n: usize) -> &RAMC_MEM_RULE

0xe0..0xe8 - RAMC Memory Rule

pub fn ramc_mem_rule_iter(&self) -> impl Iterator<Item = &RAMC_MEM_RULE>

Iterator for array of: 0xe0..0xe8 - RAMC Memory Rule

pub fn ramd_mem_rule(&self, n: usize) -> &RAMD_MEM_RULE

0x100..0x108 - RAMD Memory Rule

pub fn ramd_mem_rule_iter(&self) -> impl Iterator<Item = &RAMD_MEM_RULE>

Iterator for array of: 0x100..0x108 - RAMD Memory Rule

pub fn rame_mem_rule(&self, n: usize) -> &RAME_MEM_RULE

0x120..0x128 - RAME Memory Rule

pub fn rame_mem_rule_iter(&self) -> impl Iterator<Item = &RAME_MEM_RULE>

Iterator for array of: 0x120..0x128 - RAME Memory Rule

pub fn ramf_mem_rule(&self, n: usize) -> &RAMF_MEM_RULE

0x140..0x148 - RAMF Memory Rule

pub fn ramf_mem_rule_iter(&self) -> impl Iterator<Item = &RAMF_MEM_RULE>

Iterator for array of: 0x140..0x148 - RAMF Memory Rule

pub fn ramg_mem_rule(&self, n: usize) -> &RAMG_MEM_RULE

0x160..0x168 - RAMG Memory Rule

pub fn ramg_mem_rule_iter(&self) -> impl Iterator<Item = &RAMG_MEM_RULE>

Iterator for array of: 0x160..0x168 - RAMG Memory Rule

pub fn ramh_mem_rule(&self) -> &RAMH_MEM_RULE

0x180 - RAMH Memory Rule

pub fn apb_peripheral_group0_mem_rule0( &self ) -> &APB_PERIPHERAL_GROUP0_MEM_RULE0

0x1a0 - APB Bridge Group 0 Memory Rule 0

pub fn apb_peripheral_group0_mem_rule1( &self ) -> &APB_PERIPHERAL_GROUP0_MEM_RULE1

0x1a4 - APB Bridge Group 0 Memory Rule 1

pub fn apb_peripheral_group0_mem_rule2( &self ) -> &APB_PERIPHERAL_GROUP0_MEM_RULE2

0x1a8 - APB Bridge Group 0 Rule 2

pub fn apb_peripheral_group0_mem_rule3( &self ) -> &APB_PERIPHERAL_GROUP0_MEM_RULE3

0x1ac - APB Bridge Group 0 Memory Rule 3

pub fn apb_peripheral_group1_mem_rule0( &self ) -> &APB_PERIPHERAL_GROUP1_MEM_RULE0

0x1b0 - APB Bridge Group 1 Memory Rule 0

pub fn apb_peripheral_group1_mem_rule1( &self ) -> &APB_PERIPHERAL_GROUP1_MEM_RULE1

0x1b4 - APB Bridge Group 1 Memory Rule 1

pub fn apb_peripheral_group1_mem_rule2( &self ) -> &APB_PERIPHERAL_GROUP1_MEM_RULE2

0x1bc - APB Bridge Group 1 Memory Rule 2

pub fn aips_bridge_group0_mem_rule0(&self) -> &AIPS_BRIDGE_GROUP0_MEM_RULE0

0x1c0 - AIPS Bridge Group 0 Memory Rule 0

pub fn aips_bridge_group0_mem_rule1(&self) -> &AIPS_BRIDGE_GROUP0_MEM_RULE1

0x1c4 - AIPS Bridge Group 0 Memory Rule 1

pub fn aips_bridge_group0_mem_rule2(&self) -> &AIPS_BRIDGE_GROUP0_MEM_RULE2

0x1c8 - AIPS Bridge Group 0 Memory Rule 2

pub fn aips_bridge_group0_mem_rule3(&self) -> &AIPS_BRIDGE_GROUP0_MEM_RULE3

0x1cc - AIPS Bridge Group 0 Memory Rule 3

pub fn ahb_peripheral0_slave_port_p12_slave_rule0( &self ) -> &AHB_PERIPHERAL0_SLAVE_PORT_P12_SLAVE_RULE0

0x1d0 - AHB Peripheral 0 Slave Port 12 Slave Rule 0

pub fn ahb_peripheral0_slave_port_p12_slave_rule1( &self ) -> &AHB_PERIPHERAL0_SLAVE_PORT_P12_SLAVE_RULE1

0x1d4 - AHB Peripheral 0 Slave Port 12 Slave Rule 1

pub fn ahb_peripheral0_slave_port_p12_slave_rule2( &self ) -> &AHB_PERIPHERAL0_SLAVE_PORT_P12_SLAVE_RULE2

0x1d8 - AHB Peripheral 0 Slave Port 12 Slave Rule 2

pub fn aips_bridge_group1_mem_rule0(&self) -> &AIPS_BRIDGE_GROUP1_MEM_RULE0

0x1e0 - AIPS Bridge Group 1 Rule 0

pub fn aips_bridge_group1_mem_rule1(&self) -> &AIPS_BRIDGE_GROUP1_MEM_RULE1

0x1e4 - AIPS Bridge Group 1 Rule 1

pub fn ahb_peripheral1_slave_port_p13_slave_rule0( &self ) -> &AHB_PERIPHERAL1_SLAVE_PORT_P13_SLAVE_RULE0

0x1f0 - AHB Peripheral 1 Slave Port 13 Slave Rule 0

pub fn ahb_peripheral1_slave_port_p13_slave_rule1( &self ) -> &AHB_PERIPHERAL1_SLAVE_PORT_P13_SLAVE_RULE1

0x1f4 - AHB Peripheral 1 Slave Port 13 Slave Rule 1

pub fn ahb_peripheral1_slave_port_p13_slave_rule2( &self ) -> &AHB_PERIPHERAL1_SLAVE_PORT_P13_SLAVE_RULE2

0x1f8 - AHB Peripheral 1 Slave Port 13 Slave Rule 2

pub fn aips_bridge_group2_mem_rule0(&self) -> &AIPS_BRIDGE_GROUP2_MEM_RULE0

0x200 - AIPS Bridge Group 2 Rule 0

pub fn aips_bridge_group2_mem_rule1(&self) -> &AIPS_BRIDGE_GROUP2_MEM_RULE1

0x204 - AIPS Bridge Group 2 Memory Rule 1

pub fn aips_bridge_group3_mem_rule0(&self) -> &AIPS_BRIDGE_GROUP3_MEM_RULE0

0x220 - AIPS Bridge Group 3 Rule 0

pub fn aips_bridge_group3_mem_rule1(&self) -> &AIPS_BRIDGE_GROUP3_MEM_RULE1

0x224 - AIPS Bridge Group 3 Memory Rule 1

pub fn aips_bridge_group3_mem_rule2(&self) -> &AIPS_BRIDGE_GROUP3_MEM_RULE2

0x228 - AIPS Bridge Group 3 Rule 2

pub fn aips_bridge_group3_mem_rule3(&self) -> &AIPS_BRIDGE_GROUP3_MEM_RULE3

0x22c - AIPS Bridge Group 3 Rule 3

pub fn aips_bridge_group4_mem_rule0(&self) -> &AIPS_BRIDGE_GROUP4_MEM_RULE0

0x240 - AIPS Bridge Group 4 Rule 0

pub fn aips_bridge_group4_mem_rule1(&self) -> &AIPS_BRIDGE_GROUP4_MEM_RULE1

0x244 - AIPS Bridge Group 4 Rule 1

pub fn aips_bridge_group4_mem_rule2(&self) -> &AIPS_BRIDGE_GROUP4_MEM_RULE2

0x248 - AIPS Bridge Group 4 Rule 2

pub fn aips_bridge_group4_mem_rule3(&self) -> &AIPS_BRIDGE_GROUP4_MEM_RULE3

0x24c - AIPS Bridge Group 4 Rule 3

pub fn ahb_secure_ctrl_peripheral_rule0( &self ) -> &AHB_SECURE_CTRL_PERIPHERAL_RULE0

0x250 - AHB Secure Control Peripheral Rule 0

pub fn flexspi0_region0_mem_rule(&self, n: usize) -> &FLEXSPI0_REGION0_MEM_RULE

0x270..0x280 - FLEXSPI0 Region 0 Memory Rule

pub fn flexspi0_region0_mem_rule_iter( &self ) -> impl Iterator<Item = &FLEXSPI0_REGION0_MEM_RULE>

Iterator for array of: 0x270..0x280 - FLEXSPI0 Region 0 Memory Rule

pub fn flexspi0_region1_6_mem_rule( &self, n: usize ) -> &FLEXSPI0_REGION1_6_MEM_RULE

0x280..0x298 - no description available

pub fn flexspi0_region1_6_mem_rule_iter( &self ) -> impl Iterator<Item = &FLEXSPI0_REGION1_6_MEM_RULE>

Iterator for array of: 0x280..0x298 - no description available

pub fn flexspi0_region7_mem_rule(&self, n: usize) -> &FLEXSPI0_REGION7_MEM_RULE

0x2e0..0x2f0 - FLEXSPI0 Region 7 Memory Rule

pub fn flexspi0_region7_mem_rule_iter( &self ) -> impl Iterator<Item = &FLEXSPI0_REGION7_MEM_RULE>

Iterator for array of: 0x2e0..0x2f0 - FLEXSPI0 Region 7 Memory Rule

pub fn flexspi0_region8_13_mem_rule( &self, n: usize ) -> &FLEXSPI0_REGION8_13_MEM_RULE

0x2f0..0x308 - no description available

pub fn flexspi0_region8_13_mem_rule_iter( &self ) -> impl Iterator<Item = &FLEXSPI0_REGION8_13_MEM_RULE>

Iterator for array of: 0x2f0..0x308 - no description available

pub fn sec_vio_addr(&self, n: usize) -> &SEC_VIO_ADDR

0xe00..0xe80 - Security Violation Address

pub fn sec_vio_addr_iter(&self) -> impl Iterator<Item = &SEC_VIO_ADDR>

Iterator for array of: 0xe00..0xe80 - Security Violation Address

pub fn sec_vio_misc_info(&self, n: usize) -> &SEC_VIO_MISC_INFO

0xe80..0xf00 - Security Violation Miscellaneous Information at Address

pub fn sec_vio_misc_info_iter(&self) -> impl Iterator<Item = &SEC_VIO_MISC_INFO>

Iterator for array of: 0xe80..0xf00 - Security Violation Miscellaneous Information at Address

pub fn sec_vio_info_valid(&self) -> &SEC_VIO_INFO_VALID

0xf00 - Security Violation Info Validity for Address

pub fn sec_gpio_mask(&self, n: usize) -> &SEC_GPIO_MASK

0xf80..0xf88 - GPIO Mask for Port index

pub fn sec_gpio_mask_iter(&self) -> impl Iterator<Item = &SEC_GPIO_MASK>

Iterator for array of: 0xf80..0xf88 - GPIO Mask for Port index

pub fn sec_cpu1_int_mask0(&self) -> &SEC_CPU1_INT_MASK0

0xf98 - Secure Interrupt Mask 0 for CPU1

pub fn sec_cpu1_int_mask1(&self) -> &SEC_CPU1_INT_MASK1

0xf9c - Secure Interrupt Mask 1 for CPU1

pub fn sec_cpu1_int_mask2(&self) -> &SEC_CPU1_INT_MASK2

0xfa0 - Secure Interrupt Mask 2 for CPU1

pub fn sec_cpu1_int_mask3(&self) -> &SEC_CPU1_INT_MASK3

0xfa4 - Secure Interrupt Mask 3 for CPU1

pub fn sec_cpu1_int_mask4(&self) -> &SEC_CPU1_INT_MASK4

0xfa8 - Secure Interrupt Mask 4 for CPU1

pub fn sec_gp_reg_lock(&self) -> &SEC_GP_REG_LOCK

0xfbc - Secure Mask Lock

pub fn master_sec_level(&self) -> &MASTER_SEC_LEVEL

0xfd0 - Master Secure Level

pub fn master_sec_anti_pol_reg(&self) -> &MASTER_SEC_ANTI_POL_REG

0xfd4 - Master Secure Level

pub fn cpu0_lock_reg(&self) -> &CPU0_LOCK_REG

0xfec - Miscellaneous CPU0 Control Signals

pub fn cpu1_lock_reg(&self) -> &CPU1_LOCK_REG

0xff0 - Miscellaneous CPU1 Control Signals

pub fn misc_ctrl_dp_reg(&self) -> &MISC_CTRL_DP_REG

0xff8 - Secure Control Duplicate

pub fn misc_ctrl_reg(&self) -> &MISC_CTRL_REG

0xffc - Secure Control

Trait Implementations

impl Debug for AHBSC

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for AHBSC

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for AHBSC