Module mcxn947_pac::enet0
source · Expand description
ENET
Re-exports§
Modules§
- Cluster Cluster DMA_CH%s, containing DMA_CH?_CONTROL, DMA_CH?_TX_CONTROL, DMA_CH?_RX_CONTROL, DMA_CH?_TXDESC_LIST_ADDRESS, DMA_CH?_RXDESC_LIST_ADDRESS, DMA_CH?_TXDESC_TAIL_POINTER, DMA_CH?_RXDESC_TAIL_POINTER, DMA_CH?_TXDESC_RING_LENGTH, DMA_CH?_RX_CONTROL2, DMA_CH?_INTERRUPT_ENABLE, DMA_CH?_RX_INTERRUPT_WATCHDOG_TIMER, DMA_CH?_SLOT_FUNCTION_CONTROL_STATUS, DMA_CH?_CURRENT_APP_TXDESC, DMA_CH?_CURRENT_APP_RXDESC, DMA_CH?_CURRENT_APP_TXBUFFER, DMA_CH?_CURRENT_APP_RXBUFFER, DMA_CH?_STATUS, DMA_CH?_MISS_FRAME_CNT, DMA_CH?_RX_ERI_CNT
- DMA Debug Status 0
- DMA Interrupt Status
- DMA Bus Mode
- DMA System Bus Mode
- Indirect Access Control
- Indirect Access Data
- MAC Address0 High
- MAC Address0 Low
- MAC Configuration
- CSR Software Control
- MAC Debug
- MAC Extended Configuration Register
- Hardware Features 0
- Hardware Features 1
- Hardware Features 2
- Hardware Features 3
- MAC Inner VLAN Tag Inclusion or Replacement
- Interrupt Enable
- Interrupt Status
- LPI Control and Status
- Tx LPI Entry Timer Control
- LPI Timers Control
- MDIO Address
- MAC MDIO Data
- One-microsecond Reference Timer
- MAC Packet Filter
- PMT Control and Status
- PPS Control
- MAC Q0 Tx Flow Control
- Remote Wakeup Filter
- MAC Rx Flow Control
- Receive Transmit Status
- Receive Queue Control 0
- Receive Queue Control 1
- Receive Queue Control 2
- Receive Queue Control 4
- Subsecond Increment
- System Time Nanoseconds
- System Time Nanoseconds Update
- System Time Seconds
- System Time Seconds Update
- Timestamp Addend
- Timestamp Control
- Timestamp Egress Correction Nanosecond
- Timestamp Egress Latency
- Timestamp Ingress Correction Nanosecond
- Timestamp Ingress Latency
- Timestamp Status
- Transmit Timestamp Status Nanoseconds
- Transmit Timestamp Status Seconds
- MAC Version
- VLAN Tag Inclusion or Replacement
- MAC VLAN Tag Control
- Watchdog Timeout
- MTL Interrupt Status
- MTL Operation Mode
- Receive Queue and DMA Channel Mapping 0
- Queue 1 ETS Control
- Queue 1 hiCredit
- Queue 1 loCredit
- Queue 1 sendSlopeCredit
- PPS0 Target Time Nanoseconds
- PPS0 Target Time Seconds
- Cluster Cluster QUEUE%s, containing MTL_TXQ?_OPERATION_MODE, MTL_TXQ?_UNDERFLOW, MTL_TXQ?_DEBUG, MTL_TXQ?_ETS_STATUS, MTL_TXQ?_QUANTUM_WEIGHT, MTL_Q?_INTERRUPT_CONTROL_STATUS, MTL_RXQ?_OPERATION_MODE, MTL_RXQ?_MISSED_PACKET_OVERFLOW_CNT, MTL_RXQ?_DEBUG, MTL_RXQ?_CONTROL
Structs§
- Register block
Type Aliases§
- DMA_DEBUG_STATUS0 (r) register accessor: DMA Debug Status 0
- DMA_INTERRUPT_STATUS (r) register accessor: DMA Interrupt Status
- DMA_MODE (rw) register accessor: DMA Bus Mode
- DMA_SYSBUS_MODE (rw) register accessor: DMA System Bus Mode
- INDIR_ACCESS_CTRL (rw) register accessor: Indirect Access Control
- INDIR_ACCESS_DATA (rw) register accessor: Indirect Access Data
- MAC_ADDRESS0_HIGH (rw) register accessor: MAC Address0 High
- MAC_ADDRESS0_LOW (rw) register accessor: MAC Address0 Low
- MAC_CONFIGURATION (rw) register accessor: MAC Configuration
- MAC_CSR_SW_CTRL (rw) register accessor: CSR Software Control
- MAC_DEBUG (r) register accessor: MAC Debug
- MAC_EXT_CONFIGURATION (rw) register accessor: MAC Extended Configuration Register
- MAC_HW_FEATURE0 (r) register accessor: Hardware Features 0
- MAC_HW_FEATURE1 (r) register accessor: Hardware Features 1
- MAC_HW_FEATURE2 (r) register accessor: Hardware Features 2
- MAC_HW_FEATURE3 (r) register accessor: Hardware Features 3
- MAC_INNER_VLAN_INCL (rw) register accessor: MAC Inner VLAN Tag Inclusion or Replacement
- MAC_INTERRUPT_ENABLE (rw) register accessor: Interrupt Enable
- MAC_INTERRUPT_STATUS (r) register accessor: Interrupt Status
- MAC_LPI_CONTROL_STATUS (rw) register accessor: LPI Control and Status
- MAC_LPI_ENTRY_TIMER (rw) register accessor: Tx LPI Entry Timer Control
- MAC_LPI_TIMERS_CONTROL (rw) register accessor: LPI Timers Control
- MAC_MDIO_ADDRESS (rw) register accessor: MDIO Address
- MAC_MDIO_DATA (rw) register accessor: MAC MDIO Data
- MAC_ONEUS_TIC_COUNTER (rw) register accessor: One-microsecond Reference Timer
- MAC_PACKET_FILTER (rw) register accessor: MAC Packet Filter
- MAC_PMT_CONTROL_STATUS (rw) register accessor: PMT Control and Status
- MAC_PPS_CONTROL (rw) register accessor: PPS Control
- MAC_Q0_TX_FLOW_CTRL (rw) register accessor: MAC Q0 Tx Flow Control
- MAC_RWK_PACKET_FILTER (rw) register accessor: Remote Wakeup Filter
- MAC_RXQ_CTRL0 (rw) register accessor: Receive Queue Control 0
- MAC_RXQ_CTRL1 (rw) register accessor: Receive Queue Control 1
- MAC_RXQ_CTRL2 (rw) register accessor: Receive Queue Control 2
- MAC_RXQ_CTRL4 (rw) register accessor: Receive Queue Control 4
- MAC_RX_FLOW_CTRL (rw) register accessor: MAC Rx Flow Control
- MAC_RX_TX_STATUS (r) register accessor: Receive Transmit Status
- MAC_SUB_SECOND_INCREMENT (rw) register accessor: Subsecond Increment
- MAC_SYSTEM_TIME_NANOSECONDS (r) register accessor: System Time Nanoseconds
- MAC_SYSTEM_TIME_NANOSECONDS_UPDATE (rw) register accessor: System Time Nanoseconds Update
- MAC_SYSTEM_TIME_SECONDS (r) register accessor: System Time Seconds
- MAC_SYSTEM_TIME_SECONDS_UPDATE (rw) register accessor: System Time Seconds Update
- MAC_TIMESTAMP_ADDEND (rw) register accessor: Timestamp Addend
- MAC_TIMESTAMP_CONTROL (rw) register accessor: Timestamp Control
- MAC_TIMESTAMP_EGRESS_CORR_NANOSECOND (rw) register accessor: Timestamp Egress Correction Nanosecond
- MAC_TIMESTAMP_EGRESS_LATENCY (r) register accessor: Timestamp Egress Latency
- MAC_TIMESTAMP_INGRESS_CORR_NANOSECOND (rw) register accessor: Timestamp Ingress Correction Nanosecond
- MAC_TIMESTAMP_INGRESS_LATENCY (r) register accessor: Timestamp Ingress Latency
- MAC_TIMESTAMP_STATUS (r) register accessor: Timestamp Status
- MAC_TX_TIMESTAMP_STATUS_NANOSECONDS (r) register accessor: Transmit Timestamp Status Nanoseconds
- MAC_TX_TIMESTAMP_STATUS_SECONDS (r) register accessor: Transmit Timestamp Status Seconds
- MAC_VERSION (r) register accessor: MAC Version
- MAC_VLAN_INCL (rw) register accessor: VLAN Tag Inclusion or Replacement
- MAC_VLAN_TAG_CTRL (rw) register accessor: MAC VLAN Tag Control
- MAC_WATCHDOG_TIMEOUT (rw) register accessor: Watchdog Timeout
- MTL_INTERRUPT_STATUS (r) register accessor: MTL Interrupt Status
- MTL_OPERATION_MODE (rw) register accessor: MTL Operation Mode
- MTL_RXQ_DMA_MAP0 (rw) register accessor: Receive Queue and DMA Channel Mapping 0
- MTL_TXQ1_ETS_CONTROL (rw) register accessor: Queue 1 ETS Control
- MTL_TXQ1_HICREDIT (rw) register accessor: Queue 1 hiCredit
- MTL_TXQ1_LOCREDIT (rw) register accessor: Queue 1 loCredit
- MTL_TXQ1_SENDSLOPECREDIT (rw) register accessor: Queue 1 sendSlopeCredit
- PPS0_TARGET_TIME_NANOSECONDS (rw) register accessor: PPS0 Target Time Nanoseconds
- PPS0_TARGET_TIME_SECONDS (rw) register accessor: PPS0 Target Time Seconds