Module mcxn947_pac::sm3_0
source · Expand description
SAFO_SM3_SGI
Modules§
- SGI Configuration Register
- Calculation Counter
- SGI Control Register
- SGI Control Register 2
- Input Data register 0 lower-bank low
- Input Data register 0 lower-bank high
- Input Data register 0 upper-bank low
- Input Data register 0 upper-bank high
- Input Data register 1 lower-bank low
- Input Data register 1 lower-bank high
- Input Data register 1 upper-bank low
- Input Data register 1 upper-bank high
- Output Data register lower-bank low
- Ouput Data register lower-bank high
- Ouput Data register upper-bank low
- Output Data register upper-bank high
- Interrupt Enable
- Interrupt Status Clear
- Interrupt Status Set
- Input Key register 0 lower-bank low
- Input Key register 0 lower-bank high
- Input Key register 0 upper-bank low
- Input Key register 0 upper-bank high
- Input Key register 1 lower-bank low
- Input Key register 1 lower-bank high
- Input Key register 1 upper-bank low
- Input Key register 1 upper-bank high
- SM3 Control Register
- SM3 FIFO Register
- Status Register
Structs§
- Register block
Type Aliases§
- CONFIG (r) register accessor: SGI Configuration Register
- COUNT (rw) register accessor: Calculation Counter
- CTRL (rw) register accessor: SGI Control Register
- CTRL2 (rw) register accessor: SGI Control Register 2
- DATIN0A (rw) register accessor: Input Data register 0 lower-bank low
- DATIN0B (rw) register accessor: Input Data register 0 lower-bank high
- DATIN0C (rw) register accessor: Input Data register 0 upper-bank low
- DATIN0D (rw) register accessor: Input Data register 0 upper-bank high
- DATIN1A (rw) register accessor: Input Data register 1 lower-bank low
- DATIN1B (rw) register accessor: Input Data register 1 lower-bank high
- DATIN1C (rw) register accessor: Input Data register 1 upper-bank low
- DATIN1D (rw) register accessor: Input Data register 1 upper-bank high
- DATOUTA (r) register accessor: Output Data register lower-bank low
- DATOUTB (r) register accessor: Ouput Data register lower-bank high
- DATOUTC (r) register accessor: Ouput Data register upper-bank low
- DATOUTD (r) register accessor: Output Data register upper-bank high
- INT_ENABLE (rw) register accessor: Interrupt Enable
- INT_STATUS_CLR (w) register accessor: Interrupt Status Clear
- INT_STATUS_SET (w) register accessor: Interrupt Status Set
- KEY0A (rw) register accessor: Input Key register 0 lower-bank low
- KEY0B (rw) register accessor: Input Key register 0 lower-bank high
- KEY0C (rw) register accessor: Input Key register 0 upper-bank low
- KEY0D (rw) register accessor: Input Key register 0 upper-bank high
- KEY1A (rw) register accessor: Input Key register 1 lower-bank low
- KEY1B (rw) register accessor: Input Key register 1 lower-bank high
- KEY1C (rw) register accessor: Input Key register 1 upper-bank low
- KEY1D (rw) register accessor: Input Key register 1 upper-bank high
- SM3_CTRL (rw) register accessor: SM3 Control Register
- SM3_FIFO (rw) register accessor: SM3 FIFO Register
- STATUS (r) register accessor: Status Register