mcxa_pac/wuu0/
fmc.rs

1#[doc = "Register `FMC` reader"]
2pub type R = crate::R<FmcSpec>;
3#[doc = "Register `FMC` writer"]
4pub type W = crate::W<FmcSpec>;
5#[doc = "Filter Mode for FILTn\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Filtm1 {
9    #[doc = "0: Active only during Power Down/Deep Power Down mode"]
10    LowPwrOnly = 0,
11    #[doc = "1: Active during all power modes"]
12    AnyPwr = 1,
13}
14impl From<Filtm1> for bool {
15    #[inline(always)]
16    fn from(variant: Filtm1) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `FILTM1` reader - Filter Mode for FILTn"]
21pub type Filtm1R = crate::BitReader<Filtm1>;
22impl Filtm1R {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Filtm1 {
26        match self.bits {
27            false => Filtm1::LowPwrOnly,
28            true => Filtm1::AnyPwr,
29        }
30    }
31    #[doc = "Active only during Power Down/Deep Power Down mode"]
32    #[inline(always)]
33    pub fn is_low_pwr_only(&self) -> bool {
34        *self == Filtm1::LowPwrOnly
35    }
36    #[doc = "Active during all power modes"]
37    #[inline(always)]
38    pub fn is_any_pwr(&self) -> bool {
39        *self == Filtm1::AnyPwr
40    }
41}
42#[doc = "Field `FILTM1` writer - Filter Mode for FILTn"]
43pub type Filtm1W<'a, REG> = crate::BitWriter<'a, REG, Filtm1>;
44impl<'a, REG> Filtm1W<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Active only during Power Down/Deep Power Down mode"]
49    #[inline(always)]
50    pub fn low_pwr_only(self) -> &'a mut crate::W<REG> {
51        self.variant(Filtm1::LowPwrOnly)
52    }
53    #[doc = "Active during all power modes"]
54    #[inline(always)]
55    pub fn any_pwr(self) -> &'a mut crate::W<REG> {
56        self.variant(Filtm1::AnyPwr)
57    }
58}
59#[doc = "Filter Mode for FILTn\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Filtm2 {
63    #[doc = "0: Active only during Power Down/Deep Power Down mode"]
64    LowPwrOnly = 0,
65    #[doc = "1: Active during all power modes"]
66    AnyPwr = 1,
67}
68impl From<Filtm2> for bool {
69    #[inline(always)]
70    fn from(variant: Filtm2) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `FILTM2` reader - Filter Mode for FILTn"]
75pub type Filtm2R = crate::BitReader<Filtm2>;
76impl Filtm2R {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Filtm2 {
80        match self.bits {
81            false => Filtm2::LowPwrOnly,
82            true => Filtm2::AnyPwr,
83        }
84    }
85    #[doc = "Active only during Power Down/Deep Power Down mode"]
86    #[inline(always)]
87    pub fn is_low_pwr_only(&self) -> bool {
88        *self == Filtm2::LowPwrOnly
89    }
90    #[doc = "Active during all power modes"]
91    #[inline(always)]
92    pub fn is_any_pwr(&self) -> bool {
93        *self == Filtm2::AnyPwr
94    }
95}
96#[doc = "Field `FILTM2` writer - Filter Mode for FILTn"]
97pub type Filtm2W<'a, REG> = crate::BitWriter<'a, REG, Filtm2>;
98impl<'a, REG> Filtm2W<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Active only during Power Down/Deep Power Down mode"]
103    #[inline(always)]
104    pub fn low_pwr_only(self) -> &'a mut crate::W<REG> {
105        self.variant(Filtm2::LowPwrOnly)
106    }
107    #[doc = "Active during all power modes"]
108    #[inline(always)]
109    pub fn any_pwr(self) -> &'a mut crate::W<REG> {
110        self.variant(Filtm2::AnyPwr)
111    }
112}
113impl R {
114    #[doc = "Bit 0 - Filter Mode for FILTn"]
115    #[inline(always)]
116    pub fn filtm1(&self) -> Filtm1R {
117        Filtm1R::new((self.bits & 1) != 0)
118    }
119    #[doc = "Bit 1 - Filter Mode for FILTn"]
120    #[inline(always)]
121    pub fn filtm2(&self) -> Filtm2R {
122        Filtm2R::new(((self.bits >> 1) & 1) != 0)
123    }
124}
125#[cfg(feature = "debug")]
126impl core::fmt::Debug for R {
127    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
128        f.debug_struct("FMC")
129            .field("filtm1", &self.filtm1())
130            .field("filtm2", &self.filtm2())
131            .finish()
132    }
133}
134impl W {
135    #[doc = "Bit 0 - Filter Mode for FILTn"]
136    #[inline(always)]
137    pub fn filtm1(&mut self) -> Filtm1W<'_, FmcSpec> {
138        Filtm1W::new(self, 0)
139    }
140    #[doc = "Bit 1 - Filter Mode for FILTn"]
141    #[inline(always)]
142    pub fn filtm2(&mut self) -> Filtm2W<'_, FmcSpec> {
143        Filtm2W::new(self, 1)
144    }
145}
146#[doc = "Pin Filter Mode Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`fmc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fmc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
147pub struct FmcSpec;
148impl crate::RegisterSpec for FmcSpec {
149    type Ux = u32;
150}
151#[doc = "`read()` method returns [`fmc::R`](R) reader structure"]
152impl crate::Readable for FmcSpec {}
153#[doc = "`write(|w| ..)` method takes [`fmc::W`](W) writer structure"]
154impl crate::Writable for FmcSpec {
155    type Safety = crate::Unsafe;
156}
157#[doc = "`reset()` method sets FMC to value 0"]
158impl crate::Resettable for FmcSpec {}
mcxa_pac/wuu0/fmc.rs

mcxa_pac/wuu0/
fmc.rs
