1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 perid: Perid,
6 _reserved1: [u8; 0x03],
7 idcomp: Idcomp,
8 _reserved2: [u8; 0x03],
9 rev: Rev,
10 _reserved3: [u8; 0x03],
11 addinfo: Addinfo,
12 _reserved4: [u8; 0x03],
13 otgistat: Otgistat,
14 _reserved5: [u8; 0x03],
15 otgicr: Otgicr,
16 _reserved6: [u8; 0x03],
17 otgstat: Otgstat,
18 _reserved7: [u8; 0x03],
19 otgctl: Otgctl,
20 _reserved8: [u8; 0x63],
21 istat: Istat,
22 _reserved9: [u8; 0x03],
23 inten: Inten,
24 _reserved10: [u8; 0x03],
25 errstat: Errstat,
26 _reserved11: [u8; 0x03],
27 erren: Erren,
28 _reserved12: [u8; 0x03],
29 stat: Stat,
30 _reserved13: [u8; 0x03],
31 ctl: Ctl,
32 _reserved14: [u8; 0x03],
33 addr: Addr,
34 _reserved15: [u8; 0x03],
35 bdtpage1: Bdtpage1,
36 _reserved16: [u8; 0x03],
37 frmnuml: Frmnuml,
38 _reserved17: [u8; 0x03],
39 frmnumh: Frmnumh,
40 _reserved18: [u8; 0x03],
41 token: Token,
42 _reserved19: [u8; 0x03],
43 softhld: Softhld,
44 _reserved20: [u8; 0x03],
45 bdtpage2: Bdtpage2,
46 _reserved21: [u8; 0x03],
47 bdtpage3: Bdtpage3,
48 _reserved22: [u8; 0x0b],
49 endpoint: (),
50 _reserved23: [u8; 0x40],
51 usbctrl: Usbctrl,
52 _reserved24: [u8; 0x03],
53 observe: Observe,
54 _reserved25: [u8; 0x03],
55 control: Control,
56 _reserved26: [u8; 0x03],
57 usbtrc0: Usbtrc0,
58 _reserved27: [u8; 0x07],
59 usbfrmadjust: Usbfrmadjust,
60 _reserved28: [u8; 0x0f],
61 keep_alive_ctrl_rsvd: KeepAliveCtrlRsvd,
62 _reserved29: [u8; 0x03],
63 keep_alive_wkctrl_rsvd: KeepAliveWkctrlRsvd,
64 _reserved30: [u8; 0x03],
65 miscctrl: Miscctrl,
66 _reserved31: [u8; 0x03],
67 stall_il_dis: StallIlDis,
68 _reserved32: [u8; 0x03],
69 stall_ih_dis: StallIhDis,
70 _reserved33: [u8; 0x03],
71 stall_ol_dis: StallOlDis,
72 _reserved34: [u8; 0x03],
73 stall_oh_dis: StallOhDis,
74 _reserved35: [u8; 0x03],
75 clk_recover_ctrl: ClkRecoverCtrl,
76 _reserved36: [u8; 0x03],
77 clk_recover_irc_en: ClkRecoverIrcEn,
78 _reserved37: [u8; 0x0f],
79 clk_recover_int_en: ClkRecoverIntEn,
80 _reserved38: [u8; 0x07],
81 clk_recover_int_status: ClkRecoverIntStatus,
82}
83impl RegisterBlock {
84 #[doc = "0x00 - Peripheral ID"]
85 #[inline(always)]
86 pub const fn perid(&self) -> &Perid {
87 &self.perid
88 }
89 #[doc = "0x04 - Peripheral ID Complement"]
90 #[inline(always)]
91 pub const fn idcomp(&self) -> &Idcomp {
92 &self.idcomp
93 }
94 #[doc = "0x08 - Peripheral Revision"]
95 #[inline(always)]
96 pub const fn rev(&self) -> &Rev {
97 &self.rev
98 }
99 #[doc = "0x0c - Peripheral Additional Information"]
100 #[inline(always)]
101 pub const fn addinfo(&self) -> &Addinfo {
102 &self.addinfo
103 }
104 #[doc = "0x10 - OTG Interrupt Status"]
105 #[inline(always)]
106 pub const fn otgistat(&self) -> &Otgistat {
107 &self.otgistat
108 }
109 #[doc = "0x14 - OTG Interrupt Control"]
110 #[inline(always)]
111 pub const fn otgicr(&self) -> &Otgicr {
112 &self.otgicr
113 }
114 #[doc = "0x18 - OTG Status"]
115 #[inline(always)]
116 pub const fn otgstat(&self) -> &Otgstat {
117 &self.otgstat
118 }
119 #[doc = "0x1c - OTG Control"]
120 #[inline(always)]
121 pub const fn otgctl(&self) -> &Otgctl {
122 &self.otgctl
123 }
124 #[doc = "0x80 - Interrupt Status"]
125 #[inline(always)]
126 pub const fn istat(&self) -> &Istat {
127 &self.istat
128 }
129 #[doc = "0x84 - Interrupt Enable"]
130 #[inline(always)]
131 pub const fn inten(&self) -> &Inten {
132 &self.inten
133 }
134 #[doc = "0x88 - Error Interrupt Status"]
135 #[inline(always)]
136 pub const fn errstat(&self) -> &Errstat {
137 &self.errstat
138 }
139 #[doc = "0x8c - Error Interrupt Enable"]
140 #[inline(always)]
141 pub const fn erren(&self) -> &Erren {
142 &self.erren
143 }
144 #[doc = "0x90 - Status"]
145 #[inline(always)]
146 pub const fn stat(&self) -> &Stat {
147 &self.stat
148 }
149 #[doc = "0x94 - Control"]
150 #[inline(always)]
151 pub const fn ctl(&self) -> &Ctl {
152 &self.ctl
153 }
154 #[doc = "0x98 - Address"]
155 #[inline(always)]
156 pub const fn addr(&self) -> &Addr {
157 &self.addr
158 }
159 #[doc = "0x9c - BDT Page 1"]
160 #[inline(always)]
161 pub const fn bdtpage1(&self) -> &Bdtpage1 {
162 &self.bdtpage1
163 }
164 #[doc = "0xa0 - Frame Number Register Low"]
165 #[inline(always)]
166 pub const fn frmnuml(&self) -> &Frmnuml {
167 &self.frmnuml
168 }
169 #[doc = "0xa4 - Frame Number Register High"]
170 #[inline(always)]
171 pub const fn frmnumh(&self) -> &Frmnumh {
172 &self.frmnumh
173 }
174 #[doc = "0xa8 - Token"]
175 #[inline(always)]
176 pub const fn token(&self) -> &Token {
177 &self.token
178 }
179 #[doc = "0xac - SOF Threshold"]
180 #[inline(always)]
181 pub const fn softhld(&self) -> &Softhld {
182 &self.softhld
183 }
184 #[doc = "0xb0 - BDT Page 2"]
185 #[inline(always)]
186 pub const fn bdtpage2(&self) -> &Bdtpage2 {
187 &self.bdtpage2
188 }
189 #[doc = "0xb4 - BDT Page 3"]
190 #[inline(always)]
191 pub const fn bdtpage3(&self) -> &Bdtpage3 {
192 &self.bdtpage3
193 }
194 #[doc = "0xc0..0xd0 - Array of registers: ENDPT"]
195 #[inline(always)]
196 pub const fn endpoint(&self, n: usize) -> &Endpoint {
197 #[allow(clippy::no_effect)]
198 [(); 16][n];
199 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(192).add(4 * n).cast() }
200 }
201 #[doc = "Iterator for array of:"]
202 #[doc = "0xc0..0xd0 - Array of registers: ENDPT"]
203 #[inline(always)]
204 pub fn endpoint_iter(&self) -> impl Iterator<Item = &Endpoint> {
205 (0..16).map(move |n| unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(192).add(4 * n).cast() })
206 }
207 #[doc = "0x100 - USB Control"]
208 #[inline(always)]
209 pub const fn usbctrl(&self) -> &Usbctrl {
210 &self.usbctrl
211 }
212 #[doc = "0x104 - USB OTG Observe"]
213 #[inline(always)]
214 pub const fn observe(&self) -> &Observe {
215 &self.observe
216 }
217 #[doc = "0x108 - USB OTG Control"]
218 #[inline(always)]
219 pub const fn control(&self) -> &Control {
220 &self.control
221 }
222 #[doc = "0x10c - USB Transceiver Control 0"]
223 #[inline(always)]
224 pub const fn usbtrc0(&self) -> &Usbtrc0 {
225 &self.usbtrc0
226 }
227 #[doc = "0x114 - Frame Adjust"]
228 #[inline(always)]
229 pub const fn usbfrmadjust(&self) -> &Usbfrmadjust {
230 &self.usbfrmadjust
231 }
232 #[doc = "0x124 - Reserved"]
233 #[inline(always)]
234 pub const fn keep_alive_ctrl_rsvd(&self) -> &KeepAliveCtrlRsvd {
235 &self.keep_alive_ctrl_rsvd
236 }
237 #[doc = "0x128 - Reserved"]
238 #[inline(always)]
239 pub const fn keep_alive_wkctrl_rsvd(&self) -> &KeepAliveWkctrlRsvd {
240 &self.keep_alive_wkctrl_rsvd
241 }
242 #[doc = "0x12c - Miscellaneous Control"]
243 #[inline(always)]
244 pub const fn miscctrl(&self) -> &Miscctrl {
245 &self.miscctrl
246 }
247 #[doc = "0x130 - Peripheral Mode Stall Disable for Endpoints 7 to 0 in IN Direction"]
248 #[inline(always)]
249 pub const fn stall_il_dis(&self) -> &StallIlDis {
250 &self.stall_il_dis
251 }
252 #[doc = "0x134 - Peripheral Mode Stall Disable for Endpoints 15 to 8 in IN Direction"]
253 #[inline(always)]
254 pub const fn stall_ih_dis(&self) -> &StallIhDis {
255 &self.stall_ih_dis
256 }
257 #[doc = "0x138 - Peripheral Mode Stall Disable for Endpoints 7 to 0 in OUT Direction"]
258 #[inline(always)]
259 pub const fn stall_ol_dis(&self) -> &StallOlDis {
260 &self.stall_ol_dis
261 }
262 #[doc = "0x13c - Peripheral Mode Stall Disable for Endpoints 15 to 8 in OUT Direction"]
263 #[inline(always)]
264 pub const fn stall_oh_dis(&self) -> &StallOhDis {
265 &self.stall_oh_dis
266 }
267 #[doc = "0x140 - USB Clock Recovery Control"]
268 #[inline(always)]
269 pub const fn clk_recover_ctrl(&self) -> &ClkRecoverCtrl {
270 &self.clk_recover_ctrl
271 }
272 #[doc = "0x144 - FIRC Oscillator Enable"]
273 #[inline(always)]
274 pub const fn clk_recover_irc_en(&self) -> &ClkRecoverIrcEn {
275 &self.clk_recover_irc_en
276 }
277 #[doc = "0x154 - Clock Recovery Combined Interrupt Enable"]
278 #[inline(always)]
279 pub const fn clk_recover_int_en(&self) -> &ClkRecoverIntEn {
280 &self.clk_recover_int_en
281 }
282 #[doc = "0x15c - Clock Recovery Separated Interrupt Status"]
283 #[inline(always)]
284 pub const fn clk_recover_int_status(&self) -> &ClkRecoverIntStatus {
285 &self.clk_recover_int_status
286 }
287}
288#[doc = "PERID (r) register accessor: Peripheral ID\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"]
289#[doc(alias = "PERID")]
290pub type Perid = crate::Reg<perid::PeridSpec>;
291#[doc = "Peripheral ID"]
292pub mod perid;
293#[doc = "IDCOMP (r) register accessor: Peripheral ID Complement\n\nYou can [`read`](crate::Reg::read) this register and get [`idcomp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idcomp`] module"]
294#[doc(alias = "IDCOMP")]
295pub type Idcomp = crate::Reg<idcomp::IdcompSpec>;
296#[doc = "Peripheral ID Complement"]
297pub mod idcomp;
298#[doc = "REV (r) register accessor: Peripheral Revision\n\nYou can [`read`](crate::Reg::read) this register and get [`rev::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rev`] module"]
299#[doc(alias = "REV")]
300pub type Rev = crate::Reg<rev::RevSpec>;
301#[doc = "Peripheral Revision"]
302pub mod rev;
303#[doc = "ADDINFO (r) register accessor: Peripheral Additional Information\n\nYou can [`read`](crate::Reg::read) this register and get [`addinfo::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addinfo`] module"]
304#[doc(alias = "ADDINFO")]
305pub type Addinfo = crate::Reg<addinfo::AddinfoSpec>;
306#[doc = "Peripheral Additional Information"]
307pub mod addinfo;
308#[doc = "OTGISTAT (rw) register accessor: OTG Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`otgistat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`otgistat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@otgistat`] module"]
309#[doc(alias = "OTGISTAT")]
310pub type Otgistat = crate::Reg<otgistat::OtgistatSpec>;
311#[doc = "OTG Interrupt Status"]
312pub mod otgistat;
313#[doc = "OTGICR (rw) register accessor: OTG Interrupt Control\n\nYou can [`read`](crate::Reg::read) this register and get [`otgicr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`otgicr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@otgicr`] module"]
314#[doc(alias = "OTGICR")]
315pub type Otgicr = crate::Reg<otgicr::OtgicrSpec>;
316#[doc = "OTG Interrupt Control"]
317pub mod otgicr;
318#[doc = "OTGSTAT (r) register accessor: OTG Status\n\nYou can [`read`](crate::Reg::read) this register and get [`otgstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@otgstat`] module"]
319#[doc(alias = "OTGSTAT")]
320pub type Otgstat = crate::Reg<otgstat::OtgstatSpec>;
321#[doc = "OTG Status"]
322pub mod otgstat;
323#[doc = "OTGCTL (rw) register accessor: OTG Control\n\nYou can [`read`](crate::Reg::read) this register and get [`otgctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`otgctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@otgctl`] module"]
324#[doc(alias = "OTGCTL")]
325pub type Otgctl = crate::Reg<otgctl::OtgctlSpec>;
326#[doc = "OTG Control"]
327pub mod otgctl;
328#[doc = "ISTAT (rw) register accessor: Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`istat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`istat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@istat`] module"]
329#[doc(alias = "ISTAT")]
330pub type Istat = crate::Reg<istat::IstatSpec>;
331#[doc = "Interrupt Status"]
332pub mod istat;
333#[doc = "INTEN (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`inten::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inten::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inten`] module"]
334#[doc(alias = "INTEN")]
335pub type Inten = crate::Reg<inten::IntenSpec>;
336#[doc = "Interrupt Enable"]
337pub mod inten;
338#[doc = "ERRSTAT (rw) register accessor: Error Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`errstat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`errstat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@errstat`] module"]
339#[doc(alias = "ERRSTAT")]
340pub type Errstat = crate::Reg<errstat::ErrstatSpec>;
341#[doc = "Error Interrupt Status"]
342pub mod errstat;
343#[doc = "ERREN (rw) register accessor: Error Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`erren::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`erren::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@erren`] module"]
344#[doc(alias = "ERREN")]
345pub type Erren = crate::Reg<erren::ErrenSpec>;
346#[doc = "Error Interrupt Enable"]
347pub mod erren;
348#[doc = "STAT (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stat`] module"]
349#[doc(alias = "STAT")]
350pub type Stat = crate::Reg<stat::StatSpec>;
351#[doc = "Status"]
352pub mod stat;
353#[doc = "CTL (rw) register accessor: Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctl`] module"]
354#[doc(alias = "CTL")]
355pub type Ctl = crate::Reg<ctl::CtlSpec>;
356#[doc = "Control"]
357pub mod ctl;
358#[doc = "ADDR (rw) register accessor: Address\n\nYou can [`read`](crate::Reg::read) this register and get [`addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr`] module"]
359#[doc(alias = "ADDR")]
360pub type Addr = crate::Reg<addr::AddrSpec>;
361#[doc = "Address"]
362pub mod addr;
363#[doc = "BDTPAGE1 (rw) register accessor: BDT Page 1\n\nYou can [`read`](crate::Reg::read) this register and get [`bdtpage1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bdtpage1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bdtpage1`] module"]
364#[doc(alias = "BDTPAGE1")]
365pub type Bdtpage1 = crate::Reg<bdtpage1::Bdtpage1Spec>;
366#[doc = "BDT Page 1"]
367pub mod bdtpage1;
368#[doc = "FRMNUML (r) register accessor: Frame Number Register Low\n\nYou can [`read`](crate::Reg::read) this register and get [`frmnuml::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@frmnuml`] module"]
369#[doc(alias = "FRMNUML")]
370pub type Frmnuml = crate::Reg<frmnuml::FrmnumlSpec>;
371#[doc = "Frame Number Register Low"]
372pub mod frmnuml;
373#[doc = "FRMNUMH (r) register accessor: Frame Number Register High\n\nYou can [`read`](crate::Reg::read) this register and get [`frmnumh::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@frmnumh`] module"]
374#[doc(alias = "FRMNUMH")]
375pub type Frmnumh = crate::Reg<frmnumh::FrmnumhSpec>;
376#[doc = "Frame Number Register High"]
377pub mod frmnumh;
378#[doc = "TOKEN (rw) register accessor: Token\n\nYou can [`read`](crate::Reg::read) this register and get [`token::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`token::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@token`] module"]
379#[doc(alias = "TOKEN")]
380pub type Token = crate::Reg<token::TokenSpec>;
381#[doc = "Token"]
382pub mod token;
383#[doc = "SOFTHLD (rw) register accessor: SOF Threshold\n\nYou can [`read`](crate::Reg::read) this register and get [`softhld::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`softhld::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@softhld`] module"]
384#[doc(alias = "SOFTHLD")]
385pub type Softhld = crate::Reg<softhld::SofthldSpec>;
386#[doc = "SOF Threshold"]
387pub mod softhld;
388#[doc = "BDTPAGE2 (rw) register accessor: BDT Page 2\n\nYou can [`read`](crate::Reg::read) this register and get [`bdtpage2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bdtpage2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bdtpage2`] module"]
389#[doc(alias = "BDTPAGE2")]
390pub type Bdtpage2 = crate::Reg<bdtpage2::Bdtpage2Spec>;
391#[doc = "BDT Page 2"]
392pub mod bdtpage2;
393#[doc = "BDTPAGE3 (rw) register accessor: BDT Page 3\n\nYou can [`read`](crate::Reg::read) this register and get [`bdtpage3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bdtpage3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bdtpage3`] module"]
394#[doc(alias = "BDTPAGE3")]
395pub type Bdtpage3 = crate::Reg<bdtpage3::Bdtpage3Spec>;
396#[doc = "BDT Page 3"]
397pub mod bdtpage3;
398#[doc = "Array of registers: ENDPT"]
399pub use self::endpoint::Endpoint;
400#[doc = r"Cluster"]
401#[doc = "Array of registers: ENDPT"]
402pub mod endpoint;
403#[doc = "USBCTRL (rw) register accessor: USB Control\n\nYou can [`read`](crate::Reg::read) this register and get [`usbctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbctrl`] module"]
404#[doc(alias = "USBCTRL")]
405pub type Usbctrl = crate::Reg<usbctrl::UsbctrlSpec>;
406#[doc = "USB Control"]
407pub mod usbctrl;
408#[doc = "OBSERVE (r) register accessor: USB OTG Observe\n\nYou can [`read`](crate::Reg::read) this register and get [`observe::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@observe`] module"]
409#[doc(alias = "OBSERVE")]
410pub type Observe = crate::Reg<observe::ObserveSpec>;
411#[doc = "USB OTG Observe"]
412pub mod observe;
413#[doc = "CONTROL (rw) register accessor: USB OTG Control\n\nYou can [`read`](crate::Reg::read) this register and get [`control::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`control::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@control`] module"]
414#[doc(alias = "CONTROL")]
415pub type Control = crate::Reg<control::ControlSpec>;
416#[doc = "USB OTG Control"]
417pub mod control;
418#[doc = "USBTRC0 (rw) register accessor: USB Transceiver Control 0\n\nYou can [`read`](crate::Reg::read) this register and get [`usbtrc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbtrc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbtrc0`] module"]
419#[doc(alias = "USBTRC0")]
420pub type Usbtrc0 = crate::Reg<usbtrc0::Usbtrc0Spec>;
421#[doc = "USB Transceiver Control 0"]
422pub mod usbtrc0;
423#[doc = "USBFRMADJUST (rw) register accessor: Frame Adjust\n\nYou can [`read`](crate::Reg::read) this register and get [`usbfrmadjust::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbfrmadjust::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbfrmadjust`] module"]
424#[doc(alias = "USBFRMADJUST")]
425pub type Usbfrmadjust = crate::Reg<usbfrmadjust::UsbfrmadjustSpec>;
426#[doc = "Frame Adjust"]
427pub mod usbfrmadjust;
428#[doc = "KEEP_ALIVE_CTRL_RSVD (rw) register accessor: Reserved\n\nYou can [`read`](crate::Reg::read) this register and get [`keep_alive_ctrl_rsvd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keep_alive_ctrl_rsvd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keep_alive_ctrl_rsvd`] module"]
429#[doc(alias = "KEEP_ALIVE_CTRL_RSVD")]
430pub type KeepAliveCtrlRsvd = crate::Reg<keep_alive_ctrl_rsvd::KeepAliveCtrlRsvdSpec>;
431#[doc = "Reserved"]
432pub mod keep_alive_ctrl_rsvd;
433#[doc = "KEEP_ALIVE_WKCTRL_RSVD (rw) register accessor: Reserved\n\nYou can [`read`](crate::Reg::read) this register and get [`keep_alive_wkctrl_rsvd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keep_alive_wkctrl_rsvd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keep_alive_wkctrl_rsvd`] module"]
434#[doc(alias = "KEEP_ALIVE_WKCTRL_RSVD")]
435pub type KeepAliveWkctrlRsvd = crate::Reg<keep_alive_wkctrl_rsvd::KeepAliveWkctrlRsvdSpec>;
436#[doc = "Reserved"]
437pub mod keep_alive_wkctrl_rsvd;
438#[doc = "MISCCTRL (rw) register accessor: Miscellaneous Control\n\nYou can [`read`](crate::Reg::read) this register and get [`miscctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`miscctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@miscctrl`] module"]
439#[doc(alias = "MISCCTRL")]
440pub type Miscctrl = crate::Reg<miscctrl::MiscctrlSpec>;
441#[doc = "Miscellaneous Control"]
442pub mod miscctrl;
443#[doc = "STALL_IL_DIS (rw) register accessor: Peripheral Mode Stall Disable for Endpoints 7 to 0 in IN Direction\n\nYou can [`read`](crate::Reg::read) this register and get [`stall_il_dis::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stall_il_dis::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stall_il_dis`] module"]
444#[doc(alias = "STALL_IL_DIS")]
445pub type StallIlDis = crate::Reg<stall_il_dis::StallIlDisSpec>;
446#[doc = "Peripheral Mode Stall Disable for Endpoints 7 to 0 in IN Direction"]
447pub mod stall_il_dis;
448#[doc = "STALL_IH_DIS (rw) register accessor: Peripheral Mode Stall Disable for Endpoints 15 to 8 in IN Direction\n\nYou can [`read`](crate::Reg::read) this register and get [`stall_ih_dis::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stall_ih_dis::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stall_ih_dis`] module"]
449#[doc(alias = "STALL_IH_DIS")]
450pub type StallIhDis = crate::Reg<stall_ih_dis::StallIhDisSpec>;
451#[doc = "Peripheral Mode Stall Disable for Endpoints 15 to 8 in IN Direction"]
452pub mod stall_ih_dis;
453#[doc = "STALL_OL_DIS (rw) register accessor: Peripheral Mode Stall Disable for Endpoints 7 to 0 in OUT Direction\n\nYou can [`read`](crate::Reg::read) this register and get [`stall_ol_dis::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stall_ol_dis::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stall_ol_dis`] module"]
454#[doc(alias = "STALL_OL_DIS")]
455pub type StallOlDis = crate::Reg<stall_ol_dis::StallOlDisSpec>;
456#[doc = "Peripheral Mode Stall Disable for Endpoints 7 to 0 in OUT Direction"]
457pub mod stall_ol_dis;
458#[doc = "STALL_OH_DIS (rw) register accessor: Peripheral Mode Stall Disable for Endpoints 15 to 8 in OUT Direction\n\nYou can [`read`](crate::Reg::read) this register and get [`stall_oh_dis::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stall_oh_dis::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stall_oh_dis`] module"]
459#[doc(alias = "STALL_OH_DIS")]
460pub type StallOhDis = crate::Reg<stall_oh_dis::StallOhDisSpec>;
461#[doc = "Peripheral Mode Stall Disable for Endpoints 15 to 8 in OUT Direction"]
462pub mod stall_oh_dis;
463#[doc = "CLK_RECOVER_CTRL (rw) register accessor: USB Clock Recovery Control\n\nYou can [`read`](crate::Reg::read) this register and get [`clk_recover_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clk_recover_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk_recover_ctrl`] module"]
464#[doc(alias = "CLK_RECOVER_CTRL")]
465pub type ClkRecoverCtrl = crate::Reg<clk_recover_ctrl::ClkRecoverCtrlSpec>;
466#[doc = "USB Clock Recovery Control"]
467pub mod clk_recover_ctrl;
468#[doc = "CLK_RECOVER_IRC_EN (rw) register accessor: FIRC Oscillator Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`clk_recover_irc_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clk_recover_irc_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk_recover_irc_en`] module"]
469#[doc(alias = "CLK_RECOVER_IRC_EN")]
470pub type ClkRecoverIrcEn = crate::Reg<clk_recover_irc_en::ClkRecoverIrcEnSpec>;
471#[doc = "FIRC Oscillator Enable"]
472pub mod clk_recover_irc_en;
473#[doc = "CLK_RECOVER_INT_EN (rw) register accessor: Clock Recovery Combined Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`clk_recover_int_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clk_recover_int_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk_recover_int_en`] module"]
474#[doc(alias = "CLK_RECOVER_INT_EN")]
475pub type ClkRecoverIntEn = crate::Reg<clk_recover_int_en::ClkRecoverIntEnSpec>;
476#[doc = "Clock Recovery Combined Interrupt Enable"]
477pub mod clk_recover_int_en;
478#[doc = "CLK_RECOVER_INT_STATUS (rw) register accessor: Clock Recovery Separated Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`clk_recover_int_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clk_recover_int_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk_recover_int_status`] module"]
479#[doc(alias = "CLK_RECOVER_INT_STATUS")]
480pub type ClkRecoverIntStatus = crate::Reg<clk_recover_int_status::ClkRecoverIntStatusSpec>;
481#[doc = "Clock Recovery Separated Interrupt Status"]
482pub mod clk_recover_int_status;